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-rw-r--r--arch/arm/cpu/armv7/s5p4418/cpu.c29
-rw-r--r--arch/arm/dts/k3-am64-mcu.dtsi8
-rw-r--r--arch/arm/dts/s5p4418-nanopi2.dts6
-rw-r--r--arch/arm/dts/s5p4418-pinctrl.dtsi71
-rw-r--r--arch/arm/dts/s5p4418.dtsi40
-rw-r--r--arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi4
-rw-r--r--arch/arm/dts/synquacer-sc2a11-developerbox.dts2
-rw-r--r--arch/arm/dts/synquacer-sc2a11.dtsi71
-rw-r--r--arch/arm/dts/uniphier-v7-u-boot.dtsi4
-rw-r--r--arch/arm/mach-nexell/Kconfig4
-rw-r--r--arch/arm/mach-nexell/clock.c2
-rw-r--r--arch/arm/mach-uniphier/Kconfig1
-rw-r--r--arch/arm/mach-uniphier/arm32/Makefile2
-rw-r--r--arch/arm/mach-uniphier/arm32/timer.c39
14 files changed, 170 insertions, 113 deletions
diff --git a/arch/arm/cpu/armv7/s5p4418/cpu.c b/arch/arm/cpu/armv7/s5p4418/cpu.c
index 7ba9c0b032..fcaafc0ff7 100644
--- a/arch/arm/cpu/armv7/s5p4418/cpu.c
+++ b/arch/arm/cpu/armv7/s5p4418/cpu.c
@@ -13,10 +13,8 @@
#include <asm/io.h>
#include <asm/arch/nexell.h>
#include <asm/arch/clk.h>
-#include <asm/arch/reset.h>
#include <asm/arch/tieoff.h>
#include <cpu_func.h>
-#include <linux/delay.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -45,39 +43,12 @@ static void cpu_soc_init(void)
nx_tieoff_set(NX_TIEOFF_CORTEXA9MP_TOP_QUADL2C_L2RET1N_1, 1);
}
-#ifdef CONFIG_PL011_SERIAL
-static void serial_device_init(void)
-{
- char dev[10];
- int id;
-
- sprintf(dev, "nx-uart.%d", CONFIG_CONS_INDEX);
- id = RESET_ID_UART0 + CONFIG_CONS_INDEX;
-
- struct clk *clk = clk_get((const char *)dev);
-
- /* reset control: Low active ___|--- */
- nx_rstcon_setrst(id, RSTCON_ASSERT);
- udelay(10);
- nx_rstcon_setrst(id, RSTCON_NEGATE);
- udelay(10);
-
- /* set clock */
- clk_disable(clk);
- clk_set_rate(clk, CFG_PL011_CLOCK);
- clk_enable(clk);
-}
-#endif
-
int arch_cpu_init(void)
{
flush_dcache_all();
cpu_soc_init();
clk_init();
- if (IS_ENABLED(CONFIG_PL011_SERIAL))
- serial_device_init();
-
return 0;
}
diff --git a/arch/arm/dts/k3-am64-mcu.dtsi b/arch/arm/dts/k3-am64-mcu.dtsi
index 59cc58f7d0..2bb5c9ff17 100644
--- a/arch/arm/dts/k3-am64-mcu.dtsi
+++ b/arch/arm/dts/k3-am64-mcu.dtsi
@@ -97,4 +97,12 @@
clocks = <&k3_clks 79 0>;
clock-names = "gpio";
};
+
+ mcu_pmx0: pinctrl@4084000 {
+ compatible = "pinctrl-single";
+ reg = <0x00 0x4084000 0x00 0x84>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0xffffffff>;
+ };
};
diff --git a/arch/arm/dts/s5p4418-nanopi2.dts b/arch/arm/dts/s5p4418-nanopi2.dts
index 4deaf10a1c..42251e0a05 100644
--- a/arch/arm/dts/s5p4418-nanopi2.dts
+++ b/arch/arm/dts/s5p4418-nanopi2.dts
@@ -25,6 +25,7 @@
i2c0 = "/i2c@c00a4000";
i2c1 = "/i2c@c00a5000";
i2c2 = "/i2c@c00a6000";
+ serial0 = "/uart@c00a1000";
};
mmc0:mmc@c0062000 {
@@ -107,4 +108,9 @@
};
};
};
+
+ uart0:uart@c00a1000 {
+ skip-init;
+ status = "okay";
+ };
};
diff --git a/arch/arm/dts/s5p4418-pinctrl.dtsi b/arch/arm/dts/s5p4418-pinctrl.dtsi
index a7e1c2c381..0768d80fc9 100644
--- a/arch/arm/dts/s5p4418-pinctrl.dtsi
+++ b/arch/arm/dts/s5p4418-pinctrl.dtsi
@@ -132,4 +132,75 @@ pinctrl@C0010000 {
pin-pull = <2>;
pin-strength = <0>;
};
+
+ /* UART */
+ uart0_rx:uart0-rx {
+ pins = "gpiod-14";
+ pin-function = <1>;
+ pin-pull = <2>;
+ pin-strength = <0>;
+ };
+
+ uart0_tx:uart0-tx {
+ pins = "gpiod-18";
+ pin-function = <1>;
+ pin-pull = <2>;
+ pin-strength = <0>;
+ };
+
+ uart1_rx:uart1-rx {
+ pins = "gpiod-15";
+ pin-function = <2>;
+ pin-pull = <2>;
+ pin-strength = <0>;
+ };
+
+ uart1_tx:uart1-tx {
+ pins = "gpiod-19";
+ pin-function = <2>;
+ pin-pull = <2>;
+ pin-strength = <0>;
+ };
+
+ uart2_rx:uart2-rx {
+ pins = "gpiod-16";
+ pin-function = <1>;
+ pin-pull = <2>;
+ pin-strength = <0>;
+ };
+
+ uart2_tx:uart2-tx {
+ pins = "gpiod-20";
+ pin-function = <1>;
+ pin-pull = <2>;
+ pin-strength = <0>;
+ };
+
+ uart3_rx:uart3-rx {
+ pins = "gpiod-17";
+ pin-function = <1>;
+ pin-pull = <2>;
+ pin-strength = <0>;
+ };
+
+ uart3_tx:uart3-tx {
+ pins = "gpiod-21";
+ pin-function = <1>;
+ pin-pull = <2>;
+ pin-strength = <0>;
+ };
+
+ uart4_rx:uart4-rx {
+ pins = "gpiob-28";
+ pin-function = <3>;
+ pin-pull = <2>;
+ pin-strength = <0>;
+ };
+
+ uart4_tx:uart4-tx {
+ pins = "gpiob-29";
+ pin-function = <3>;
+ pin-pull = <2>;
+ pin-strength = <0>;
+ };
};
diff --git a/arch/arm/dts/s5p4418.dtsi b/arch/arm/dts/s5p4418.dtsi
index a4d1a1bd03..3027cd4bb9 100644
--- a/arch/arm/dts/s5p4418.dtsi
+++ b/arch/arm/dts/s5p4418.dtsi
@@ -167,4 +167,44 @@
reg = <0xc0010000 0xf000>;
u-boot,dm-pre-reloc;
};
+
+ uart0:uart@c00a1000 {
+ compatible = "nexell,s5p4418-pl011", "arm,primecell";
+ reg = <0xc00a1000 0x1000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_rx>, <&uart0_tx>;
+ status = "disabled";
+ };
+
+ uart1:uart@c00a0000 {
+ compatible = "nexell,s5p4418-pl011", "arm,primecell";
+ reg = <0xc00a0000 0x1000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_rx>, <&uart1_tx>;
+ status = "disabled";
+ };
+
+ uart2:uart@c00a2000 {
+ compatible = "nexell,s5p4418-pl011", "arm,primecell";
+ reg = <0xc00a2000 0x1000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_rx>, <&uart2_tx>;
+ status = "disabled";
+ };
+
+ uart3:uart@c00a3000 {
+ compatible = "nexell,s5p4418-pl011", "arm,primecell";
+ reg = <0xc00a3000 0x1000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_rx>, <&uart3_tx>;
+ status = "disabled";
+ };
+
+ uart4:uart@c006d000 {
+ compatible = "nexell,s5p4418-pl011", "arm,primecell";
+ reg = <0xc006d000 0x1000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_rx>, <&uart4_tx>;
+ status = "disabled";
+ };
};
diff --git a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
index 7a56116d6f..9f9837b33b 100644
--- a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
+++ b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
@@ -20,10 +20,8 @@
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
- active_clk_edges;
- chipselect_num = <1>;
- spi-flash@0 {
+ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
diff --git a/arch/arm/dts/synquacer-sc2a11-developerbox.dts b/arch/arm/dts/synquacer-sc2a11-developerbox.dts
index 42b6cbbb82..c8087b99a7 100644
--- a/arch/arm/dts/synquacer-sc2a11-developerbox.dts
+++ b/arch/arm/dts/synquacer-sc2a11-developerbox.dts
@@ -18,7 +18,7 @@
compatible = "gpio-keys";
interrupt-parent = <&exiu>;
- power {
+ power-button {
label = "Power Button";
linux,code = <KEY_POWER>;
interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_FALLING>;
diff --git a/arch/arm/dts/synquacer-sc2a11.dtsi b/arch/arm/dts/synquacer-sc2a11.dtsi
index 1fe7d214b9..7ba1cd1bee 100644
--- a/arch/arm/dts/synquacer-sc2a11.dtsi
+++ b/arch/arm/dts/synquacer-sc2a11.dtsi
@@ -41,168 +41,168 @@
CPU0: cpu@0 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU1: cpu@1 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x1>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU2: cpu@100 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x100>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU3: cpu@101 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x101>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU4: cpu@200 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x200>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU5: cpu@201 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x201>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU6: cpu@300 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x300>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU7: cpu@301 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x301>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU8: cpu@400 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x400>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU9: cpu@401 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x401>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU10: cpu@500 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x500>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU11: cpu@501 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x501>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU12: cpu@600 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x600>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU13: cpu@601 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x601>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU14: cpu@700 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x700>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU15: cpu@701 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x701>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU16: cpu@800 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x800>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU17: cpu@801 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x801>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU18: cpu@900 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x900>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU19: cpu@901 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x901>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU20: cpu@a00 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0xa00>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU21: cpu@a01 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0xa01>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU22: cpu@b00 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0xb00>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
};
CPU23: cpu@b01 {
device_type = "cpu";
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0xb01>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -309,7 +309,7 @@
};
idle-states {
- entry-method = "arm,psci";
+ entry-method = "psci";
CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
@@ -344,7 +344,7 @@
interrupt-controller;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
- its: gic-its@30020000 {
+ its: msi-controller@30020000 {
compatible = "arm,gic-v3-its";
reg = <0x0 0x30020000 0x0 0x20000>;
#msi-cells = <1>;
@@ -361,16 +361,16 @@
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; // HYP
};
- mmio-timer@2a810000 {
+ timer@2a810000 {
compatible = "arm,armv7-timer-mem";
reg = <0x0 0x2a810000 0x0 0x10000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- frame@2a830000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x2a810000 0x30000>;
+ frame@20000 {
frame-number = <0>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0 0x2a830000 0x0 0x10000>;
+ reg = <0x20000 0x10000>;
};
};
@@ -398,7 +398,7 @@
clock-output-names = "apb_pclk";
};
- soc_uart0: uart@2a400000 {
+ soc_uart0: serial@2a400000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0x2a400000 0x0 0x1000>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
@@ -406,7 +406,7 @@
clock-names = "uartclk", "apb_pclk";
};
- fuart: uart@51040000 {
+ fuart: serial@51040000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x51040000 0x0 0x1000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
@@ -497,7 +497,6 @@
gpio-controller;
#gpio-cells = <2>;
clocks = <&clk_apb>;
- base = <0>;
};
exiu: interrupt-controller@510c0000 {
@@ -523,7 +522,7 @@
clock-output-names = "sd_sd4clk";
};
- sdhci: sdhci@52300000 {
+ sdhci: mmc@52300000 {
compatible = "socionext,synquacer-sdhci", "fujitsu,mb86s70-sdhci-3.0";
reg = <0 0x52300000 0x0 0x1000>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm/dts/uniphier-v7-u-boot.dtsi b/arch/arm/dts/uniphier-v7-u-boot.dtsi
index 9459bf0377..603b33dd2b 100644
--- a/arch/arm/dts/uniphier-v7-u-boot.dtsi
+++ b/arch/arm/dts/uniphier-v7-u-boot.dtsi
@@ -2,6 +2,10 @@
soc {
u-boot,dm-pre-reloc;
+ timer@60000200 {
+ u-boot,dm-pre-reloc;
+ };
+
serial@54006800 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/mach-nexell/Kconfig b/arch/arm/mach-nexell/Kconfig
index 86a2398637..16324e1520 100644
--- a/arch/arm/mach-nexell/Kconfig
+++ b/arch/arm/mach-nexell/Kconfig
@@ -6,8 +6,8 @@ config ARCH_S5P4418
select OF_CONTROL
select OF_SEPARATE
select NX_GPIO
- select PL011_SERIAL
- select PL011_SERIAL_FLUSH_ON_INIT
+ select DM_SERIAL
+ select PL01X_SERIAL
help
Enable support for Nexell S5P4418 SoC.
diff --git a/arch/arm/mach-nexell/clock.c b/arch/arm/mach-nexell/clock.c
index 24fa204ccd..59ffa26255 100644
--- a/arch/arm/mach-nexell/clock.c
+++ b/arch/arm/mach-nexell/clock.c
@@ -856,7 +856,7 @@ void __init clk_init(void)
}
/* prevent uart clock disable for low step debug message */
- #ifndef CONFIG_DEBUG_NX_UART
+ #ifndef CONFIG_DEBUG_UART
if (peri->dev_name) {
#ifdef CONFIG_BACKLIGHT_PWM
if (!strcmp(peri->dev_name, DEV_NAME_PWM))
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index 3a8eee7b84..c570fb3294 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -12,6 +12,7 @@ config ARCH_UNIPHIER_V7_MULTI
select ARMV7_NONSEC
select CPU_V7A
select CPU_V7_HAS_NONSEC
+ select ARM_GLOBAL_TIMER if TIMER
config ARCH_UNIPHIER_V8_MULTI
bool "UniPhier V8 SoCs"
diff --git a/arch/arm/mach-uniphier/arm32/Makefile b/arch/arm/mach-uniphier/arm32/Makefile
index 3cd00b7e5e..b41aba7e29 100644
--- a/arch/arm/mach-uniphier/arm32/Makefile
+++ b/arch/arm/mach-uniphier/arm32/Makefile
@@ -8,5 +8,3 @@ obj-y += late_lowlevel_init.o
obj-y += cache-uniphier.o
obj-$(CONFIG_ARMV7_PSCI) += psci.o psci_smp.o
endif
-
-obj-y += timer.o
diff --git a/arch/arm/mach-uniphier/arm32/timer.c b/arch/arm/mach-uniphier/arm32/timer.c
deleted file mode 100644
index 58247c2738..0000000000
--- a/arch/arm/mach-uniphier/arm32/timer.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- */
-
-#include <config.h>
-#include <init.h>
-#include <linux/io.h>
-
-#include "arm-mpcore.h"
-
-#define PERIPHCLK (50 * 1000 * 1000) /* 50 MHz */
-#define PRESCALER ((PERIPHCLK) / (CFG_SYS_TIMER_RATE) - 1)
-
-static void *get_global_timer_base(void)
-{
- void *val;
-
- asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (val) : : "memory");
-
- return val + GLOBAL_TIMER_OFFSET;
-}
-
-unsigned long timer_read_counter(void)
-{
- /*
- * ARM 64bit Global Timer is too much for our purpose.
- * We use only lower 32 bit of the timer counter.
- */
- return readl(get_global_timer_base() + GTIMER_CNT_L);
-}
-
-int timer_init(void)
-{
- /* enable timer */
- writel(PRESCALER << 8 | 1, get_global_timer_base() + GTIMER_CTRL);
-
- return 0;
-}
generated by cgit v1.2.3 (git 2.39.1) at 2025-06-01 10:11:15 +0000