5 files changed, 25 insertions, 3 deletions
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index b19ed2c6b3..54027ccb0e 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -5,9 +5,11 @@ config FEROCEON_88FR131
 
 config KW88F6192
 	bool
+	select ARCH_VERY_EARLY_INIT
 
 config KW88F6281
 	bool
+	select ARCH_VERY_EARLY_INIT
 
 config SHEEVA_88SV131
 	bool
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index 3b2eef8d54..0fb5a2326f 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -6,6 +6,7 @@
 
 obj-y	= cpu.o
 obj-y	+= cache.o
+obj-y	+= lowlevel.o
 obj-y	+= mpp.o
 
 # cpu.o and cache.o contain CP15 instructions which cannot be run in
diff --git a/arch/arm/mach-kirkwood/cpu.c b/arch/arm/mach-kirkwood/cpu.c
index df3e8f1178..2b493b36c2 100644
--- a/arch/arm/mach-kirkwood/cpu.c
+++ b/arch/arm/mach-kirkwood/cpu.c
@@ -189,9 +189,6 @@ int arch_cpu_init(void)
 	struct kwcpu_registers *cpureg =
 		(struct kwcpu_registers *)KW_CPU_REG_BASE;
 
-	/* Linux expects the internal registers to be at 0xf1000000 */
-	writel(KW_REGS_PHY_BASE, KW_OFFSET_REG);
-
 	/* Enable and invalidate L2 cache in write through mode */
 	writel(readl(&cpureg->l2_cfg) | 0x18, &cpureg->l2_cfg);
 	invalidate_l2_cache();
diff --git a/arch/arm/mach-kirkwood/lowlevel.S b/arch/arm/mach-kirkwood/lowlevel.S
new file mode 100644
index 0000000000..6810384954
--- /dev/null
+++ b/arch/arm/mach-kirkwood/lowlevel.S
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#include <config.h>
+#include <linux/linkage.h>
+
+ENTRY(arch_very_early_init)
+	/* Move internal registers from KW_OFFSET_REG to KW_REGS_PHY_BASE */
+	ldr	r0, =KW_REGS_PHY_BASE
+	ldr	r1, =KW_OFFSET_REG
+	str	r0, [r1]
+	bx	lr
+ENDPROC(arch_very_early_init)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index fb3cff43f7..1f0dbef1c6 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -423,6 +423,16 @@ config SECURED_MODE_CSK_INDEX
 	default 0
 	depends on SECURED_MODE_IMAGE
 
+config SF_DEFAULT_SPEED
+	int "Default speed for SPI flash in Hz"
+	default 10000000
+	depends on MVEBU_SPL_BOOT_DEVICE_SPI
+
+config SF_DEFAULT_MODE
+	hex "Default mode for SPI flash"
+	default 0x0
+	depends on MVEBU_SPL_BOOT_DEVICE_SPI
+
 source "board/solidrun/clearfog/Kconfig"
 source "board/kobol/helios4/Kconfig"