diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/Kconfig | 1 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/start.S | 8 | ||||
| -rw-r--r-- | arch/arm/dts/sama5d3.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/dts/sama5d4.dtsi | 12 |
4 files changed, 21 insertions, 12 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index fb1e38de0c..760e901364 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -532,6 +532,7 @@ choice config ARCH_AT91 bool "Atmel AT91" select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB + select SPL_SEPARATE_BSS if SPL config TARGET_EDB93XX bool "Support edb93xx" diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 99d126660d..002698b501 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -120,6 +120,7 @@ pie_fixup_done: mov x0, #3 << 20 msr cpacr_el1, x0 /* Enable FP/SIMD */ 0: + isb /* * Enable SMPEN bit for coherency. @@ -132,6 +133,7 @@ pie_fixup_done: mrs x0, S3_1_c15_c2_1 /* cpuectlr_el1 */ orr x0, x0, #0x40 msr S3_1_c15_c2_1, x0 + isb 1: #endif @@ -233,6 +235,7 @@ apply_a53_core_errata: /* Enable data cache clean as data cache clean/invalidate */ orr x0, x0, #1 << 44 msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */ + isb #endif b 0b @@ -247,6 +250,7 @@ apply_a57_core_errata: /* Disable write streaming no-allocate threshold */ orr x0, x0, #3 << 27 msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */ + isb #endif #ifdef CONFIG_ARM_ERRATA_826974 @@ -254,6 +258,7 @@ apply_a57_core_errata: /* Disable speculative load execution ahead of a DMB */ orr x0, x0, #1 << 59 msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */ + isb #endif #ifdef CONFIG_ARM_ERRATA_833471 @@ -263,6 +268,7 @@ apply_a57_core_errata: could impact performance. */ orr x0, x0, #1 << 38 msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */ + isb #endif #ifdef CONFIG_ARM_ERRATA_829520 @@ -273,6 +279,7 @@ apply_a57_core_errata: could impact performance. */ orr x0, x0, #1 << 4 msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */ + isb #endif #ifdef CONFIG_ARM_ERRATA_833069 @@ -280,6 +287,7 @@ apply_a57_core_errata: /* Disable Enable Invalidates of BTB bit */ and x0, x0, #0xE msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */ + isb #endif b 0b ENDPROC(apply_core_errata) diff --git a/arch/arm/dts/sama5d3.dtsi b/arch/arm/dts/sama5d3.dtsi index 7db66c5d50..6ed218eaad 100644 --- a/arch/arm/dts/sama5d3.dtsi +++ b/arch/arm/dts/sama5d3.dtsi @@ -1447,37 +1447,37 @@ atmel,nb-banks = <2>; }; - ep10: endpoint@10 { + ep10: endpoint@a { reg = <10>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; }; - ep11: endpoint@11 { + ep11: endpoint@b { reg = <11>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; }; - ep12: endpoint@12 { + ep12: endpoint@c { reg = <12>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; }; - ep13: endpoint@13 { + ep13: endpoint@d { reg = <13>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; }; - ep14: endpoint@14 { + ep14: endpoint@e { reg = <14>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; }; - ep15: endpoint@15 { + ep15: endpoint@f { reg = <15>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; diff --git a/arch/arm/dts/sama5d4.dtsi b/arch/arm/dts/sama5d4.dtsi index 8875d7ba76..e1df24cdbe 100644 --- a/arch/arm/dts/sama5d4.dtsi +++ b/arch/arm/dts/sama5d4.dtsi @@ -212,42 +212,42 @@ atmel,can-isoc; }; - ep10: endpoint@10 { + ep10: endpoint@a { reg = <10>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; atmel,can-isoc; }; - ep11: endpoint@11 { + ep11: endpoint@b { reg = <11>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; atmel,can-isoc; }; - ep12: endpoint@12 { + ep12: endpoint@c { reg = <12>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; atmel,can-isoc; }; - ep13: endpoint@13 { + ep13: endpoint@d { reg = <13>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; atmel,can-isoc; }; - ep14: endpoint@14 { + ep14: endpoint@e { reg = <14>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; atmel,can-isoc; }; - ep15: endpoint@15 { + ep15: endpoint@f { reg = <15>; atmel,fifo-size = <1024>; atmel,nb-banks = <2>; |