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Diffstat (limited to 'arch/arm/mach-imx/mx6')
-rw-r--r--arch/arm/mach-imx/mx6/Kconfig9
-rw-r--r--arch/arm/mach-imx/mx6/clock.c2
-rw-r--r--arch/arm/mach-imx/mx6/soc.c5
3 files changed, 14 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 3d72517fa1..0646b7369c 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -253,6 +253,14 @@ config TARGET_GE_BX50V3
depends on MX6Q
select BOARD_LATE_INIT
+config TARGET_GE_B1X5V2
+ bool "General Electric B1x5v2"
+ depends on MX6QDL
+ select BOARD_LATE_INIT
+ select DM
+ select DM_THERMAL
+ select SUPPORT_SPL
+
config TARGET_GW_VENTANA
bool "gw_ventana"
depends on MX6QDL
@@ -713,6 +721,7 @@ config SYS_SOC
default "mx6"
source "board/ge/bx50v3/Kconfig"
+source "board/ge/b1x5v2/Kconfig"
source "board/advantech/dms-ba16/Kconfig"
source "board/aristainetos/Kconfig"
source "board/armadeus/opos6uldev/Kconfig"
diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c
index fb5e5b6f05..cb9d629be4 100644
--- a/arch/arm/mach-imx/mx6/clock.c
+++ b/arch/arm/mach-imx/mx6/clock.c
@@ -1341,7 +1341,7 @@ int do_mx6_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
}
#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) || defined(CONFIG_MX6DL) || \
- defined(CONFIG_MX6S)
+ defined(CONFIG_MX6S) || defined(CONFIG_MX6QDL)
static void disable_ldb_di_clock_sources(void)
{
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index a636107410..f43a2460f9 100644
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
@@ -26,6 +26,9 @@
#include <imx_thermal.h>
#include <mmc.h>
+#define has_err007805() \
+ (is_mx6sl() || is_mx6dl() || is_mx6solo() || is_mx6ull())
+
struct scu_regs {
u32 ctrl;
u32 config;
@@ -469,7 +472,7 @@ int arch_cpu_init(void)
}
/* Set perclk to source from OSC 24MHz */
- if (is_mx6sl())
+ if (has_err007805())
setbits_le32(&ccm->cscmr1, MXC_CCM_CSCMR1_PER_CLK_SEL_MASK);
imx_wdog_disable_powerdown(); /* Disable PDE bit of WMCR register */