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Diffstat (limited to 'arch/arm/mach-imx/imx8m/soc.c')
-rw-r--r--arch/arm/mach-imx/imx8m/soc.c190
1 files changed, 172 insertions, 18 deletions
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index e6bc977fc8..36abb2e57f 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -105,6 +105,13 @@ static struct mm_region imx8m_mem_map[] = {
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
+ /* OCRAM_S */
+ .virt = 0x180000UL,
+ .phys = 0x180000UL,
+ .size = 0x8000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_OUTER_SHARE
+ }, {
/* TCM */
.virt = 0x7C0000UL,
.phys = 0x7C0000UL,
@@ -324,18 +331,30 @@ static u32 get_cpu_variant_type(u32 type)
} else if (type == MXC_CPU_IMX8MN) {
switch (value & 0x3) {
case 2:
- if (value & 0x1000000)
- return MXC_CPU_IMX8MNDL;
- else
+ if (value & 0x1000000) {
+ if (value & 0x10000000) /* MIPI DSI */
+ return MXC_CPU_IMX8MNUD;
+ else
+ return MXC_CPU_IMX8MNDL;
+ } else {
return MXC_CPU_IMX8MND;
+ }
case 3:
- if (value & 0x1000000)
- return MXC_CPU_IMX8MNSL;
- else
+ if (value & 0x1000000) {
+ if (value & 0x10000000) /* MIPI DSI */
+ return MXC_CPU_IMX8MNUS;
+ else
+ return MXC_CPU_IMX8MNSL;
+ } else {
return MXC_CPU_IMX8MNS;
+ }
default:
- if (value & 0x1000000)
- return MXC_CPU_IMX8MNL;
+ if (value & 0x1000000) {
+ if (value & 0x10000000) /* MIPI DSI */
+ return MXC_CPU_IMX8MNUQ;
+ else
+ return MXC_CPU_IMX8MNL;
+ }
break;
}
} else if (type == MXC_CPU_IMX8MP) {
@@ -398,7 +417,16 @@ u32 get_cpu_rev(void)
* 0xff0055aa is magic number for B1.
*/
if (readl((void __iomem *)(OCOTP_BASE_ADDR + 0x40)) == 0xff0055aa) {
- reg = CHIP_REV_2_1;
+ /*
+ * B2 uses same DIGPROG and OCOTP_READ_FUSE_DATA value with B1,
+ * so have to check ROM to distinguish them
+ */
+ rom_version = readl((void __iomem *)ROM_VERSION_B0);
+ rom_version &= 0xff;
+ if (rom_version == CHIP_REV_2_2)
+ reg = CHIP_REV_2_2;
+ else
+ reg = CHIP_REV_2_1;
} else {
rom_version =
readl((void __iomem *)ROM_VERSION_A0);
@@ -468,7 +496,7 @@ int arch_cpu_init(void)
if (is_imx8md() || is_imx8mmd() || is_imx8mmdl() || is_imx8mms() ||
is_imx8mmsl() || is_imx8mnd() || is_imx8mndl() || is_imx8mns() ||
- is_imx8mnsl() || is_imx8mpd()) {
+ is_imx8mnsl() || is_imx8mpd() || is_imx8mnud() || is_imx8mnus()) {
/* Power down cpu core 1, 2 and 3 for iMX8M Dual core or Single core */
struct pgc_reg *pgc_core1 = (struct pgc_reg *)(GPC_BASE_ADDR + 0x840);
struct pgc_reg *pgc_core2 = (struct pgc_reg *)(GPC_BASE_ADDR + 0x880);
@@ -477,7 +505,7 @@ int arch_cpu_init(void)
writel(0x1, &pgc_core2->pgcr);
writel(0x1, &pgc_core3->pgcr);
- if (is_imx8mms() || is_imx8mmsl() || is_imx8mns() || is_imx8mnsl()) {
+ if (is_imx8mms() || is_imx8mmsl() || is_imx8mns() || is_imx8mnsl() || is_imx8mnus()) {
writel(0x1, &pgc_core1->pgcr);
writel(0xE, &gpc->cpu_pgc_dn_trg);
} else {
@@ -616,7 +644,8 @@ static int disable_mipi_dsi_nodes(void *blob)
"/mipi_dsi_bridge@30A00000",
"/dsi_phy@30A00300",
"/soc@0/bus@30800000/mipi_dsi@30a00000",
- "/soc@0/bus@30800000/dphy@30a00300"
+ "/soc@0/bus@30800000/dphy@30a00300",
+ "/soc@0/bus@30800000/mipi-dsi@30a00000",
};
return disable_fdt_nodes(blob, nodes_path, ARRAY_SIZE(nodes_path));
@@ -644,7 +673,8 @@ static int check_mipi_dsi_nodes(void *blob)
{
static const char * const lcdif_path[] = {
"/lcdif@30320000",
- "/soc@0/bus@30000000/lcdif@30320000"
+ "/soc@0/bus@30000000/lcdif@30320000",
+ "/soc@0/bus@30000000/lcd-controller@30320000"
};
static const char * const mipi_dsi_path[] = {
"/mipi_dsi@30A00000",
@@ -652,11 +682,13 @@ static int check_mipi_dsi_nodes(void *blob)
};
static const char * const lcdif_ep_path[] = {
"/lcdif@30320000/port@0/mipi-dsi-endpoint",
- "/soc@0/bus@30000000/lcdif@30320000/port@0/endpoint"
+ "/soc@0/bus@30000000/lcdif@30320000/port@0/endpoint",
+ "/soc@0/bus@30000000/lcd-controller@30320000/port@0/endpoint"
};
static const char * const mipi_dsi_ep_path[] = {
"/mipi_dsi@30A00000/port@1/endpoint",
- "/soc@0/bus@30800000/mipi_dsi@30a00000/ports/port@0/endpoint"
+ "/soc@0/bus@30800000/mipi_dsi@30a00000/ports/port@0/endpoint",
+ "/soc@0/bus@30800000/mipi-dsi@30a00000/ports/port@0/endpoint@0"
};
int lookup_node;
@@ -726,10 +758,46 @@ int disable_vpu_nodes(void *blob)
return -EPERM;
}
+#ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
+static int low_drive_gpu_freq(void *blob)
+{
+ static const char *nodes_path_8mn[] = {
+ "/gpu@38000000",
+ "/soc@0/gpu@38000000"
+ };
+
+ int nodeoff, cnt, i;
+ u32 assignedclks[7];
+
+ nodeoff = fdt_path_offset(blob, nodes_path_8mn[0]);
+ if (nodeoff < 0)
+ return nodeoff;
+
+ cnt = fdtdec_get_int_array_count(blob, nodeoff, "assigned-clock-rates", assignedclks, 7);
+ if (cnt < 0)
+ return cnt;
+
+ if (cnt != 7)
+ printf("Warning: %s, assigned-clock-rates count %d\n", nodes_path_8mn[0], cnt);
+
+ assignedclks[cnt - 1] = 200000000;
+ assignedclks[cnt - 2] = 200000000;
+
+ for (i = 0; i < cnt; i++) {
+ debug("<%u>, ", assignedclks[i]);
+ assignedclks[i] = cpu_to_fdt32(assignedclks[i]);
+ }
+ debug("\n");
+
+ return fdt_setprop(blob, nodeoff, "assigned-clock-rates", &assignedclks, sizeof(assignedclks));
+}
+#endif
+
int disable_gpu_nodes(void *blob)
{
static const char * const nodes_path_8mn[] = {
- "/gpu@38000000"
+ "/gpu@38000000",
+ "/soc@/gpu@38000000"
};
return disable_fdt_nodes(blob, nodes_path_8mn, ARRAY_SIZE(nodes_path_8mn));
@@ -763,6 +831,79 @@ int disable_dsp_nodes(void *blob)
return disable_fdt_nodes(blob, nodes_path_8mp, ARRAY_SIZE(nodes_path_8mp));
}
+static void disable_thermal_cpu_nodes(void *blob, u32 disabled_cores)
+{
+ static const char * const thermal_path[] = {
+ "/thermal-zones/cpu-thermal/cooling-maps/map0"
+ };
+
+ int nodeoff, cnt, i, ret, j;
+ u32 cooling_dev[12];
+
+ for (i = 0; i < ARRAY_SIZE(thermal_path); i++) {
+ nodeoff = fdt_path_offset(blob, thermal_path[i]);
+ if (nodeoff < 0)
+ continue; /* Not found, skip it */
+
+ cnt = fdtdec_get_int_array_count(blob, nodeoff, "cooling-device", cooling_dev, 12);
+ if (cnt < 0)
+ continue;
+
+ if (cnt != 12)
+ printf("Warning: %s, cooling-device count %d\n", thermal_path[i], cnt);
+
+ for (j = 0; j < cnt; j++)
+ cooling_dev[j] = cpu_to_fdt32(cooling_dev[j]);
+
+ ret = fdt_setprop(blob, nodeoff, "cooling-device", &cooling_dev,
+ sizeof(u32) * (12 - disabled_cores * 3));
+ if (ret < 0) {
+ printf("Warning: %s, cooling-device setprop failed %d\n",
+ thermal_path[i], ret);
+ continue;
+ }
+
+ printf("Update node %s, cooling-device prop\n", thermal_path[i]);
+ }
+}
+
+static void disable_pmu_cpu_nodes(void *blob, u32 disabled_cores)
+{
+ static const char * const pmu_path[] = {
+ "/pmu"
+ };
+
+ int nodeoff, cnt, i, ret, j;
+ u32 irq_affinity[4];
+
+ for (i = 0; i < ARRAY_SIZE(pmu_path); i++) {
+ nodeoff = fdt_path_offset(blob, pmu_path[i]);
+ if (nodeoff < 0)
+ continue; /* Not found, skip it */
+
+ cnt = fdtdec_get_int_array_count(blob, nodeoff, "interrupt-affinity",
+ irq_affinity, 4);
+ if (cnt < 0)
+ continue;
+
+ if (cnt != 4)
+ printf("Warning: %s, interrupt-affinity count %d\n", pmu_path[i], cnt);
+
+ for (j = 0; j < cnt; j++)
+ irq_affinity[j] = cpu_to_fdt32(irq_affinity[j]);
+
+ ret = fdt_setprop(blob, nodeoff, "interrupt-affinity", &irq_affinity,
+ sizeof(u32) * (4 - disabled_cores));
+ if (ret < 0) {
+ printf("Warning: %s, interrupt-affinity setprop failed %d\n",
+ pmu_path[i], ret);
+ continue;
+ }
+
+ printf("Update node %s, interrupt-affinity prop\n", pmu_path[i]);
+ }
+}
+
static int disable_cpu_nodes(void *blob, u32 disabled_cores)
{
static const char * const nodes_path[] = {
@@ -795,6 +936,9 @@ static int disable_cpu_nodes(void *blob, u32 disabled_cores)
}
}
+ disable_thermal_cpu_nodes(blob, disabled_cores);
+ disable_pmu_cpu_nodes(blob, disabled_cores);
+
return 0;
}
@@ -895,10 +1039,20 @@ usb_modify_speed:
#elif defined(CONFIG_IMX8MN)
if (is_imx8mnl() || is_imx8mndl() || is_imx8mnsl())
disable_gpu_nodes(blob);
+#ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
+ else {
+ int ldm_gpu = low_drive_gpu_freq(blob);
+
+ if (ldm_gpu < 0)
+ printf("Update GPU node assigned-clock-rates failed\n");
+ else
+ printf("Update GPU node assigned-clock-rates ok\n");
+ }
+#endif
- if (is_imx8mnd() || is_imx8mndl())
+ if (is_imx8mnd() || is_imx8mndl() || is_imx8mnud())
disable_cpu_nodes(blob, 2);
- else if (is_imx8mns() || is_imx8mnsl())
+ else if (is_imx8mns() || is_imx8mnsl() || is_imx8mnus())
disable_cpu_nodes(blob, 3);
#elif defined(CONFIG_IMX8MP)
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-23 05:03:48 +0000