diff options
Diffstat (limited to 'arch/arm/dts')
23 files changed, 1231 insertions, 131 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 4569483d5f..96066a2b6b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -776,6 +776,8 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \ sun8i-s3-pinecube.dtb \ sun8i-v3-sl631-imx179.dtb \ sun8i-v3s-licheepi-zero.dtb +dtb-$(CONFIG_MACH_SUN8I_R528) += \ + sun8i-t113s-mangopi-mq-r-t113.dtb dtb-$(CONFIG_MACH_SUN50I_H5) += \ sun50i-h5-bananapi-m2-plus.dtb \ sun50i-h5-emlid-neutis-n5-devboard.dtb \ @@ -1232,6 +1234,9 @@ dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \ dtb-$(CONFIG_TARGET_SAMA5D27_WLSOM1_EK) += \ at91-sama5d27_wlsom1_ek.dtb +dtb-$(CONFIG_TARGET_KSTR_SAMA5D27) += \ + at91-kstr-sama5d27.dtb + dtb-$(CONFIG_TARGET_SAMA5D2_ICP) += \ at91-sama5d2_icp.dtb diff --git a/arch/arm/dts/at91-kstr-sama5d27-u-boot.dtsi b/arch/arm/dts/at91-kstr-sama5d27-u-boot.dtsi new file mode 100644 index 0000000000..cec35ab621 --- /dev/null +++ b/arch/arm/dts/at91-kstr-sama5d27-u-boot.dtsi @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * at91-kstr-sama5d27-u-boot.dtsi - Device Tree Include file w/ U-Boot specific + * properties for Conclusive KSTR-SAMA5D27 board + * + * Copyright (C) 2023 Conclusive Engineering Sp. z o. o. + * + */ + +/ { + chosen { + bootph-all; + }; +}; + +&sdmmc0 { + bootph-all; +}; + +&uart1 { + bootph-all; +}; + +&pinctrl_uart1_default { + bootph-all; +}; + +&pinctrl_macb0_phy_irq { + bootph-all; +}; + +&pinctrl_macb0_rmii { + bootph-all; +}; + +&pinctrl_sdmmc0_cmd_dat_default { + bootph-all; +}; + +&pinctrl_sdmmc0_ck_cd_default { + bootph-all; +}; diff --git a/arch/arm/dts/at91-kstr-sama5d27.dts b/arch/arm/dts/at91-kstr-sama5d27.dts new file mode 100644 index 0000000000..c226a214a5 --- /dev/null +++ b/arch/arm/dts/at91-kstr-sama5d27.dts @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * at91-kstr-sama5d27.dts - Device Tree file for Conclusive KSTR-SAMA5D27 board + * + * Copyright (C) 2019-2023 Conclusive Engineering Sp. z o. o. + * + */ +/dts-v1/; + +#include "sama5d2.dtsi" +#include "sama5d2-pinfunc.h" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/mfd/atmel-flexcom.h> + +/ { + model = "Conclusive KSTR-SAMA5D27"; + compatible = "conclusive,kstr-sama5d27", "atmel,sama5d2", "atmel,sama5"; + + chosen { + stdout-path = &uart1; + }; + + aliases { + i2c2 = &i2c6; + }; +}; + +&main_xtal { + clock-frequency = <12000000>; +}; + +&sdmmc0 { + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; + status = "okay"; +}; + +&macb0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>; + phy-mode = "rmii"; + status = "okay"; + + ethernet-phy@0 { + reg = <0x0>; + reset-gpios = <&pioA 44 GPIO_ACTIVE_LOW>; + }; +}; + +&flx4 { + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; + status = "okay"; +}; + +&i2c6 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flx4_i2c>; + status = "okay"; + + eeprom: eeprom@50 { + compatible = "microchip,24c32", "atmel,24c32"; + reg = <0x50>; + read-only; + pagesize = <32>; + status = "okay"; + }; +}; + +&pioA { + pinctrl { + pinctrl_uart1_default: uart1_default { + pinmux = <PIN_PD2__URXD1>, + <PIN_PD3__UTXD1>; + bias-disable; + }; + + pinctrl_macb0_phy_irq: macb0_phy_irq { + pinmux = <PIN_PB13__GPIO>; + bias-disable; + }; + + pinctrl_macb0_rmii: macb0_rmii { + pinmux = <PIN_PB14__GTXCK>, + <PIN_PB15__GTXEN>, + <PIN_PB16__GRXDV>, + <PIN_PB17__GRXER>, + <PIN_PB18__GRX0>, + <PIN_PB19__GRX1>, + <PIN_PB20__GTX0>, + <PIN_PB21__GTX1>, + <PIN_PB22__GMDC>, + <PIN_PB23__GMDIO>; + bias-disable; + }; + + pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default { + pinmux = <PIN_PA1__SDMMC0_CMD>, + <PIN_PA2__SDMMC0_DAT0>, + <PIN_PA3__SDMMC0_DAT1>, + <PIN_PA4__SDMMC0_DAT2>, + <PIN_PA5__SDMMC0_DAT3>; + bias-pull-up; + }; + + pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default { + pinmux = <PIN_PA0__SDMMC0_CK>, + <PIN_PA11__SDMMC0_VDDSEL>, + <PIN_PA13__SDMMC0_CD>; + bias-disable; + }; + + pinctrl_flx4_i2c: flx4_i2c { + pinmux = <PIN_PC28__FLEXCOM4_IO0>, + <PIN_PC29__FLEXCOM4_IO1>; + bias-disable; + }; + }; +}; diff --git a/arch/arm/dts/axp209.dtsi b/arch/arm/dts/axp209.dtsi index ca240cd6f6..469d0f7d51 100644 --- a/arch/arm/dts/axp209.dtsi +++ b/arch/arm/dts/axp209.dtsi @@ -48,6 +48,13 @@ * http://dl.linux-sunxi.org/AXP/AXP209%20Datasheet%20v1.0_cn.pdf */ +/ { + pmic-temp { + compatible = "iio-hwmon"; + io-channels = <&axp_adc 4>; /* Internal temperature */ + }; +}; + &axp209 { compatible = "x-powers,axp209"; interrupt-controller; diff --git a/arch/arm/dts/meson-a1.dtsi b/arch/arm/dts/meson-a1.dtsi index e3a42c5b24..648e7f4942 100644 --- a/arch/arm/dts/meson-a1.dtsi +++ b/arch/arm/dts/meson-a1.dtsi @@ -3,9 +3,13 @@ * Copyright (c) 2019 Amlogic, Inc. All rights reserved. */ -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/clock/amlogic,a1-pll-clkc.h> +#include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h> #include <dt-bindings/gpio/meson-a1-gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/power/meson-a1-power.h> +#include <dt-bindings/reset/amlogic,meson-a1-reset.h> / { compatible = "amlogic,a1"; @@ -37,9 +41,19 @@ l2: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; }; }; + efuse: efuse { + compatible = "amlogic,meson-gxbb-efuse"; + clocks = <&clkc_periphs CLKID_OTP>; + #address-cells = <1>; + #size-cells = <1>; + secure-monitor = <&sm>; + power-domains = <&pwrc PWRC_OTP_ID>; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -65,7 +79,6 @@ pwrc: power-controller { compatible = "amlogic,meson-a1-pwrc"; #power-domain-cells = <1>; - status = "okay"; }; }; @@ -75,6 +88,16 @@ #size-cells = <2>; ranges; + spifc: spi@fd000400 { + compatible = "amlogic,a1-spifc"; + reg = <0x0 0xfd000400 0x0 0x290>; + clocks = <&clkc_periphs CLKID_SPIFC>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&pwrc PWRC_SPIFC_ID>; + status = "disabled"; + }; + apb: bus@fe000000 { compatible = "simple-bus"; reg = <0x0 0xfe000000 0x0 0x1000000>; @@ -103,10 +126,200 @@ gpio-ranges = <&periphs_pinctrl 0 0 62>; }; + i2c0_f11_pins: i2c0-f11 { + mux { + groups = "i2c0_sck_f11", + "i2c0_sda_f12"; + function = "i2c0"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c0_f9_pins: i2c0-f9 { + mux { + groups = "i2c0_sck_f9", + "i2c0_sda_f10"; + function = "i2c0"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_x_pins: i2c1-x { + mux { + groups = "i2c1_sck_x", + "i2c1_sda_x"; + function = "i2c1"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c1_a_pins: i2c1-a { + mux { + groups = "i2c1_sck_a", + "i2c1_sda_a"; + function = "i2c1"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c2_x0_pins: i2c2-x0 { + mux { + groups = "i2c2_sck_x0", + "i2c2_sda_x1"; + function = "i2c2"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c2_x15_pins: i2c2-x15 { + mux { + groups = "i2c2_sck_x15", + "i2c2_sda_x16"; + function = "i2c2"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c2_a4_pins: i2c2-a4 { + mux { + groups = "i2c2_sck_a4", + "i2c2_sda_a5"; + function = "i2c2"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c2_a8_pins: i2c2-a8 { + mux { + groups = "i2c2_sck_a8", + "i2c2_sda_a9"; + function = "i2c2"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c3_x_pins: i2c3-x { + mux { + groups = "i2c3_sck_x", + "i2c3_sda_x"; + function = "i2c3"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + i2c3_f_pins: i2c3-f { + mux { + groups = "i2c3_sck_f", + "i2c3_sda_f"; + function = "i2c3"; + bias-pull-up; + drive-strength-microamp = <3000>; + }; + }; + + uart_a_pins: uart-a { + mux { + groups = "uart_a_tx", + "uart_a_rx"; + function = "uart_a"; + }; + }; + + uart_a_cts_rts_pins: uart-a-cts-rts { + mux { + groups = "uart_a_cts", + "uart_a_rts"; + function = "uart_a"; + bias-pull-down; + }; + }; + + sdio_pins: sdio { + mux0 { + groups = "sdcard_d0_x", + "sdcard_d1_x", + "sdcard_d2_x", + "sdcard_d3_x", + "sdcard_cmd_x"; + function = "sdcard"; + bias-pull-up; + }; + + mux1 { + groups = "sdcard_clk_x"; + function = "sdcard"; + bias-disable; + }; + }; + + sdio_clk_gate_pins: sdio-clk-gate { + mux { + groups = "sdcard_clk_x"; + function = "sdcard"; + bias-pull-down; + }; + }; + + spifc_pins: spifc { + mux { + groups = "spif_mo", + "spif_mi", + "spif_clk", + "spif_cs", + "spif_hold_n", + "spif_wp_n"; + function = "spif"; + }; + }; + }; + + gpio_intc: interrupt-controller@440 { + compatible = "amlogic,meson-a1-gpio-intc", + "amlogic,meson-gpio-intc"; + reg = <0x0 0x0440 0x0 0x14>; + interrupt-controller; + #interrupt-cells = <2>; + amlogic,channel-interrupts = + <49 50 51 52 53 54 55 56>; + }; + + clkc_periphs: clock-controller@800 { + compatible = "amlogic,a1-peripherals-clkc"; + reg = <0 0x800 0 0x104>; + #clock-cells = <1>; + clocks = <&clkc_pll CLKID_FCLK_DIV2>, + <&clkc_pll CLKID_FCLK_DIV3>, + <&clkc_pll CLKID_FCLK_DIV5>, + <&clkc_pll CLKID_FCLK_DIV7>, + <&clkc_pll CLKID_HIFI_PLL>, + <&xtal>; + clock-names = "fclk_div2", "fclk_div3", + "fclk_div5", "fclk_div7", + "hifi_pll", "xtal"; + }; + + i2c0: i2c@1400 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x1400 0x0 0x20>; + interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc_periphs CLKID_I2C_M_A>; + power-domains = <&pwrc PWRC_I2C_ID>; }; uart_AO: serial@1c00 { - compatible = "amlogic,meson-gx-uart", + compatible = "amlogic,meson-a1-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x1c00 0x0 0x18>; interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>; @@ -116,7 +329,7 @@ }; uart_AO_B: serial@2000 { - compatible = "amlogic,meson-gx-uart", + compatible = "amlogic,meson-a1-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x2000 0x0 0x18>; interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; @@ -125,9 +338,70 @@ status = "disabled"; }; + saradc: adc@2c00 { + compatible = "amlogic,meson-g12a-saradc", + "amlogic,meson-saradc"; + reg = <0x0 0x2c00 0x0 0x48>; + #io-channel-cells = <1>; + power-domains = <&pwrc PWRC_I2C_ID>; + interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>, + <&clkc_periphs CLKID_SARADC_EN>, + <&clkc_periphs CLKID_SARADC>, + <&clkc_periphs CLKID_SARADC_SEL>; + clock-names = "clkin", "core", + "adc_clk", "adc_sel"; + status = "disabled"; + }; + + i2c1: i2c@5c00 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x5c00 0x0 0x20>; + interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc_periphs CLKID_I2C_M_B>; + power-domains = <&pwrc PWRC_I2C_ID>; + }; + + i2c2: i2c@6800 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x6800 0x0 0x20>; + interrupts = <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc_periphs CLKID_I2C_M_C>; + power-domains = <&pwrc PWRC_I2C_ID>; + }; + + i2c3: i2c@6c00 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x6c00 0x0 0x20>; + interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc_periphs CLKID_I2C_M_D>; + power-domains = <&pwrc PWRC_I2C_ID>; + }; + + usb2_phy1: phy@4000 { + compatible = "amlogic,a1-usb2-phy"; + clocks = <&clkc_periphs CLKID_USB_PHY_IN>; + clock-names = "xtal"; + reg = <0x0 0x4000 0x0 0x60>; + resets = <&reset RESET_USBPHY>; + reset-names = "phy"; + #phy-cells = <0>; + power-domains = <&pwrc PWRC_USB_ID>; + }; + hwrng: rng@5118 { compatible = "amlogic,meson-rng"; reg = <0x0 0x5118 0x0 0x4>; + power-domains = <&pwrc PWRC_OTP_ID>; }; sec_AO: ao-secure@5a20 { @@ -135,6 +409,78 @@ reg = <0x0 0x5a20 0x0 0x140>; amlogic,has-chip-id; }; + + clkc_pll: pll-clock-controller@7c80 { + compatible = "amlogic,a1-pll-clkc"; + reg = <0 0x7c80 0 0x18c>; + #clock-cells = <1>; + clocks = <&clkc_periphs CLKID_FIXPLL_IN>, + <&clkc_periphs CLKID_HIFIPLL_IN>; + clock-names = "fixpll_in", "hifipll_in"; + }; + + sd_emmc: sd@10000 { + compatible = "amlogic,meson-axg-mmc"; + reg = <0x0 0x10000 0x0 0x800>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clkc_periphs CLKID_SD_EMMC_A>, + <&clkc_periphs CLKID_SD_EMMC>, + <&clkc_pll CLKID_FCLK_DIV2>; + clock-names = "core", + "clkin0", + "clkin1"; + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_SEL2>; + assigned-clock-parents = <&xtal>; + resets = <&reset RESET_SD_EMMC_A>; + power-domains = <&pwrc PWRC_SD_EMMC_ID>; + status = "disabled"; + }; + }; + + usb: usb@fe004400 { + status = "disabled"; + compatible = "amlogic,meson-a1-usb-ctrl"; + reg = <0x0 0xfe004400 0x0 0xa0>; + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&clkc_periphs CLKID_USB_CTRL>, + <&clkc_periphs CLKID_USB_BUS>, + <&clkc_periphs CLKID_USB_CTRL_IN>; + clock-names = "usb_ctrl", "usb_bus", "xtal_usb_ctrl"; + resets = <&reset RESET_USBCTRL>; + reset-name = "usb_ctrl"; + + dr_mode = "otg"; + + phys = <&usb2_phy1>; + phy-names = "usb2-phy1"; + + dwc3: usb@ff400000 { + compatible = "snps,dwc3"; + reg = <0x0 0xff400000 0x0 0x100000>; + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; + dr_mode = "host"; + snps,dis_u2_susphy_quirk; + snps,quirk-frame-length-adjustment = <0x20>; + snps,parkmode-disable-ss-quirk; + }; + + dwc2: usb@ff500000 { + compatible = "amlogic,meson-a1-usb", "snps,dwc2"; + reg = <0x0 0xff500000 0x0 0x40000>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usb2_phy1>; + phy-names = "usb2-phy"; + clocks = <&clkc_periphs CLKID_USB_PHY>; + clock-names = "otg"; + dr_mode = "peripheral"; + g-rx-fifo-size = <192>; + g-np-tx-fifo-size = <128>; + g-tx-fifo-size = <128 128 16 16 16>; + }; }; gic: interrupt-controller@ff901000 { diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi index dd6468ed96..819564fdd5 100644 --- a/arch/arm/dts/sama5d2.dtsi +++ b/arch/arm/dts/sama5d2.dtsi @@ -781,6 +781,26 @@ status = "disabled"; }; + flx4: flexcom@fc018000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xfc018000 0x200>; + clocks = <&flx4_clk>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xfc018000 0x800>; + status = "disabled"; + + i2c6: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&flx4_clk>; + clock-names = "i2c6_clk"; + status = "disabled"; + }; + }; + aic: interrupt-controller@fc020000 { #interrupt-cells = <3>; compatible = "atmel,sama5d2-aic"; diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi index 135762b34f..2240eaec5d 100644 --- a/arch/arm/dts/sun50i-a64.dtsi +++ b/arch/arm/dts/sun50i-a64.dtsi @@ -93,6 +93,7 @@ L2: l2-cache { compatible = "cache"; cache-level = <2>; + cache-unified; }; }; @@ -407,7 +408,7 @@ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; reset-names = "lcd", "lvds"; diff --git a/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts b/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts index 686f58e770..b710f1a0f5 100644 --- a/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts +++ b/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2019 Corentin LABBE <clabbe@baylibre.com> */ diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi b/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi new file mode 100644 index 0000000000..15290e6892 --- /dev/null +++ b/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2020 Arm Ltd. + * + * DT nodes common between Orange Pi Zero 2 and Orange Pi Zero 3. + * Excludes PMIC nodes and properties, since they are different between the two. + */ + +#include "sun50i-h616.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/leds/common.h> + +/ { + aliases { + ethernet0 = &emac0; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + function = LED_FUNCTION_POWER; + color = <LED_COLOR_ID_RED>; + gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ + default-state = "on"; + }; + + led-1 { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_GREEN>; + gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ + }; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply directly from the USB-C socket */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_usb1_vbus: regulator-usb1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb1-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <®_vcc5v>; + enable-active-high; + gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ + }; +}; + +&ehci1 { + status = "okay"; +}; + +/* USB 2 & 3 are on headers only. */ + +&emac0 { + pinctrl-names = "default"; + pinctrl-0 = <&ext_rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; + allwinner,rx-delay-ps = <3100>; + allwinner,tx-delay-ps = <700>; + status = "okay"; +}; + +&mdio0 { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&mmc0 { + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + bus-width = <4>; + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; + status = "okay"; +}; + +&usbotg { + /* + * PHY0 pins are connected to a USB-C socket, but a role switch + * is not implemented: both CC pins are pulled to GND. + * The VBUS pins power the device, so a fixed peripheral mode + * is the best choice. + * The board can be powered via GPIOs, in this case port0 *can* + * act as a host (with a cable/adapter ignoring CC), as VBUS is + * then provided by the GPIOs. Any user of this setup would + * need to adjust the DT accordingly: dr_mode set to "host", + * enabling OHCI0 and EHCI0. + */ + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts index cb8600d0ea..d83852e72f 100644 --- a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts +++ b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts @@ -1,99 +1,23 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2020 Arm Ltd. */ /dts-v1/; -#include "sun50i-h616.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/leds/common.h> +#include "sun50i-h616-orangepi-zero.dtsi" / { model = "OrangePi Zero2"; compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; - - aliases { - ethernet0 = &emac0; - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - - led-0 { - function = LED_FUNCTION_POWER; - color = <LED_COLOR_ID_RED>; - gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ - default-state = "on"; - }; - - led-1 { - function = LED_FUNCTION_STATUS; - color = <LED_COLOR_ID_GREEN>; - gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ - }; - }; - - reg_vcc5v: vcc5v { - /* board wide 5V supply directly from the USB-C socket */ - compatible = "regulator-fixed"; - regulator-name = "vcc-5v"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; - - reg_usb1_vbus: regulator-usb1-vbus { - compatible = "regulator-fixed"; - regulator-name = "usb1-vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <®_vcc5v>; - enable-active-high; - gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ - }; }; -&ehci1 { - status = "okay"; -}; - -/* USB 2 & 3 are on headers only. */ - &emac0 { - pinctrl-names = "default"; - pinctrl-0 = <&ext_rgmii_pins>; - phy-mode = "rgmii"; - phy-handle = <&ext_rgmii_phy>; phy-supply = <®_dcdce>; - allwinner,rx-delay-ps = <3100>; - allwinner,tx-delay-ps = <700>; - status = "okay"; -}; - -&mdio0 { - ext_rgmii_phy: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <1>; - }; }; &mmc0 { vmmc-supply = <®_dcdce>; - cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ - bus-width = <4>; - status = "okay"; -}; - -&ohci1 { - status = "okay"; }; &r_rsb { @@ -211,44 +135,3 @@ vcc-ph-supply = <®_aldo1>; vcc-pi-supply = <®_aldo1>; }; - -&spi0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; - - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <40000000>; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_ph_pins>; - status = "okay"; -}; - -&usbotg { - /* - * PHY0 pins are connected to a USB-C socket, but a role switch - * is not implemented: both CC pins are pulled to GND. - * The VBUS pins power the device, so a fixed peripheral mode - * is the best choice. - * The board can be powered via GPIOs, in this case port0 *can* - * act as a host (with a cable/adapter ignoring CC), as VBUS is - * then provided by the GPIOs. Any user of this setup would - * need to adjust the DT accordingly: dr_mode set to "host", - * enabling OHCI0 and EHCI0. - */ - dr_mode = "peripheral"; - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun50i-h616-x96-mate.dts b/arch/arm/dts/sun50i-h616-x96-mate.dts index 07424c28b6..959b6fd184 100644 --- a/arch/arm/dts/sun50i-h616-x96-mate.dts +++ b/arch/arm/dts/sun50i-h616-x96-mate.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2021 Arm Ltd. */ diff --git a/arch/arm/dts/sun50i-h618-orangepi-zero3.dts b/arch/arm/dts/sun50i-h618-orangepi-zero3.dts new file mode 100644 index 0000000000..00fe28caac --- /dev/null +++ b/arch/arm/dts/sun50i-h618-orangepi-zero3.dts @@ -0,0 +1,94 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2023 Arm Ltd. + */ + +/dts-v1/; + +#include "sun50i-h616-orangepi-zero.dtsi" + +/ { + model = "OrangePi Zero3"; + compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618"; +}; + +&emac0 { + phy-supply = <®_dldo1>; +}; + +&ext_rgmii_phy { + motorcomm,clk-out-frequency-hz = <125000000>; +}; + +&mmc0 { + /* + * The schematic shows the card detect pin wired up to PF6, via an + * inverter, but it just doesn't work. + */ + broken-cd; + vmmc-supply = <®_dldo1>; +}; + +&r_i2c { + status = "okay"; + + axp313: pmic@36 { + compatible = "x-powers,axp313a"; + reg = <0x36>; + #interrupt-cells = <1>; + interrupt-controller; + interrupt-parent = <&pio>; + interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */ + + vin1-supply = <®_vcc5v>; + vin2-supply = <®_vcc5v>; + vin3-supply = <®_vcc5v>; + + regulators { + /* Supplies VCC-PLL, so needs to be always on. */ + reg_aldo1: aldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8"; + }; + + /* Supplies VCC-IO, so needs to be always on. */ + reg_dldo1: dldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3"; + }; + + reg_dcdc1: dcdc1 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <990000>; + regulator-name = "vdd-gpu-sys"; + }; + + reg_dcdc2: dcdc2 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpu"; + }; + + reg_dcdc3: dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-dram"; + }; + }; + }; +}; + +&pio { + vcc-pc-supply = <®_dldo1>; + vcc-pf-supply = <®_dldo1>; + vcc-pg-supply = <®_aldo1>; + vcc-ph-supply = <®_dldo1>; + vcc-pi-supply = <®_dldo1>; +}; diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts index fd37bd1f39..4192c23848 100644 --- a/arch/arm/dts/sun5i-r8-chip.dts +++ b/arch/arm/dts/sun5i-r8-chip.dts @@ -255,6 +255,12 @@ pinctrl-0 = <&uart3_pg_pins>, <&uart3_cts_rts_pg_pins>; status = "okay"; + + bluetooth { + compatible = "realtek,rtl8723bs-bt"; + device-wake-gpios = <&axp_gpio 3 GPIO_ACTIVE_HIGH>; + host-wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ + }; }; &usb_otg { diff --git a/arch/arm/dts/sun5i.dtsi b/arch/arm/dts/sun5i.dtsi index 250d6b87ab..d7c7b454a1 100644 --- a/arch/arm/dts/sun5i.dtsi +++ b/arch/arm/dts/sun5i.dtsi @@ -286,7 +286,7 @@ clock-names = "ahb", "tcon-ch0", "tcon-ch1"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; status = "disabled"; @@ -517,6 +517,15 @@ bias-pull-up; }; + /omit-if-no-ref/ + mmc2_4bit_pe_pins: mmc2-4bit-pe-pins { + pins = "PE4", "PE5", "PE6", "PE7", + "PE8", "PE9"; + function = "mmc2"; + drive-strength = <30>; + bias-pull-up; + }; + mmc2_8bit_pins: mmc2-8bit-pins { pins = "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", diff --git a/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts b/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts new file mode 100644 index 0000000000..577ead1d02 --- /dev/null +++ b/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// Copyright (C) 2023 In-Circuit GmbH + +/dts-v1/; + +#include "sun7i-a20-icnova-a20.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> + +/ { + model = "In-Circuit ICnova A20 ADB4006"; + compatible = "incircuit,icnova-a20-adb4006", "incircuit,icnova-a20", + "allwinner,sun7i-a20"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + function = LED_FUNCTION_POWER; + color = <LED_COLOR_ID_YELLOW>; + gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* PH21 */ + default-state = "on"; + }; + + led-1 { + function = LED_FUNCTION_HEARTBEAT; + color = <LED_COLOR_ID_RED>; + gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* PH20 */ + linux,default-trigger = "heartbeat"; + }; + }; +}; + +&ahci { + target-supply = <®_ahci_5v>; + status = "okay"; +}; + +&codec { + status = "okay"; +}; + +&de { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&otg_sram { + status = "okay"; +}; + +®_ahci_5v { + status = "okay"; +}; + +&ac_power_supply { + status = "okay"; +}; + +®_usb1_vbus { + status = "okay"; +}; + +®_usb2_vbus { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun7i-a20-icnova-a20.dtsi b/arch/arm/dts/sun7i-a20-icnova-a20.dtsi new file mode 100644 index 0000000000..46616c6bc8 --- /dev/null +++ b/arch/arm/dts/sun7i-a20-icnova-a20.dtsi @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// Copyright (C) 2023 In-Circuit GmbH + +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/interrupt-controller/irq.h> + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_mii_pins>; + phy-handle = <&phy1>; + phy-mode = "mii"; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + axp209: pmic@34 { + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +#include "axp209.dtsi" + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi index 84c6d9379a..a0cac966af 100644 --- a/arch/arm/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/dts/sun8i-a23-a33.dtsi @@ -190,7 +190,7 @@ clock-names = "ahb", "tcon-ch0", "lvds-alt"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; resets = <&ccu RST_BUS_LCD>, <&ccu RST_BUS_LVDS>; diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi index 9c07660080..cc40622466 100644 --- a/arch/arm/dts/sun8i-a83t.dtsi +++ b/arch/arm/dts/sun8i-a83t.dtsi @@ -456,7 +456,7 @@ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; reset-names = "lcd", "lvds"; diff --git a/arch/arm/dts/sun8i-t113s-mangopi-mq-r-t113.dts b/arch/arm/dts/sun8i-t113s-mangopi-mq-r-t113.dts new file mode 100644 index 0000000000..8b3a753838 --- /dev/null +++ b/arch/arm/dts/sun8i-t113s-mangopi-mq-r-t113.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (C) 2022 Arm Ltd. + +#include <dt-bindings/interrupt-controller/irq.h> + +/dts-v1/; + +#include "sun8i-t113s.dtsi" +#include "sunxi-d1s-t113-mangopi-mq-r.dtsi" + +/ { + model = "MangoPi MQ-R-T113"; + compatible = "widora,mangopi-mq-r-t113", "allwinner,sun8i-t113s"; + + aliases { + ethernet0 = &rtl8189ftv; + }; +}; + +&cpu0 { + cpu-supply = <®_vcc_core>; +}; + +&cpu1 { + cpu-supply = <®_vcc_core>; +}; + +&mmc1 { + rtl8189ftv: wifi@1 { + reg = <1>; + interrupt-parent = <&pio>; + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 = WL_WAKE_AP */ + interrupt-names = "host-wake"; + }; +}; diff --git a/arch/arm/dts/sun8i-t113s.dtsi b/arch/arm/dts/sun8i-t113s.dtsi new file mode 100644 index 0000000000..b94b69142a --- /dev/null +++ b/arch/arm/dts/sun8i-t113s.dtsi @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (C) 2022 Arm Ltd. + +#define SOC_PERIPHERAL_IRQ(nr) GIC_SPI nr + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <../../riscv/dts/sunxi-d1s-t113.dtsi> +#include <../../riscv/dts/sunxi-d1-t113.dtsi> + +/ { + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; + }; + + cpu1: cpu@1 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <1>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; + }; + }; + + gic: interrupt-controller@1c81000 { + compatible = "arm,gic-400"; + reg = <0x03021000 0x1000>, + <0x03022000 0x2000>, + <0x03024000 0x2000>, + <0x03026000 0x2000>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + interrupt-controller; + #interrupt-cells = <3>; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + + pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>; + }; +}; diff --git a/arch/arm/dts/sun8i-v3s.dtsi b/arch/arm/dts/sun8i-v3s.dtsi index b001251644..3b9a282c27 100644 --- a/arch/arm/dts/sun8i-v3s.dtsi +++ b/arch/arm/dts/sun8i-v3s.dtsi @@ -191,7 +191,7 @@ <&ccu CLK_TCON0>; clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; resets = <&ccu RST_BUS_TCON0>; reset-names = "lcd"; diff --git a/arch/arm/dts/sunxi-d1s-t113-mangopi-mq-r.dtsi b/arch/arm/dts/sunxi-d1s-t113-mangopi-mq-r.dtsi new file mode 100644 index 0000000000..a415c4a78a --- /dev/null +++ b/arch/arm/dts/sunxi-d1s-t113-mangopi-mq-r.dtsi @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (C) 2022 Arm Ltd. +/* + * Common peripherals and configurations for MangoPi MQ-R boards. + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> + +/ { + aliases { + serial3 = &uart3; + }; + + chosen { + stdout-path = "serial3:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + color = <LED_COLOR_ID_BLUE>; + function = LED_FUNCTION_STATUS; + gpios = <&pio 3 22 GPIO_ACTIVE_LOW>; /* PD22 */ + }; + }; + + /* board wide 5V supply directly from the USB-C socket */ + reg_vcc5v: regulator-5v { + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + /* SY8008 DC/DC regulator on the board */ + reg_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <®_vcc5v>; + }; + + /* SY8008 DC/DC regulator on the board, also supplying VDD-SYS */ + reg_vcc_core: regulator-core { + compatible = "regulator-fixed"; + regulator-name = "vcc-core"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + vin-supply = <®_vcc5v>; + }; + + /* XC6206 LDO on the board */ + reg_avdd2v8: regulator-avdd { + compatible = "regulator-fixed"; + regulator-name = "avdd2v8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <®_3v3>; + }; + + wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */ + }; +}; + +&dcxo { + clock-frequency = <24000000>; +}; + +&ehci1 { + status = "okay"; +}; + +&mmc0 { + pinctrl-0 = <&mmc0_pins>; + pinctrl-names = "default"; + vmmc-supply = <®_3v3>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; + disable-wp; + bus-width = <4>; + status = "okay"; +}; + +&mmc1 { + pinctrl-0 = <&mmc1_pins>; + pinctrl-names = "default"; + vmmc-supply = <®_3v3>; + non-removable; + bus-width = <4>; + mmc-pwrseq = <&wifi_pwrseq>; + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + vcc-pb-supply = <®_3v3>; + vcc-pd-supply = <®_3v3>; + vcc-pe-supply = <®_avdd2v8>; + vcc-pf-supply = <®_3v3>; + vcc-pg-supply = <®_3v3>; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pb_pins>; + status = "okay"; +}; + +/* The USB-C socket has its CC pins pulled to GND, so is hardwired as a UFP. */ +&usb_otg { + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_vcc5v>; + status = "okay"; +}; diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi index af419c7e59..a0c8abb703 100644 --- a/arch/arm/dts/sunxi-u-boot.dtsi +++ b/arch/arm/dts/sunxi-u-boot.dtsi @@ -23,6 +23,13 @@ }; }; +/* Let U-Boot be the firmware layer that controls the watchdog. */ +#ifdef CONFIG_MACH_SUN8I_R528 +&wdt { + status = "okay"; +}; +#endif + &binman { u-boot-sunxi-with-spl { filename = "u-boot-sunxi-with-spl.bin"; |