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Diffstat (limited to 'README')
| -rw-r--r-- | README | 6 |
1 files changed, 0 insertions, 6 deletions
@@ -396,12 +396,6 @@ The following options need to be configured: Board config to use DDR3L. It can be enabled for SoCs with DDR3L controllers. - CONFIG_SYS_FSL_IFC_BE - Defines the IFC controller register space as Big Endian - - CONFIG_SYS_FSL_IFC_LE - Defines the IFC controller register space as Little Endian - CONFIG_SYS_FSL_IFC_CLK_DIV Defines divider of platform clock(clock input to IFC controller). |