diff options
109 files changed, 1353 insertions, 1029 deletions
@@ -327,7 +327,7 @@ config SPL_SYS_MALLOC_F_LEN malloc() region in SDRAM once it is inited. config TPL_SYS_MALLOC_F - bool "Enable malloc() pool in SPL" + bool "Enable malloc() pool in TPL" depends on SYS_MALLOC_F && TPL default y if SPL_SYS_MALLOC_F help diff --git a/MAINTAINERS b/MAINTAINERS index 7c1cb2dc4d..9f74c0aaca 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -667,11 +667,14 @@ F: drivers/video/sunxi/ F: tools/sunxi* ARM TEGRA -M: Tom Warren <twarren@nvidia.com> +M: Thierry Reding <treding@nvidia.com> +M: Svyatoslav Ryhel <clamor95@gmail.com> S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-tegra.git -F: arch/arm/mach-tegra/ +F: arch/arm/dts/tegra* F: arch/arm/include/asm/arch-tegra*/ +F: arch/arm/mach-tegra/ +F: drivers/*/tegra* ARM TI M: Tom Rini <trini@konsulko.com> @@ -3,7 +3,7 @@ VERSION = 2024 PATCHLEVEL = 01 SUBLEVEL = -EXTRAVERSION = -rc2 +EXTRAVERSION = -rc4 NAME = # *DOCUMENTATION* diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index cb1131a048..697334086f 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -93,16 +93,10 @@ u64 get_tcr(u64 *pips, u64 *pva_bits) if (el == 1) { tcr = TCR_EL1_RSVD | (ips << 32) | TCR_EPD1_DISABLE; - if (gd->arch.has_hafdbs) - tcr |= TCR_EL1_HA | TCR_EL1_HD; } else if (el == 2) { tcr = TCR_EL2_RSVD | (ips << 16); - if (gd->arch.has_hafdbs) - tcr |= TCR_EL2_HA | TCR_EL2_HD; } else { tcr = TCR_EL3_RSVD | (ips << 16); - if (gd->arch.has_hafdbs) - tcr |= TCR_EL3_HA | TCR_EL3_HD; } /* PTWs cacheable, inner/outer WBWA and inner shareable */ @@ -206,9 +200,6 @@ static void __cmo_on_leaves(void (*cmo_fn)(unsigned long, unsigned long), attrs != PTE_BLOCK_MEMTYPE(MT_NORMAL_NC)) continue; - if (gd->arch.has_hafdbs && (pte & (PTE_RDONLY | PTE_DBM)) != PTE_DBM) - continue; - end = va + BIT(level2shift(level)) - 1; /* No intersection with RAM? */ @@ -318,7 +309,7 @@ static void map_range(u64 virt, u64 phys, u64 size, int level, for (i = idx; size; i++) { u64 next_size, *next_table; - if (level >= gd->arch.first_block_level && + if (level >= 1 && size >= map_size && !(virt & (map_size - 1))) { if (level == 3) table[i] = phys | attrs | PTE_TYPE_PAGE; @@ -357,12 +348,6 @@ static void add_map(struct mm_region *map) if (va_bits < 39) level = 1; - if (!gd->arch.first_block_level) - gd->arch.first_block_level = 1; - - if (gd->arch.has_hafdbs) - attrs |= PTE_DBM | PTE_RDONLY; - map_range(map->virt, map->phys, map->size, level, (u64 *)gd->arch.tlb_addr, attrs); } @@ -376,7 +361,7 @@ static void count_range(u64 virt, u64 size, int level, int *cntp) for (i = idx; size; i++) { u64 next_size; - if (level >= gd->arch.first_block_level && + if (level >= 1 && size >= map_size && !(virt & (map_size - 1))) { virt += map_size; size -= map_size; @@ -414,16 +399,7 @@ static int count_ranges(void) __weak u64 get_page_table_size(void) { u64 one_pt = MAX_PTE_ENTRIES * sizeof(u64); - u64 size, mmfr1; - - asm volatile("mrs %0, id_aa64mmfr1_el1" : "=r" (mmfr1)); - if ((mmfr1 & 0xf) == 2) { - gd->arch.has_hafdbs = true; - gd->arch.first_block_level = 2; - } else { - gd->arch.has_hafdbs = false; - gd->arch.first_block_level = 1; - } + u64 size; /* Account for all page tables we would need to cover our memory map */ size = one_pt * count_ranges(); diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 1be08c5fdc..5fc888680b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -835,6 +835,7 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \ sun50i-h6-tanix-tx6-mini.dtb dtb-$(CONFIG_MACH_SUN50I_H616) += \ sun50i-h616-orangepi-zero2.dtb \ + sun50i-h618-orangepi-zero3.dtb \ sun50i-h616-x96-mate.dtb dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-amarula-relic.dtb \ diff --git a/arch/arm/dts/r8a779g0-u-boot.dtsi b/arch/arm/dts/r8a779g0-u-boot.dtsi index 150657fad5..cc8becac99 100644 --- a/arch/arm/dts/r8a779g0-u-boot.dtsi +++ b/arch/arm/dts/r8a779g0-u-boot.dtsi @@ -7,20 +7,10 @@ #include "r8a779x-u-boot.dtsi" -/ { - soc { - rpc: spi@ee200000 { - compatible = "renesas,r8a779g0-rpc-if", "renesas,rcar-gen4-rpc-if"; - reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>; - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 629>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 629>; - bank-width = <2>; - num-cs = <1>; - status = "disabled"; - }; - }; +&rpc { + reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>; + bank-width = <2>; + num-cs = <1>; }; &extalr_clk { diff --git a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts index efc1b9519e..bd75603664 100644 --- a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts +++ b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts @@ -28,7 +28,7 @@ #address-cells = <1>; #size-cells = <0>; spi-max-frequency = <40000000>; - status = "okay"; + status = "disabled"; spi-flash@0 { #address-cells = <1>; diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi b/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi index 15290e6892..fc7315b944 100644 --- a/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi +++ b/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi @@ -68,10 +68,7 @@ &emac0 { pinctrl-names = "default"; pinctrl-0 = <&ext_rgmii_pins>; - phy-mode = "rgmii"; phy-handle = <&ext_rgmii_phy>; - allwinner,rx-delay-ps = <3100>; - allwinner,tx-delay-ps = <700>; status = "okay"; }; diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts index d83852e72f..b5d713926a 100644 --- a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts +++ b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts @@ -13,6 +13,9 @@ }; &emac0 { + allwinner,rx-delay-ps = <3100>; + allwinner,tx-delay-ps = <700>; + phy-mode = "rgmii"; phy-supply = <®_dcdce>; }; diff --git a/arch/arm/dts/sun50i-h618-orangepi-zero3.dts b/arch/arm/dts/sun50i-h618-orangepi-zero3.dts index 00fe28caac..b3b1b86921 100644 --- a/arch/arm/dts/sun50i-h618-orangepi-zero3.dts +++ b/arch/arm/dts/sun50i-h618-orangepi-zero3.dts @@ -13,6 +13,8 @@ }; &emac0 { + allwinner,tx-delay-ps = <700>; + phy-mode = "rgmii-rxid"; phy-supply = <®_dldo1>; }; diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index 4f0adb0732..ce655ce7a9 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -49,13 +49,10 @@ #define PTE_TYPE_BLOCK (1 << 0) #define PTE_TYPE_VALID (1 << 0) -#define PTE_RDONLY BIT(7) -#define PTE_DBM BIT(51) - -#define PTE_TABLE_PXN BIT(59) -#define PTE_TABLE_XN BIT(60) -#define PTE_TABLE_AP BIT(61) -#define PTE_TABLE_NS BIT(63) +#define PTE_TABLE_PXN (1UL << 59) +#define PTE_TABLE_XN (1UL << 60) +#define PTE_TABLE_AP (1UL << 61) +#define PTE_TABLE_NS (1UL << 63) /* * Block @@ -102,15 +99,6 @@ #define TCR_TG0_16K (2 << 14) #define TCR_EPD1_DISABLE (1 << 23) -#define TCR_EL1_HA BIT(39) -#define TCR_EL1_HD BIT(40) - -#define TCR_EL2_HA BIT(21) -#define TCR_EL2_HD BIT(22) - -#define TCR_EL3_HA BIT(21) -#define TCR_EL3_HD BIT(22) - #define TCR_EL1_RSVD (1U << 31) #define TCR_EL2_RSVD (1U << 31 | 1 << 23) #define TCR_EL3_RSVD (1U << 31 | 1 << 23) diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index b385bae026..75bd9d56f8 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -52,8 +52,6 @@ struct arch_global_data { #if defined(CONFIG_ARM64) unsigned long tlb_fillptr; unsigned long tlb_emerg; - unsigned int first_block_level; - bool has_hafdbs; #endif #endif #ifdef CFG_SYS_MEM_RESERVE_SECURE diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c index 47393babbc..7a6151a972 100644 --- a/arch/arm/mach-apple/board.c +++ b/arch/arm/mach-apple/board.c @@ -372,6 +372,22 @@ static struct mm_region t6020_mem_map[] = { PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { /* I/O */ + .virt = 0x400000000, + .phys = 0x400000000, + .size = SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* I/O */ + .virt = 0x480000000, + .phys = 0x480000000, + .size = SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* I/O */ .virt = 0x580000000, .phys = 0x580000000, .size = SZ_512M, @@ -473,6 +489,22 @@ static struct mm_region t6022_mem_map[] = { PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { /* I/O */ + .virt = 0x400000000, + .phys = 0x400000000, + .size = SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* I/O */ + .virt = 0x480000000, + .phys = 0x480000000, + .size = SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* I/O */ .virt = 0x580000000, .phys = 0x580000000, .size = SZ_512M, @@ -553,6 +585,22 @@ static struct mm_region t6022_mem_map[] = { PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { /* I/O */ + .virt = 0x2400000000, + .phys = 0x2400000000, + .size = SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* I/O */ + .virt = 0x2480000000, + .phys = 0x2480000000, + .size = SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* I/O */ .virt = 0x2580000000, .phys = 0x2580000000, .size = SZ_512M, diff --git a/arch/arm/mach-exynos/include/mach/gpio.h b/arch/arm/mach-exynos/include/mach/gpio.h index f9975d7919..9eeeb76999 100644 --- a/arch/arm/mach-exynos/include/mach/gpio.h +++ b/arch/arm/mach-exynos/include/mach/gpio.h @@ -8,6 +8,9 @@ #define __ASM_ARCH_GPIO_H #ifndef __ASSEMBLY__ + +#include <asm/arch/cpu.h> + struct s5p_gpio_bank { unsigned int con; unsigned int dat; diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c index a07c87a2c8..aff2b5e1b6 100644 --- a/arch/arm/mach-exynos/soc.c +++ b/arch/arm/mach-exynos/soc.c @@ -9,6 +9,7 @@ #include <asm/cache.h> #include <asm/io.h> #include <asm/system.h> +#include <asm/arch/cpu.h> #ifdef CONFIG_TARGET_ESPRESSO7420 /* @@ -20,12 +21,14 @@ extern void _main(void); void *secondary_boot_addr = (void *)_main; #endif /* CONFIG_TARGET_ESPRESSO7420 */ +#if !CONFIG_IS_ENABLED(SYSRESET) void reset_cpu(void) { #ifdef CONFIG_CPU_V7A writel(0x1, samsung_get_base_swreset()); #endif } +#endif #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) diff --git a/arch/arm/mach-imx/spl_imx_romapi.c b/arch/arm/mach-imx/spl_imx_romapi.c index 93d48e56ac..5eb5a3d3c4 100644 --- a/arch/arm/mach-imx/spl_imx_romapi.c +++ b/arch/arm/mach-imx/spl_imx_romapi.c @@ -162,7 +162,7 @@ static ulong spl_romapi_read_stream(struct spl_load_info *load, ulong sector, return 0; } - ss->end = end; + ss->end += bytes; } memcpy(buf, (void *)(sector), count); @@ -285,7 +285,7 @@ static int spl_romapi_load_image_stream(struct spl_image_info *spl_image, ret = rom_api_download_image(p, 0, pg); if (ret != ROM_API_OKAY) { - puts("Steam(USB) download failure\n"); + puts("Stream(USB) download failure\n"); return -1; } @@ -305,7 +305,7 @@ static int spl_romapi_load_image_stream(struct spl_image_info *spl_image, ret = rom_api_download_image(p, 0, pg); if (ret != ROM_API_OKAY) { - puts("Steam(USB) download failure\n"); + puts("Stream(USB) download failure\n"); return -1; } diff --git a/board/hisilicon/hikey/MAINTAINERS b/board/hisilicon/hikey/MAINTAINERS index 11088eef84..1045abe124 100644 --- a/board/hisilicon/hikey/MAINTAINERS +++ b/board/hisilicon/hikey/MAINTAINERS @@ -2,5 +2,6 @@ HIKEY BOARD M: Peter Griffin <peter.griffin@linaro.org> S: Maintained F: board/hisilicon/hikey +F: doc/board/hisilicon/hikey.rst F: include/configs/hikey.h F: configs/hikey_defconfig diff --git a/board/hisilicon/hikey/README b/board/hisilicon/hikey/README deleted file mode 100644 index 94e8397e9b..0000000000 --- a/board/hisilicon/hikey/README +++ /dev/null @@ -1,227 +0,0 @@ -Introduction -============ - -HiKey is the first certified 96Boards Consumer Edition board. The board/SoC has: - -* HiSilicon Kirin 6220 eight-core ARM Cortex-A53 64-bit SoC running at 1.2GHz. -* ARM Mali 450-MP4 GPU -* 1GB 800MHz LPDDR3 DRAM -* 4GB eMMC Flash Storage -* microSD -* 802.11a/b/g/n WiFi, Bluetooth - -The HiKey schematic can be found here: - -https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/HiKey_schematics_LeMaker_version_Rev_A1.pdf - -The SoC datasheet can be found here: - -https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf - -Currently the u-boot port supports: - -* USB -* eMMC -* SD card -* GPIO - -The HiKey U-Boot port has been tested with l-loader, booting ATF, which then boots -U-Boot as the bl33.bin executable. - -Compile from source -=================== - -First get all the sources - - > mkdir -p ~/hikey/src ~/hikey/bin - > cd ~/hikey/src - > git clone https://github.com/96boards-hikey/edk2 -b testing/hikey960_v2.5 - > git clone https://github.com/ARM-software/arm-trusted-firmware - > git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2 - > git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4 - > git clone https://github.com/96boards-hikey/atf-fastboot - > wget https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/hisi-idt.py - -Get the BL30 mcuimage.bin binary. It is shipped as part of the UEFI source. -The latest version can be obtained from the OpenPlatformPkg repo. - - > cp OpenPlatformPkg/Platforms/Hisilicon/HiKey/Binary/mcuimage.bin ~/hikey/bin/ - -Get nvme.img binary - > wget -P ~/hikey/bin https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/nvme.img - -Compile U-Boot -============== - - > cd ~/hikey/src/u-boot - > make CROSS_COMPILE=aarch64-linux-gnu- hikey_config - > make CROSS_COMPILE=aarch64-linux-gnu- - > cp u-boot.bin ~/hikey/bin - -Compile ARM Trusted Firmware (ATF) -================================== - - > cd ~/hikey/src/arm-trusted-firmware - > make CROSS_COMPILE=aarch64-linux-gnu- all fip \ - SCP_BL2=~/hikey/bin/mcuimage.bin \ - BL33=~/hikey/bin/u-boot.bin DEBUG=1 PLAT=hikey - -Copy the resulting FIP binary - > cp build/hikey/debug/fip.bin ~/hikey/bin - -Compile ATF Fastboot -==================== - - > cd ~/hikey/src/atf-fastboot - > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=hikey DEBUG=1 - -Compile l-loader -================ - > cd ~/hikey/src/l-loader - > ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl1.bin - > ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl2.bin - > ln -sf ~/hikey/src/atf-fastboot/build/hikey/debug/bl1.bin fastboot.bin - > make hikey PTABLE_LST=aosp-8g - -Copy the resulting binaries - > cp *.img ~/hikey/bin - > cp l-loader.bin ~/hikey/bin - > cp recovery.bin ~/hikey/bin - -These instructions are adapted from -https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey.rst - -FLASHING -======== - -1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with -the hisi-idt.py utility. Then connect a USB A to B mini cable from your PC to the USB OTG port of HiKey and execute the below command. - -The command below assumes HiKey enumerated as the first USB serial port - - > sudo python ~/hikey/src/hisi-idt.py -d /dev/ttyUSB0 --img1 ~/hikey/bin/recovery.bin - -2. Once LED 0 comes on solid, HiKey board should be detected as a fastboot device. - - > sudo fastboot devices - -0123456789ABCDEF fastboot - -3. Flash the images - - > sudo fastboot flash ptable ~/hikey/bin/prm_ptable.img - > sudo fastboot flash loader ~/hikey/bin/l-loader.bin - > sudo fastboot flash fastboot ~/hikey/bin/fip.bin - > sudo fastboot flash nvme ~/hikey/bin/nvme.img - -4. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully) - have ATF, booting u-boot from eMMC. - - Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you - will get 'dwc_otg_core_host_init: Timeout!' errors. - -See working boot trace below on UART3 available at Low Speed Expansion header: - - -NOTICE: BL2: v1.5(debug):v1.5-694-g6d4f6aea -NOTICE: BL2: Built : 09:21:42, Aug 29 2018 -INFO: BL2: Doing platform setup -INFO: ddr3 rank1 init pass -INFO: succeed to set ddrc 150mhz -INFO: ddr3 rank1 init pass -INFO: succeed to set ddrc 266mhz -INFO: ddr3 rank1 init pass -INFO: succeed to set ddrc 400mhz -INFO: ddr3 rank1 init pass -INFO: succeed to set ddrc 533mhz -INFO: ddr3 rank1 init pass -INFO: succeed to set ddrc 800mhz -INFO: Samsung DDR -INFO: ddr test value:0xa5a55a5a -INFO: BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000 -INFO: BL2: TrustZone: protecting 4194304 bytes of memory at 0x3e800000 -INFO: [BDID] [fff91c18] midr: 0x410fd033 -INFO: init_acpu_dvfs: pmic version 17 -INFO: init_acpu_dvfs: ACPU_CHIP_MAX_FREQ=0x186a00. -INFO: acpu_dvfs_volt_init: success! -INFO: acpu_dvfs_set_freq: support freq num is 5 -INFO: acpu_dvfs_set_freq: start prof is 0x4 -INFO: acpu_dvfs_set_freq: magic is 0x5a5ac5c5 -INFO: acpu_dvfs_set_freq: voltage: -INFO: - 0: 0x49 -INFO: - 1: 0x49 -INFO: - 2: 0x50 -INFO: - 3: 0x60 -INFO: - 4: 0x78 -NOTICE: acpu_dvfs_set_freq: set acpu freq success!INFO: BL2: Loading image id 2 -INFO: Loading image id=2 at address 0x1000000 -INFO: Image id=2 loaded: 0x1000000 - 0x1023d00 -INFO: hisi_mcu_load_image: mcu sections 0: -INFO: hisi_mcu_load_image: src = 0x1000200 -INFO: hisi_mcu_load_image: dst = 0xf6000000 -INFO: hisi_mcu_load_image: size = 31184 -INFO: hisi_mcu_load_image: [SRC 0x1000200] 0x8000 0x3701 0x7695 0x7689 -INFO: hisi_mcu_load_image: [DST 0xf6000000] 0x8000 0x3701 0x7695 0x7689 -INFO: hisi_mcu_load_image: mcu sections 1: -INFO: hisi_mcu_load_image: src = 0x1007bd0 -INFO: hisi_mcu_load_image: dst = 0x5e00000 -INFO: hisi_mcu_load_image: size = 93828 -INFO: hisi_mcu_load_image: [SRC 0x1007bd0] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57 -INFO: hisi_mcu_load_image: [DST 0x5e00000] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57 -INFO: hisi_mcu_load_image: mcu sections 2: -INFO: hisi_mcu_load_image: src = 0x101ea54 -INFO: hisi_mcu_load_image: dst = 0x5e16e84 -INFO: hisi_mcu_load_image: size = 15428 -INFO: hisi_mcu_load_image: [SRC 0x101ea54] 0x9 0x1020640 0x10001 0x8f0d180 -INFO: hisi_mcu_load_image: [DST 0x5e16e84] 0x9 0x1020640 0x10001 0x8f0d180 -INFO: hisi_mcu_load_image: mcu sections 3: -INFO: hisi_mcu_load_image: src = 0x1022698 -INFO: hisi_mcu_load_image: dst = 0x5e22a10 -INFO: hisi_mcu_load_image: size = 3060 -INFO: hisi_mcu_load_image: [SRC 0x1022698] 0x0 0x0 0x0 0x0 -INFO: hisi_mcu_load_image: [DST 0x5e22a10] 0x0 0x0 0x0 0x0 -INFO: hisi_mcu_load_image: mcu sections 4: -INFO: hisi_mcu_load_image: src = 0x102328c -INFO: hisi_mcu_load_image: dst = 0x5e23604 -INFO: hisi_mcu_load_image: size = 2616 -INFO: hisi_mcu_load_image: [SRC 0x102328c] 0xf80000a0 0x0 0xf80000ac 0x0 -INFO: hisi_mcu_load_image: [DST 0x5e23604] 0xf80000a0 0x0 0xf80000ac 0x0 -INFO: hisi_mcu_start_run: AO_SC_SYS_CTRL2=0 -INFO: plat_hikey_bl2_handle_scp_bl2: MCU PC is at 0x42933301 -INFO: plat_hikey_bl2_handle_scp_bl2: AO_SC_PERIPH_CLKSTAT4 is 0x3b018f09 -WARNING: BL2: Platform setup already done!! -INFO: BL2: Loading image id 3 -INFO: Loading image id=3 at address 0xf9858000 -INFO: Image id=3 loaded: 0xf9858000 - 0xf9860058 -INFO: BL2: Loading image id 5 -INFO: Loading image id=5 at address 0x35000000 -INFO: Image id=5 loaded: 0x35000000 - 0x35061cd2 -NOTICE: BL2: Booting BL31 -INFO: Entry point address = 0xf9858000 -INFO: SPSR = 0x3cd -NOTICE: BL31: v1.5(debug):v1.5-694-g6d4f6aea -NOTICE: BL31: Built : 09:21:44, Aug 29 2018 -WARNING: Using deprecated integer interrupt array in gicv2_driver_data_t -WARNING: Please migrate to using an interrupt_prop_t array -INFO: ARM GICv2 driver initialized -INFO: BL31: Initializing runtime services -INFO: BL31: cortex_a53: CPU workaround for disable_non_temporal_hint was applied -INFO: BL31: cortex_a53: CPU workaround for 843419 was applied -INFO: BL31: cortex_a53: CPU workaround for 855873 was applied -INFO: BL31: Preparing for EL3 exit to normal world -INFO: Entry point address = 0x35000000 -INFO: SPSR = 0x3c9 - - -U-Boot 2018.09-rc1 (Aug 22 2018 - 14:55:49 +0530)hikey - -DRAM: 990 MiB -HI6553 PMIC init -MMC: config_sd_carddetect: SD card present -Hisilicon DWMMC: 0, Hisilicon DWMMC: 1 -Loading Environment from FAT... Unable to use mmc 1:1... Failed (-5) -In: uart@f7113000 -Out: uart@f7113000 -Err: uart@f7113000 -Net: Net Initialization Skipped -No ethernet found. -Hit any key to stop autoboot: 0 -starting USB... -USB0: scanning bus 0 for devices... 2 USB Device(s) found - scanning usb for storage devices... 0 Storage Device(s) found - scanning usb for ethernet devices... 0 Ethernet Device(s) found diff --git a/board/hisilicon/hikey960/MAINTAINERS b/board/hisilicon/hikey960/MAINTAINERS index 2c98932163..a442271443 100644 --- a/board/hisilicon/hikey960/MAINTAINERS +++ b/board/hisilicon/hikey960/MAINTAINERS @@ -2,5 +2,6 @@ HIKEY960 BOARD M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> S: Maintained F: board/hisilicon/hikey960 +F: doc/board/hisilicon/hikey960.rst F: include/configs/hikey960.h F: configs/hikey960_defconfig diff --git a/board/hisilicon/hikey960/README b/board/hisilicon/hikey960/README deleted file mode 100644 index 6e01862f8a..0000000000 --- a/board/hisilicon/hikey960/README +++ /dev/null @@ -1,247 +0,0 @@ -Introduction -============ - -HiKey960 is one of the 96Boards Consumer Edition board from HiSilicon. -The board/SoC has: - -* HiSilicon Kirin960 (HI3660) SoC with 4xCortex-A73 and 4xCortex-A53 -* ARM Mali G71 MP8 GPU -* 3GB LPDDR4 SDRAM -* 32GB UFS Flash Storage -* microSD -* 802.11a/b/g/n WiFi, Bluetooth - -More information about this board can be found in 96Boards website: -https://www.96boards.org/product/hikey960/ - -Currently the u-boot port supports: - -* SD card - -Compile from source -=================== - -First get all the sources - - > mkdir -p ~/hikey960/src ~/hikey960/bin - > cd ~/hikey960/src - > git clone https://github.com/ARM-software/arm-trusted-firmware - > git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4 - > git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2 - > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/config - > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_usb_xloader.img - > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_uce_boot.img - > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_xloader.img - > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/recovery.bin - > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hikey_idt - -Get the SCP_BL2 lpm3.img binary. It is shipped as part of the UEFI source. -The latest version can be obtained from the OpenPlatformPkg repo. - - > cp OpenPlatformPkg/Platforms/Hisilicon/HiKey960/Binary/lpm3.img ~/hikey960/bin/ - -Compile U-Boot -============== - - > cd ~/hikey960/src/u-boot - > make CROSS_COMPILE=aarch64-linux-gnu- hikey960_defconfig - > make CROSS_COMPILE=aarch64-linux-gnu- - > cp u-boot.bin ~/hikey960/bin/ - -Compile ARM Trusted Firmware (ATF) -================================== - - > cd ~/hikey960/src/arm-trusted-firmware - > make CROSS_COMPILE=aarch64-linux-gnu- all fip \ - SCP_BL2=~/hikey960/bin/lpm3.img \ - BL33=~/hikey960/bin/u-boot.bin DEBUG=1 PLAT=hikey960 - -Copy the resulting FIP binary - > cp build/hikey960/debug/fip.bin ~/hikey960/bin - -Compile l-loader -================ - > cd ~/hikey960/src/l-loader - > ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/bl1.bin - > ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/bl2.bin - > ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/fip.bin - > ln -sf ~/hikey960/bin/u-boot.bin - > make hikey960 PTABLE_LST=linux-32g NS_BL1U=u-boot.bin - -Copy the resulting binaries - > cp *.img ~/hikey960/bin - > cp l-loader.bin ~/hikey960/bin - -These instructions are adapted from -https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey960.rst - -Setup Console -============= - -Install ser2net. Use telnet as the console since UEFI in recovery mode -output window fails to display in minicom. - - > sudo apt-get install ser2net - -Configure ser2net - - > sudo vi /etc/ser2net.conf - -Append one line for serial-over-USB in #ser2net.conf - - > 2004:telnet:0:/dev/ttyUSB0:115200 8DATABITS NONE 1STOPBIT banner - -Start ser2net - - > sudo killall ser2net - > sudo ser2net -u - -Open the console. - - > telnet localhost 2004 - -And you could open the console remotely, too. - -Flashing -======== - -1. Boot Hikey960 into recovery mode as per the below document: -https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey960/installation/board-recovery.md - -Once Hikey960 is in recovery mode, flash the recovery binary: - - > cd ~/hikey960/src - > chmod +x ./hikey_idt - > sudo ./hikey_idt -c config -p /dev/ttyUSB1 - -Now move to the Hikey960 console and press `f` during UEFI boot. This -will allow the board to boot into fastboot mode. Once the board is in -fastboot mode, you should see the ID of the HiKey960 board using the -following command - - > sudo fastboot devices - -1ED3822A018E3372 fastboot - -3. Flash the images - -Now, the images can be flashed using fastboot: - - > sudo fastboot flash ptable ~/hikey960/bin/prm_ptable.img - > sudo fastboot flash xloader ~/hikey960/bin/hisi-sec_xloader.img - > sudo fastboot flash fastboot ~/hikey960/bin/l-loader.bin - > sudo fastboot flash fip ~/hikey960/bin/fip.bin - -4. Set the "Boot Mode" switch to OFF position for normal boot mode. -Then power on HiKey960 - -Observe the console traces using UART6 on the Low Speed Expansion header: - -NOTICE: BL2: v2.1(debug):v2.1-531-g3ee48f40 -NOTICE: BL2: Built : 18:15:58, Aug 2 2019 -INFO: BL2: Doing platform setup -INFO: UFS LUN0 contains 1024 blocks with 4096-byte size -INFO: UFS LUN1 contains 1024 blocks with 4096-byte size -INFO: UFS LUN2 contains 2048 blocks with 4096-byte size -INFO: UFS LUN3 contains 7805952 blocks with 4096-byte size -INFO: ufs: change power mode success -INFO: BL2: Loading image id 2 -INFO: Loading image id=2 at address 0x89c80000 -INFO: Image id=2 loaded: 0x89c80000 - 0x89cb5088 -INFO: BL2: Initiating SCP_BL2 transfer to SCP -INFO: BL2: SCP_BL2: 0x89c80000@0x35088 -INFO: BL2: SCP_BL2 HEAD: -INFO: BL2: SCP_BL2 0x7000 0x179 0x159 0x149 -INFO: BL2: SCP_BL2 0x189 0x18b 0x18d 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x18f -INFO: BL2: SCP_BL2 0x191 0x0 0x193 0x195 -INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd -INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd -INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd -INFO: BL2: SCP_BL2 0x4d454355 0x43494741 0x424d554e 0x21215245 -INFO: BL2: SCP_BL2 0x4a054904 0x42912000 0xf841bfbc 0xe7fa0b04 -INFO: BL2: SCP_BL2 0xb88cf000 0x3b18 0x3d1c 0x6809493e -INFO: BL2: SCP_BL2 0x4613680a 0x201f102 0xf0002a04 0x600a804c -INFO: BL2: SCP_BL2 0x204f04f 0xf203fb02 0xf102440a 0x60100204 -INFO: BL2: SCP_BL2 0x160f04f 0xf103fb01 0x68004834 0x61044408 -INFO: BL2: SCP_BL2 0x61866145 0xf8c061c7 0xf8c08020 0xf8c09024 -INFO: BL2: SCP_BL2 0xf8c0a028 0xf3efb02c 0xf3ef8208 0x68118309 -INFO: BL2: SCP_BL2 0xf1026401 0xf0110204 0xbf070f04 0x46113220 -INFO: BL2: SCP_BL2 TAIL: -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x19cad151 0x19b80040 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 -INFO: BL2: SCP_BL2 transferred to SCP -INFO: start fw loading -INFO: fw load success -WARNING: BL2: Platform setup already done!! -INFO: BL2: Loading image id 3 -INFO: Loading image id=3 at address 0x1ac58000 -INFO: Image id=3 loaded: 0x1ac58000 - 0x1ac63024 -INFO: BL2: Loading image id 5 -INFO: Loading image id=5 at address 0x1ac98000 -INFO: Image id=5 loaded: 0x1ac98000 - 0x1ad0819c -NOTICE: BL2: Booting BL31 -INFO: Entry point address = 0x1ac58000 -INFO: SPSR = 0x3cd -NOTICE: BL31: v2.1(debug):v2.1-531-g3ee48f40 -NOTICE: BL31: Built : 18:16:01, Aug 2 2019 -INFO: ARM GICv2 driver initialized -INFO: BL31: Initializing runtime services -INFO: BL31: cortex_a53: CPU workaround for 855873 was applied -INFO: plat_setup_psci_ops: sec_entrypoint=0x1ac580fc -INFO: BL31: Preparing for EL3 exit to normal world -INFO: Entry point address = 0x1ac98000 -INFO: SPSR = 0x3c9 - - -U-Boot 2019.07-00628-g286f05a6fc-dirty (Aug 02 2019 - 17:14:05 +0530) -Hikey960 - -DRAM: 3 GiB -PSCI: v1.1 -MMC: dwmmc1@ff37f000: 0 -Loading Environment from EXT4... ** File not found /uboot.env ** - -** Unable to read "/uboot.env" from mmc0:2 ** -In: serial@fff32000 -Out: serial@fff32000 -Err: serial@fff32000 -Net: Net Initialization Skipped -No ethernet found. -Hit any key to stop autoboot: 0 -switch to partitions #0, OK -mmc0 is current device -Scanning mmc 0:1... -Found /extlinux/extlinux.conf -Retrieving file: /extlinux/extlinux.conf -201 bytes read in 12 ms (15.6 KiB/s) -1: hikey960-kernel -Retrieving file: /Image -24689152 bytes read in 4377 ms (5.4 MiB/s) -append: earlycon=pl011,mmio32,0xfff32000 console=ttyAMA6,115200 rw root=/dev/mmcblk0p2 rot -Retrieving file: /hi3660-hikey960.dtb -35047 bytes read in 14 ms (2.4 MiB/s) -## Flattened Device Tree blob at 10000000 - Booting using the fdt blob at 0x10000000 - Using Device Tree in place at 0000000010000000, end 000000001000b8e6 - -Starting kernel ... - -[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034] -[ 0.000000] Linux version 5.2.0-03138-gd75da80dce39 (mani@Mani-XPS-13-9360) (gcc versi9 -[ 0.000000] Machine model: HiKey960 -[ 0.000000] earlycon: pl11 at MMIO32 0x00000000fff32000 (options '') -[ 0.000000] printk: bootconsole [pl11] enabled -[ 0.000000] efi: Getting EFI parameters from FDT: diff --git a/board/hisilicon/poplar/MAINTAINERS b/board/hisilicon/poplar/MAINTAINERS index 9c045eaeb1..bfd4a9be66 100644 --- a/board/hisilicon/poplar/MAINTAINERS +++ b/board/hisilicon/poplar/MAINTAINERS @@ -3,5 +3,6 @@ M: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com> M: Shawn Guo <shawn.guo@linaro.org> S: Maintained F: board/hisilicon/poplar +F: doc/board/hisilicon/poplar.rst F: include/configs/poplar.h F: configs/poplar_defconfig diff --git a/board/hisilicon/poplar/README b/board/hisilicon/poplar/README deleted file mode 100644 index 77dcc3ba11..0000000000 --- a/board/hisilicon/poplar/README +++ /dev/null @@ -1,288 +0,0 @@ -================================================================================ - Board Information -================================================================================ - -Developed by HiSilicon, the board features the Hi3798C V200 with an -integrated quad-core 64-bit ARM Cortex A53 processor and high -performance Mali T720 GPU, making it capable of running any commercial -set-top solution based on Linux or Android. Its high performance -specification also supports a premium user experience with up to H.265 -HEVC decoding of 4K video at 60 frames per second. - -SOC Hisilicon Hi3798CV200 -CPU Quad-core ARM Cortex-A53 64 bit -DRAM DDR3/3L/4 SDRAM interface, maximum 32-bit data width 2 GB -USB Two USB 2.0 ports One USB 3.0 ports -CONSOLE USB-micro port for console support -ETHERNET 1 GBe Ethernet -PCIE One PCIe 2.0 interfaces -JTAG 8-Pin JTAG -EXPANSION INTERFACE Linaro 96Boards Low Speed Expansion slot -DIMENSION Standard 160×120 mm 96Boards Enterprice Edition form factor -WIFI 802.11AC 2*2 with Bluetooth -CONNECTORS One connector for Smart Card One connector for TSI - - -================================================================================ - BUILD INSTRUCTIONS -================================================================================ - -Note of warning: -================ - -U-Boot has a *strong* dependency with the l-loader and the arm trusted firmware -repositories. - -The boot sequence is: - l-loader --> arm_trusted_firmware --> u-boot - -U-Boot needs to be aware of the BL31 runtime location and size to avoid writing -over it. Currently, BL31 is being placed below the kernel text offset (check -poplar.c) but this could change in the future. - -The current version of u-boot has been tested with: - - https://github.com/Linaro/poplar-l-loader.git - - commit f0988698dcc5c08bd0a8f50aa0457e138a5f438c - Author: Alex Elder <elder@linaro.org> - Date: Fri Jun 16 08:57:59 2017 -0500 - - l-loader: use external memory region definitions - - The ARM Trusted Firmware code now has a header file that collects - all the definitions for the memory regions used for its boot stages. - Include that file where needed, and use the definitions found therein - - Signed-off-by: Alex Elder <elder@linaro.org> - - - - https://github.com/Linaro/poplar-arm-trusted-firmware.git - - commit 6ac42dd3be13c99aa8ce29a15073e2f19d935f68 - Author: Alex Elder <elder@linaro.org> - Date: Fri Jun 16 09:24:50 2017 -0500 - - poplar: define memory regions in a separate file - - Separate the definitions for memory regions used for the BL stage - images and FIP into a new file. The "l-loader" image uses knowledge - of the sizes and locations of these memory regions, and it can now - include this (external) header to get these definitions, rather than - having to make coordinated changes to both code bases. - - The new file has a complete set of definitions (more than may be - required by one or the other user). It also includes a summary of - how the boot process works, and how it uses these regions. - - It should now be relatively easy to adjust the sizes and locations - of these memory regions, or to add to them (e.g. for TEE). - - Signed-off-by: Alex Elder <elder@linaro.org> - - -Compile from source: -==================== - -Get all the sources - - > mkdir -p ~/poplar/src ~/poplar/bin - > cd ~/poplar/src - > git clone https://github.com/Linaro/poplar-l-loader.git l-loader - > git clone https://github.com/Linaro/poplar-arm-trusted-firmware.git atf - > git clone https://github.com/Linaro/poplar-u-boot.git u-boot - -Make sure you are using the correct branch on each one of these repositories. -The definition of "correct" might change over time (at this moment in time this -would be the "latest" branch). - -Compile U-Boot: -=============== - - Prerequisite: - # sudo apt-get install device-tree-compiler - - > cd ~/poplar/src/u-boot - > make CROSS_COMPILE=aarch64-linux-gnu- poplar_defconfig - > make CROSS_COMPILE=aarch64-linux-gnu- - > cp u-boot.bin ~/poplar/bin - -Compile ARM Trusted Firmware (ATF): -=================================== - - > cd ~/poplar/src/atf - > make CROSS_COMPILE=aarch64-linux-gnu- all fip \ - SPD=none BL33=~/poplar/bin/u-boot.bin DEBUG=1 PLAT=poplar - -Copy resulting binaries - > cp build/hi3798cv200/debug/bl1.bin ~/poplar/src/l-loader/atf/ - > cp build/hi3798cv200/debug/fip.bin ~/poplar/src/l-loader/atf/ - -Compile l-loader: -================= - - > cd ~/poplar/src/l-loader - > make clean - > make CROSS_COMPILE=arm-linux-gnueabi- - - Due to BootROM requiremets, rename l-loader.bin to fastboot.bin: - > cp l-loader.bin ~/poplar/bin/fastboot.bin - - -================================================================================ - FLASH INSTRUCTIONS -================================================================================ - -Two methods: - -Using USB debrick support: - Copy fastboot.bin to a FAT partition on the USB drive and reboot the - poplar board while pressing S3(usb_boot). - - The system will execute the new u-boot and boot into a shell which you - can then use to write to eMMC. - -Using U-BOOT from shell: - 1) using AXIS usb ethernet dongle and tftp - 2) using FAT formated USB drive - - -1. TFTP (USB ethernet dongle) -============================= - -Plug a USB AXIS ethernet dongle on any of the USB2 ports on the Poplar board. -Copy fastboot.bin to your tftp server. -In u-boot make sure your network is properly setup. - -Then - -=> tftp 0x30000000 fastboot.bin -starting USB... -USB0: USB EHCI 1.00 -scanning bus 0 for devices... 1 USB Device(s) found -USB1: USB EHCI 1.00 -scanning bus 1 for devices... 3 USB Device(s) found - scanning usb for storage devices... 0 Storage Device(s) found - scanning usb for ethernet devices... 1 Ethernet Device(s) found -Waiting for Ethernet connection... done. -Using asx0 device -TFTP from server 192.168.1.4; our IP address is 192.168.1.10 -Filename 'poplar/fastboot.bin'. -Load address: 0x30000000 -Loading: ################################################################# - ################################################################# - ############################################################### - 2 MiB/s -done -Bytes transferred = 983040 (f0000 hex) - -=> mmc write 0x30000000 0 0x780 - -MMC write: dev # 0, block # 0, count 1920 ... 1920 blocks written: OK -=> reset - - -2. USING USB FAT DRIVE -======================= - -Copy fastboot.bin to any partition on a FAT32 formated usb flash drive. -Enter the uboot prompt - -=> fatls usb 0:2 - 983040 fastboot.bin - -1 file(s), 0 dir(s) - -=> fatload usb 0:2 0x30000000 fastboot.bin -reading fastboot.bin -983040 bytes read in 44 ms (21.3 MiB/s) - -=> mmc write 0x30000000 0 0x780 - -MMC write: dev # 0, block # 0, count 1920 ... 1920 blocks written: OK - - -================================================================================ - BOOT TRACE -================================================================================ - -Bootrom start -Boot Media: eMMC -Decrypt auxiliary code ...OK - -lsadc voltage min: 000000FE, max: 000000FF, aver: 000000FE, index: 00000000 - -Entry boot auxiliary code - -Auxiliary code - v1.00 -DDR code - V1.1.2 20160205 -Build: Mar 24 2016 - 17:09:44 -Reg Version: v134 -Reg Time: 2016/03/18 09:44:55 -Reg Name: hi3798cv2dmb_hi3798cv200_ddr3_2gbyte_8bitx4_4layers.reg - -Boot auxiliary code success -Bootrom success - -LOADER: Switched to aarch64 mode -LOADER: Entering ARM TRUSTED FIRMWARE -LOADER: CPU0 executes at 0x000ce000 - -INFO: BL1: 0xe1000 - 0xe7000 [size = 24576] -NOTICE: Booting Trusted Firmware -NOTICE: BL1: v1.3(debug):v1.3-372-g1ba9c60 -NOTICE: BL1: Built : 17:51:33, Apr 30 2017 -INFO: BL1: RAM 0xe1000 - 0xe7000 -INFO: BL1: Loading BL2 -INFO: Loading image id=1 at address 0xe9000 -INFO: Image id=1 loaded at address 0xe9000, size = 0x5008 -NOTICE: BL1: Booting BL2 -INFO: Entry point address = 0xe9000 -INFO: SPSR = 0x3c5 -NOTICE: BL2: v1.3(debug):v1.3-372-g1ba9c60 -NOTICE: BL2: Built : 17:51:33, Apr 30 2017 -INFO: BL2: Loading BL31 -INFO: Loading image id=3 at address 0x129000 -INFO: Image id=3 loaded at address 0x129000, size = 0x8038 -INFO: BL2: Loading BL33 -INFO: Loading image id=5 at address 0x37000000 -INFO: Image id=5 loaded at address 0x37000000, size = 0x58f17 -NOTICE: BL1: Booting BL31 -INFO: Entry point address = 0x129000 -INFO: SPSR = 0x3cd -INFO: Boot bl33 from 0x37000000 for 364311 Bytes -NOTICE: BL31: v1.3(debug):v1.3-372-g1ba9c60 -NOTICE: BL31: Built : 17:51:33, Apr 30 2017 -INFO: BL31: Initializing runtime services -INFO: BL31: Preparing for EL3 exit to normal world -INFO: Entry point address = 0x37000000 -INFO: SPSR = 0x3c9 - - -U-Boot 2017.05-rc2-00130-gd2255b0 (Apr 30 2017 - 17:51:28 +0200)poplar - -Model: HiSilicon Poplar Development Board -BOARD: Hisilicon HI3798cv200 Poplar -DRAM: 1 GiB -MMC: Hisilicon DWMMC: 0 -In: serial@f8b00000 -Out: serial@f8b00000 -Err: serial@f8b00000 -Net: Net Initialization Skipped -No ethernet found. - -Hit any key to stop autoboot: 0 -starting USB... -USB0: USB EHCI 1.00 -scanning bus 0 for devices... 1 USB Device(s) found -USB1: USB EHCI 1.00 -scanning bus 1 for devices... 4 USB Device(s) found - scanning usb for storage devices... 1 Storage Device(s) found - scanning usb for ethernet devices... 1 Ethernet Device(s) found - -USB device 0: - Device 0: Vendor: SanDisk Rev: 1.00 Prod: Cruzer Blade - Type: Removable Hard Disk - Capacity: 7632.0 MB = 7.4 GB (15630336 x 512) -... is now current device -Scanning usb 0:1... -=> diff --git a/board/samsung/axy17lte/Kconfig b/board/samsung/axy17lte/Kconfig index a018547ff5..64a4ffa7e6 100644 --- a/board/samsung/axy17lte/Kconfig +++ b/board/samsung/axy17lte/Kconfig @@ -1,11 +1,3 @@ -config SYS_CONFIG_NAME - string "Board configuration name" - default "exynos78x0-common.h" - help - This option contains information about board configuration name. - Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header - will be used for board configuration. - if TARGET_A5Y17LTE config SYS_BOARD default "axy17lte" @@ -16,7 +8,7 @@ config SYS_VENDOR default "samsung" config SYS_CONFIG_NAME - default "a5y17lte" + default "exynos78x0-common" config EXYNOS7880 bool "Exynos 7880 SOC support" @@ -33,7 +25,7 @@ config SYS_VENDOR default "samsung" config SYS_CONFIG_NAME - default "a5y17lte" + default "exynos78x0-common" config EXYNOS7880 bool "Exynos 7880 SOC support" @@ -50,7 +42,7 @@ config SYS_VENDOR default "samsung" config SYS_CONFIG_NAME - default "a3y17lte" + default "exynos78x0-common" config EXYNOS7870 bool "Exynos 7870 SOC support" diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 0061437211..f556857a39 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -455,6 +455,11 @@ M: Jernej Skrabec <jernej.skrabec@siol.net> S: Maintained F: configs/orangepi_zero2_defconfig +ORANGEPI ZERO 3 BOARD +M: Andre Przywara <andre.przywara@arm.com> +S: Maintained +F: configs/orangepi_zero3_defconfig + ORANGEPI PC 2 BOARD M: Andre Przywara <andre.przywara@arm.com> S: Maintained diff --git a/cmd/bootefi.c b/cmd/bootefi.c index 20e5c94a33..395b0629de 100644 --- a/cmd/bootefi.c +++ b/cmd/bootefi.c @@ -162,8 +162,6 @@ static efi_status_t efi_env_set_load_options(efi_handle_t handle, return ret; } -#if !CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE) - /** * copy_fdt() - Copy the device tree to a new location available to EFI * @@ -237,8 +235,6 @@ static void *get_config_table(const efi_guid_t *guid) return NULL; } -#endif /* !CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE) */ - /** * efi_install_fdt() - install device tree * @@ -258,18 +254,15 @@ static void *get_config_table(const efi_guid_t *guid) */ efi_status_t efi_install_fdt(void *fdt) { + struct bootm_headers img = { 0 }; + efi_status_t ret; + /* * The EBBR spec requires that we have either an FDT or an ACPI table * but not both. */ -#if CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE) - if (fdt) { + if (CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE) && fdt) log_warning("WARNING: Can't have ACPI table and device tree - ignoring DT.\n"); - return EFI_SUCCESS; - } -#else - struct bootm_headers img = { 0 }; - efi_status_t ret; if (fdt == EFI_FDT_USE_INTERNAL) { const char *fdt_opt; @@ -302,6 +295,12 @@ efi_status_t efi_install_fdt(void *fdt) return EFI_LOAD_ERROR; } + /* Create memory reservations as indicated by the device tree */ + efi_carve_out_dt_rsv(fdt); + + if (CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE)) + return EFI_SUCCESS; + /* Prepare device tree for payload */ ret = copy_fdt(&fdt); if (ret) { @@ -314,9 +313,6 @@ efi_status_t efi_install_fdt(void *fdt) return EFI_LOAD_ERROR; } - /* Create memory reservations as indicated by the device tree */ - efi_carve_out_dt_rsv(fdt); - efi_try_purge_kaslr_seed(fdt); if (CONFIG_IS_ENABLED(EFI_TCG2_PROTOCOL_MEASURE_DTB)) { @@ -333,7 +329,6 @@ efi_status_t efi_install_fdt(void *fdt) log_err("ERROR: failed to install device tree\n"); return ret; } -#endif /* GENERATE_ACPI_TABLE */ return EFI_SUCCESS; } diff --git a/cmd/efi_common.c b/cmd/efi_common.c index f4056096cd..1aa2351fcd 100644 --- a/cmd/efi_common.c +++ b/cmd/efi_common.c @@ -17,10 +17,8 @@ void efi_show_tables(struct efi_system_table *systab) for (i = 0; i < systab->nr_tables; i++) { struct efi_configuration_table *tab = &systab->tables[i]; - char guid_str[37]; - uuid_bin_to_str(tab->guid.b, guid_str, 1); - printf("%p %pUl %s\n", tab->table, guid_str, + printf("%p %pUl %s\n", tab->table, tab->guid.b, uuid_guid_get_str(tab->guid.b) ?: "(unknown)"); } } diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c index e6e8a0a488..34a59cb15d 100644 --- a/cmd/eficonfig.c +++ b/cmd/eficonfig.c @@ -528,7 +528,10 @@ struct efi_device_path *eficonfig_create_device_path(struct efi_device_path *dp_ p += fp_size; *((struct efi_device_path *)p) = END; - dp = efi_dp_append(dp_volume, (struct efi_device_path *)buf); + dp = efi_dp_shorten(dp_volume); + if (!dp) + dp = dp_volume; + dp = efi_dp_append(dp, &fp->dp); free(buf); return dp; diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 25cd18afda..c521b02f4a 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -370,7 +370,7 @@ config SPL_STACK default 0x93ffb8 if ARCH_MX6 && MX6_OCRAM_256KB default 0x91ffb8 if ARCH_MX6 && !MX6_OCRAM_256KB default 0x118000 if MACH_SUN50I_H6 - default 0x58000 if MACH_SUN50I_H616 + default 0x52a00 if MACH_SUN50I_H616 default 0x40000 if MACH_SUN8I_R528 default 0x54000 if MACH_SUN50I || MACH_SUN50I_H5 default 0x18000 if MACH_SUN9I diff --git a/common/usb_hub.c b/common/usb_hub.c index 85c0822d8b..70279f301d 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -395,6 +395,13 @@ int usb_hub_port_connect_change(struct usb_device *dev, int port) break; } + /* + * USB 2.0 7.1.7.5: devices must be able to accept a SetAddress() + * request (refer to Section 11.24.2 and Section 9.4 respectively) + * after the reset recovery time 10 ms + */ + mdelay(10); + #if CONFIG_IS_ENABLED(DM_USB) struct udevice *child; diff --git a/common/usb_storage.c b/common/usb_storage.c index 35c656db0d..774d5bdf54 100644 --- a/common/usb_storage.c +++ b/common/usb_storage.c @@ -102,6 +102,7 @@ struct us_data { trans_reset transport_reset; /* reset routine */ trans_cmnd transport; /* transport routine */ unsigned short max_xfer_blk; /* maximum transfer blocks */ + bool cmd12; /* use 12-byte commands (RBC/UFI) */ }; #if !CONFIG_IS_ENABLED(BLK) @@ -359,7 +360,7 @@ static void usb_show_srb(struct scsi_cmd *pccb) { int i; printf("SRB: len %d datalen 0x%lX\n ", pccb->cmdlen, pccb->datalen); - for (i = 0; i < 12; i++) + for (i = 0; i < pccb->cmdlen; i++) printf("%02X ", pccb->cmd[i]); printf("\n"); } @@ -898,7 +899,7 @@ do_retry: psrb->cmd[4] = 18; psrb->datalen = 18; psrb->pdata = &srb->sense_buf[0]; - psrb->cmdlen = 12; + psrb->cmdlen = us->cmd12 ? 12 : 6; /* issue the command */ result = usb_stor_CB_comdat(psrb, us); debug("auto request returned %d\n", result); @@ -999,7 +1000,7 @@ static int usb_inquiry(struct scsi_cmd *srb, struct us_data *ss) srb->cmd[1] = srb->lun << 5; srb->cmd[4] = 36; srb->datalen = 36; - srb->cmdlen = 12; + srb->cmdlen = ss->cmd12 ? 12 : 6; i = ss->transport(srb, ss); debug("inquiry returns %d\n", i); if (i == 0) @@ -1024,7 +1025,7 @@ static int usb_request_sense(struct scsi_cmd *srb, struct us_data *ss) srb->cmd[4] = 18; srb->datalen = 18; srb->pdata = &srb->sense_buf[0]; - srb->cmdlen = 12; + srb->cmdlen = ss->cmd12 ? 12 : 6; ss->transport(srb, ss); debug("Request Sense returned %02X %02X %02X\n", srb->sense_buf[2], srb->sense_buf[12], @@ -1042,7 +1043,7 @@ static int usb_test_unit_ready(struct scsi_cmd *srb, struct us_data *ss) srb->cmd[0] = SCSI_TST_U_RDY; srb->cmd[1] = srb->lun << 5; srb->datalen = 0; - srb->cmdlen = 12; + srb->cmdlen = ss->cmd12 ? 12 : 6; if (ss->transport(srb, ss) == USB_STOR_TRANSPORT_GOOD) { ss->flags |= USB_READY; return 0; @@ -1074,7 +1075,7 @@ static int usb_read_capacity(struct scsi_cmd *srb, struct us_data *ss) srb->cmd[0] = SCSI_RD_CAPAC; srb->cmd[1] = srb->lun << 5; srb->datalen = 8; - srb->cmdlen = 12; + srb->cmdlen = ss->cmd12 ? 12 : 10; if (ss->transport(srb, ss) == USB_STOR_TRANSPORT_GOOD) return 0; } while (retry--); @@ -1094,7 +1095,7 @@ static int usb_read_10(struct scsi_cmd *srb, struct us_data *ss, srb->cmd[5] = ((unsigned char) (start)) & 0xff; srb->cmd[7] = ((unsigned char) (blocks >> 8)) & 0xff; srb->cmd[8] = (unsigned char) blocks & 0xff; - srb->cmdlen = 12; + srb->cmdlen = ss->cmd12 ? 12 : 10; debug("read10: start %lx blocks %x\n", start, blocks); return ss->transport(srb, ss); } @@ -1111,7 +1112,7 @@ static int usb_write_10(struct scsi_cmd *srb, struct us_data *ss, srb->cmd[5] = ((unsigned char) (start)) & 0xff; srb->cmd[7] = ((unsigned char) (blocks >> 8)) & 0xff; srb->cmd[8] = (unsigned char) blocks & 0xff; - srb->cmdlen = 12; + srb->cmdlen = ss->cmd12 ? 12 : 10; debug("write10: start %lx blocks %x\n", start, blocks); return ss->transport(srb, ss); } @@ -1417,6 +1418,11 @@ int usb_storage_probe(struct usb_device *dev, unsigned int ifnum, printf("Sorry, protocol %d not yet supported.\n", ss->subclass); return 0; } + + /* UFI uses 12-byte commands (like RBC, unlike SCSI) */ + if (ss->subclass == US_SC_UFI) + ss->cmd12 = true; + if (ss->ep_int) { /* we had found an interrupt endpoint, prepare irq pipe * set up the IRQ pipe and handler diff --git a/configs/a3y17lte_defconfig b/configs/a3y17lte_defconfig index 42fcd2a3d3..043f3a04db 100644 --- a/configs/a3y17lte_defconfig +++ b/configs/a3y17lte_defconfig @@ -1,5 +1,4 @@ CONFIG_ARM=y -CONFIG_SYS_CONFIG_NAME="exynos78x0-common" CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=26000000 CONFIG_ARCH_EXYNOS=y diff --git a/configs/a5y17lte_defconfig b/configs/a5y17lte_defconfig index 3b80536c12..14590f65e9 100644 --- a/configs/a5y17lte_defconfig +++ b/configs/a5y17lte_defconfig @@ -1,5 +1,4 @@ CONFIG_ARM=y -CONFIG_SYS_CONFIG_NAME="exynos78x0-common" CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=26000000 CONFIG_ARCH_EXYNOS=y diff --git a/configs/a7y17lte_defconfig b/configs/a7y17lte_defconfig index 9390e35057..ccb0bf2e80 100644 --- a/configs/a7y17lte_defconfig +++ b/configs/a7y17lte_defconfig @@ -1,5 +1,4 @@ CONFIG_ARM=y -CONFIG_SYS_CONFIG_NAME="exynos78x0-common" CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=26000000 CONFIG_ARCH_EXYNOS=y diff --git a/configs/bananapi-m2-pro_defconfig b/configs/bananapi-m2-pro_defconfig index 2a3958b0fd..755bccb4a7 100644 --- a/configs/bananapi-m2-pro_defconfig +++ b/configs/bananapi-m2-pro_defconfig @@ -56,6 +56,7 @@ CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y CONFIG_USB=y +CONFIG_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y diff --git a/configs/bananapi-m2s_defconfig b/configs/bananapi-m2s_defconfig index 405ce3a93a..af8daced62 100644 --- a/configs/bananapi-m2s_defconfig +++ b/configs/bananapi-m2s_defconfig @@ -61,6 +61,7 @@ CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y CONFIG_USB=y +CONFIG_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 6621ca9add..bf522e1f2f 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -47,7 +47,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_JZ4780_EFUSE=y CONFIG_MMC=y diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig index aef75c7780..238f91cf6b 100644 --- a/configs/eDPU_defconfig +++ b/configs/eDPU_defconfig @@ -20,7 +20,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="eDPU>> " @@ -82,6 +81,7 @@ CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y # CONFIG_SCSI is not set +CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_MVEBU_A3700_UART=y CONFIG_MVEBU_A3700_SPI=y CONFIG_SYSINFO=y diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig index ba74b241ab..b1c267a791 100644 --- a/configs/libretech-cc_v2_defconfig +++ b/configs/libretech-cc_v2_defconfig @@ -66,6 +66,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_MESON_SPIFC=y CONFIG_USB=y +CONFIG_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig index bf851cbd85..70b103261f 100644 --- a/configs/mk808_defconfig +++ b/configs/mk808_defconfig @@ -70,7 +70,6 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set CONFIG_TPL_DM=y -# CONFIG_DM_WARN is not set CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index e6fb80167a..51518cf8e3 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -22,7 +22,6 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_MAXARGS=32 @@ -70,6 +69,7 @@ CONFIG_PHY=y CONFIG_MVEBU_COMPHY_SUPPORT=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_MVEBU_A3700_UART=y CONFIG_MVEBU_A3700_SPI=y CONFIG_USB=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 8e79fc7ce9..227607acbc 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -24,7 +24,6 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y @@ -89,6 +88,7 @@ CONFIG_MVEBU_COMPHY_SUPPORT=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_MVEBU_A3700_UART=y CONFIG_MVEBU_A3700_SPI=y CONFIG_USB=y diff --git a/configs/neu2-io-rv1126_defconfig b/configs/neu2-io-rv1126_defconfig index f02c38c566..2fb5a84e76 100644 --- a/configs/neu2-io-rv1126_defconfig +++ b/configs/neu2-io-rv1126_defconfig @@ -17,7 +17,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_DEFAULT_FDT_FILE="rv1126-edgeble-neu2-io.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set diff --git a/configs/nsa325_defconfig b/configs/nsa325_defconfig index 539fcc4ac6..1f05d3b693 100644 --- a/configs/nsa325_defconfig +++ b/configs/nsa325_defconfig @@ -56,7 +56,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y -# CONFIG_DM_WARN is not set CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_LBA48=y diff --git a/configs/odroid-go-ultra_defconfig b/configs/odroid-go-ultra_defconfig index bc0bf9b896..49d628b76a 100644 --- a/configs/odroid-go-ultra_defconfig +++ b/configs/odroid-go-ultra_defconfig @@ -63,6 +63,7 @@ CONFIG_MESON_SERIAL=y CONFIG_SYSINFO=y CONFIG_SYSINFO_SMBIOS=y CONFIG_USB=y +CONFIG_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index f13735e91c..98aed846f1 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -8,6 +8,7 @@ CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e CONFIG_DRAM_SUN50I_H616_TPR10=0xf83438 CONFIG_MACH_SUN50I_H616=y CONFIG_SUNXI_DRAM_H616_DDR3_1333=y +CONFIG_USB1_VBUS_PIN="PC16" CONFIG_R_I2C_ENABLE=y CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set @@ -19,6 +20,7 @@ CONFIG_SYS_I2C_SPEED=400000 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y +CONFIG_AXP305_POWER=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_zero3_defconfig b/configs/orangepi_zero3_defconfig new file mode 100644 index 0000000000..5a019fed84 --- /dev/null +++ b/configs/orangepi_zero3_defconfig @@ -0,0 +1,32 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-orangepi-zero3" +CONFIG_SPL=y +CONFIG_DRAM_SUN50I_H616_DX_ODT=0x07070707 +CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e +CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e +CONFIG_DRAM_SUN50I_H616_ODT_EN=0xaaaaeeee +CONFIG_DRAM_SUN50I_H616_TPR6=0x44000000 +CONFIG_DRAM_SUN50I_H616_TPR10=0x402f6663 +CONFIG_DRAM_SUN50I_H616_TPR11=0x24242624 +CONFIG_DRAM_SUN50I_H616_TPR12=0x0f0f100f +CONFIG_MACH_SUN50I_H616=y +CONFIG_SUNXI_DRAM_H616_LPDDR4=y +CONFIG_DRAM_CLK=792 +CONFIG_USB1_VBUS_PIN="PC16" +CONFIG_R_I2C_ENABLE=y +CONFIG_SPL_SPI_SUNXI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_I2C=y +CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_SYS_I2C_MVTWSI=y +CONFIG_SYS_I2C_SLAVE=0x7f +CONFIG_SYS_I2C_SPEED=400000 +CONFIG_SPI_FLASH_ZBIT=y +CONFIG_PHY_MOTORCOMM=y +CONFIG_SUN8I_EMAC=y +CONFIG_AXP313_POWER=y +CONFIG_SPI=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig index ff6411d894..101f20f115 100644 --- a/configs/pogo_v4_defconfig +++ b/configs/pogo_v4_defconfig @@ -56,7 +56,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -# CONFIG_DM_WARN is not set CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 CONFIG_LBA48=y diff --git a/configs/quartzpro64-rk3588_defconfig b/configs/quartzpro64-rk3588_defconfig index d6b35c7264..85af4c4ff9 100644 --- a/configs/quartzpro64-rk3588_defconfig +++ b/configs/quartzpro64-rk3588_defconfig @@ -61,7 +61,6 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_PHY_REALTEK=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y -CONFIG_RTL8169=y CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y diff --git a/configs/radxa-zero2_defconfig b/configs/radxa-zero2_defconfig index e9415762ff..b795681b3f 100644 --- a/configs/radxa-zero2_defconfig +++ b/configs/radxa-zero2_defconfig @@ -52,6 +52,7 @@ CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y CONFIG_USB=y +CONFIG_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index 6c48b33dca..d3f146674e 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -20,7 +20,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="uDPU>> " @@ -82,6 +81,7 @@ CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y # CONFIG_SCSI is not set +CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_MVEBU_A3700_UART=y CONFIG_MVEBU_A3700_SPI=y CONFIG_SYSINFO=y diff --git a/configs/x96_mate_defconfig b/configs/x96_mate_defconfig index 318951e19c..e805e0952b 100644 --- a/configs/x96_mate_defconfig +++ b/configs/x96_mate_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 +CONFIG_AXP305_POWER=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index d6d6dc1664..222da5aaa3 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -59,7 +59,6 @@ CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_SLEEP is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_MMC is not set CONFIG_ARM_DCC=y diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index 858bb35e00..1d73790c0e 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -57,7 +57,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 2488edea41..747f20d319 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -57,7 +57,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y diff --git a/configs/xilinx_versal_mini_ospi_defconfig b/configs/xilinx_versal_mini_ospi_defconfig index 539ce2d3c0..96be5b92b9 100644 --- a/configs/xilinx_versal_mini_ospi_defconfig +++ b/configs/xilinx_versal_mini_ospi_defconfig @@ -51,7 +51,6 @@ CONFIG_SYS_PROMPT="Versal> " # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y diff --git a/configs/xilinx_versal_mini_qspi_defconfig b/configs/xilinx_versal_mini_qspi_defconfig index 336aa8548e..7181b89a65 100644 --- a/configs/xilinx_versal_mini_qspi_defconfig +++ b/configs/xilinx_versal_mini_qspi_defconfig @@ -53,7 +53,6 @@ CONFIG_SYS_PROMPT="Versal> " # CONFIG_CMD_SETEXPR is not set # CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_GPIO is not set # CONFIG_I2C is not set diff --git a/configs/xilinx_versal_net_mini_defconfig b/configs/xilinx_versal_net_mini_defconfig index 3f45630a11..7dac1ec54e 100644 --- a/configs/xilinx_versal_net_mini_defconfig +++ b/configs/xilinx_versal_net_mini_defconfig @@ -62,7 +62,6 @@ CONFIG_CMD_CACHE=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_GPIO is not set # CONFIG_I2C is not set diff --git a/configs/xilinx_versal_net_mini_emmc_defconfig b/configs/xilinx_versal_net_mini_emmc_defconfig index 1d79eff331..fc88eee10a 100644 --- a/configs/xilinx_versal_net_mini_emmc_defconfig +++ b/configs/xilinx_versal_net_mini_emmc_defconfig @@ -51,7 +51,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_MMC_HS200_SUPPORT=y CONFIG_MMC_SDHCI=y diff --git a/configs/xilinx_versal_net_mini_ospi_defconfig b/configs/xilinx_versal_net_mini_ospi_defconfig index db3e7c80b2..1ba6e0871b 100644 --- a/configs/xilinx_versal_net_mini_ospi_defconfig +++ b/configs/xilinx_versal_net_mini_ospi_defconfig @@ -50,7 +50,6 @@ CONFIG_SYS_PROMPT="Versal NET> " # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_MMC is not set CONFIG_DM_SPI_FLASH=y diff --git a/configs/xilinx_versal_net_mini_qspi_defconfig b/configs/xilinx_versal_net_mini_qspi_defconfig index 37b3e76983..c9497bb6c2 100644 --- a/configs/xilinx_versal_net_mini_qspi_defconfig +++ b/configs/xilinx_versal_net_mini_qspi_defconfig @@ -52,7 +52,6 @@ CONFIG_SYS_PROMPT="Versal NET> " # CONFIG_CMD_SETEXPR is not set # CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_GPIO is not set # CONFIG_I2C is not set diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index fc768b613a..694fa1123e 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -55,7 +55,6 @@ CONFIG_CMD_CACHE=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_DM_MAILBOX is not set # CONFIG_MMC is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 72b1ad4660..f81b772c4c 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -66,7 +66,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_DM_MAILBOX is not set diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 310aad445a..6501ec3a06 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -66,7 +66,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_DM_MAILBOX is not set diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index ce224f80ec..bfe93dc965 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -51,7 +51,6 @@ CONFIG_SYS_PBSIZE=1049 CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_DM_MAILBOX is not set # CONFIG_MMC is not set diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index ce23cb1d01..91f5aa24bd 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -51,7 +51,6 @@ CONFIG_SYS_PBSIZE=1049 CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_DM_MAILBOX is not set # CONFIG_MMC is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 4a74ca76a2..a6f36fe30a 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -67,7 +67,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_FIRMWARE is not set diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index cbe7cdb829..fc5b66695d 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -32,7 +32,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_DM_STDIO is not set # CONFIG_DM_SEQ_ALIAS is not set diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index 19f653f40d..1d8e5f6fd0 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -69,7 +69,6 @@ CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_MMC is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 64df1f0b83..db7cb632d5 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -68,7 +68,6 @@ CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_MMC is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 9368fb4ffb..dcb22ed364 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -77,7 +77,6 @@ CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -# CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_MMC is not set diff --git a/doc/arch/sandbox/sandbox.rst b/doc/arch/sandbox/sandbox.rst index 23902dee89..5f8db12665 100644 --- a/doc/arch/sandbox/sandbox.rst +++ b/doc/arch/sandbox/sandbox.rst @@ -424,15 +424,59 @@ space. See existing code for examples. VPL (Verifying Program Loader) ------------------------------ -Sandbox provides an example build of vpl called `sandbox_vpl`. This can be run -using:: +Sandbox provides an example build of vpl called `sandbox_vpl`. To build it: - /path/to/sandbox_vpl/tpl/u-boot-tpl -D +.. code-block:: bash + + make sandbox_vpl_defconfig all + +This can be run using: + +.. code-block:: bash + + ./tpl/u-boot-tpl -d u-boot.dtb It starts up TPL (first-stage init), then VPL, then runs SPL and finally U-Boot proper, following the normal flow for a verified boot. At present, no verification is actually implemented. +Here is an example trace:: + + U-Boot TPL 2024.01-rc2-00129 (Nov 19 2023 - 08:10:12 -0700) + Trying to boot from sandbox_image + Trying to boot from sandbox_file + + U-Boot VPL 2024.01-rc2-00129 (Nov 19 2023 - 08:10:12 -0700) + Trying to boot from vbe_simple + Trying to boot from sandbox_image + Trying to boot from sandbox_file + + U-Boot SPL 2024.01-rc2-00129 (Nov 19 2023 - 08:10:12 -0700) + Trying to boot from vbe_simple + Trying to boot from sandbox_image + Trying to boot from sandbox_file + + + U-Boot 2024.01-rc2-00129 (Nov 19 2023 - 08:10:12 -0700) + + Reset Status: COLD + Model: sandbox + DRAM: 256 MiB + using memory 0x1b576000-0x1f578000 for malloc() + + Warning: host_lo MAC addresses don't match: + Address in ROM is 96:cd:ef:82:78:51 + Address in environment is 02:00:11:22:33:44 + Core: 103 devices, 51 uclasses, devicetree: board + MMC: + Loading Environment from nowhere... OK + In: serial,cros-ec-keyb,usbkbd + Out: serial,vidconsole + Err: serial,vidconsole + Model: sandbox + Net: eth0: host_lo, eth1: host_enp14s0, eth2: host_eth6, eth3: host_wlp15s0, eth4: host_virbr0, eth5: host_docker0, eth6: eth@10002000 + Hit any key to stop autoboot: 1 + Debugging the init sequence --------------------------- diff --git a/doc/board/allwinner/sunxi.rst b/doc/board/allwinner/sunxi.rst index 797222d8d3..d0c89b956b 100644 --- a/doc/board/allwinner/sunxi.rst +++ b/doc/board/allwinner/sunxi.rst @@ -251,8 +251,7 @@ the SPI flash content from Linux, using the `MTD utils`_:: # apt-get install mtd-utils # mtdinfo - # mtd_debug erase /dev/mtdX 0 0xf0000 - # mtd_debug write /dev/mtdX 0 0xf0000 u-boot-sunxi-with-spl.bin + # flashcp -v u-boot-sunxi-with-spl.bin /dev/mtdX ``/dev/mtdX`` needs to be replaced with the respective device name, as listed in the output of ``mtdinfo``. diff --git a/doc/board/hisilicon/hikey.rst b/doc/board/hisilicon/hikey.rst new file mode 100644 index 0000000000..8038a24fe1 --- /dev/null +++ b/doc/board/hisilicon/hikey.rst @@ -0,0 +1,261 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +HiKey board +########### + +Introduction +============ + +HiKey is the first certified 96Boards Consumer Edition board. The board/SoC has: + +* HiSilicon Kirin 6220 eight-core ARM Cortex-A53 64-bit SoC running at 1.2GHz. +* ARM Mali 450-MP4 GPU +* 1GB 800MHz LPDDR3 DRAM +* 4GB eMMC Flash Storage +* microSD +* 802.11a/b/g/n WiFi, Bluetooth + +The HiKey schematic can be found here: +https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/HiKey_schematics_LeMaker_version_Rev_A1.pdf + +The SoC datasheet can be found here: +https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf + +Currently the u-boot port supports: + +* USB +* eMMC +* SD card +* GPIO + +The HiKey U-Boot port has been tested with l-loader, booting ATF, which then +boots U-Boot as the bl33.bin executable. + +Compile from source +=================== + +First get all the sources + +.. code-block:: bash + + mkdir -p ~/hikey/src ~/hikey/bin + cd ~/hikey/src + git clone https://github.com/96boards-hikey/edk2 -b testing/hikey960_v2.5 + git clone https://github.com/ARM-software/arm-trusted-firmware + git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2 + git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4 + git clone https://github.com/96boards-hikey/atf-fastboot + wget https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/hisi-idt.py + +Get the BL30 mcuimage.bin binary. It is shipped as part of the UEFI source. +The latest version can be obtained from the OpenPlatformPkg repo. + +.. code-block:: bash + + cp OpenPlatformPkg/Platforms/Hisilicon/HiKey/Binary/mcuimage.bin ~/hikey/bin/ + +Get nvme.img binary + +.. code-block:: bash + + wget -P ~/hikey/bin https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/nvme.img + +Compile U-Boot +============== + +.. code-block:: bash + + cd ~/hikey/src/u-boot + make CROSS_COMPILE=aarch64-linux-gnu- hikey_config + make CROSS_COMPILE=aarch64-linux-gnu- + cp u-boot.bin ~/hikey/bin + +Compile ARM Trusted Firmware (ATF) +================================== + +.. code-block:: bash + + cd ~/hikey/src/arm-trusted-firmware + make CROSS_COMPILE=aarch64-linux-gnu- all fip \ + SCP_BL2=~/hikey/bin/mcuimage.bin \ + BL33=~/hikey/bin/u-boot.bin DEBUG=1 PLAT=hikey + +Copy the resulting FIP binary + +.. code-block:: bash + + cp build/hikey/debug/fip.bin ~/hikey/bin + +Compile ATF Fastboot +==================== + +.. code-block:: bash + + cd ~/hikey/src/atf-fastboot + make CROSS_COMPILE=aarch64-linux-gnu- PLAT=hikey DEBUG=1 + +Compile l-loader +================ + +.. code-block:: bash + + cd ~/hikey/src/l-loader + ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl1.bin + ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl2.bin + ln -sf ~/hikey/src/atf-fastboot/build/hikey/debug/bl1.bin fastboot.bin + make hikey PTABLE_LST=aosp-8g + +Copy the resulting binaries + +.. code-block:: bash + + cp *.img ~/hikey/bin + cp l-loader.bin ~/hikey/bin + cp recovery.bin ~/hikey/bin + +These instructions are adapted from +https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey.rst + +Flashing +======== + +1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with +the hisi-idt.py utility. Then connect a USB A to B mini cable from your PC to the USB OTG port of HiKey and execute the below command. + +The command below assumes HiKey enumerated as the first USB serial port + +.. code-block:: bash + + sudo python ~/hikey/src/hisi-idt.py -d /dev/ttyUSB0 --img1 ~/hikey/bin/recovery.bin + +2. Once LED 0 comes on solid, HiKey board should be detected as a fastboot device. + +.. code-block:: + + sudo fastboot devices + + 0123456789ABCDEF fastboot + +3. Flash the images + +.. code-block:: + + sudo fastboot flash ptable ~/hikey/bin/prm_ptable.img + sudo fastboot flash loader ~/hikey/bin/l-loader.bin + sudo fastboot flash fastboot ~/hikey/bin/fip.bin + sudo fastboot flash nvme ~/hikey/bin/nvme.img + +4. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully) + have ATF, booting u-boot from eMMC. + + Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you + will get 'dwc_otg_core_host_init: Timeout!' errors. + +See working boot trace below on UART3 available at Low Speed Expansion header:: + + NOTICE: BL2: v1.5(debug):v1.5-694-g6d4f6aea + NOTICE: BL2: Built : 09:21:42, Aug 29 2018 + INFO: BL2: Doing platform setup + INFO: ddr3 rank1 init pass + INFO: succeed to set ddrc 150mhz + INFO: ddr3 rank1 init pass + INFO: succeed to set ddrc 266mhz + INFO: ddr3 rank1 init pass + INFO: succeed to set ddrc 400mhz + INFO: ddr3 rank1 init pass + INFO: succeed to set ddrc 533mhz + INFO: ddr3 rank1 init pass + INFO: succeed to set ddrc 800mhz + INFO: Samsung DDR + INFO: ddr test value:0xa5a55a5a + INFO: BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000 + INFO: BL2: TrustZone: protecting 4194304 bytes of memory at 0x3e800000 + INFO: [BDID] [fff91c18] midr: 0x410fd033 + INFO: init_acpu_dvfs: pmic version 17 + INFO: init_acpu_dvfs: ACPU_CHIP_MAX_FREQ=0x186a00. + INFO: acpu_dvfs_volt_init: success! + INFO: acpu_dvfs_set_freq: support freq num is 5 + INFO: acpu_dvfs_set_freq: start prof is 0x4 + INFO: acpu_dvfs_set_freq: magic is 0x5a5ac5c5 + INFO: acpu_dvfs_set_freq: voltage: + INFO: - 0: 0x49 + INFO: - 1: 0x49 + INFO: - 2: 0x50 + INFO: - 3: 0x60 + INFO: - 4: 0x78 + NOTICE: acpu_dvfs_set_freq: set acpu freq success!INFO: BL2: Loading image id 2 + INFO: Loading image id=2 at address 0x1000000 + INFO: Image id=2 loaded: 0x1000000 - 0x1023d00 + INFO: hisi_mcu_load_image: mcu sections 0: + INFO: hisi_mcu_load_image: src = 0x1000200 + INFO: hisi_mcu_load_image: dst = 0xf6000000 + INFO: hisi_mcu_load_image: size = 31184 + INFO: hisi_mcu_load_image: [SRC 0x1000200] 0x8000 0x3701 0x7695 0x7689 + INFO: hisi_mcu_load_image: [DST 0xf6000000] 0x8000 0x3701 0x7695 0x7689 + INFO: hisi_mcu_load_image: mcu sections 1: + INFO: hisi_mcu_load_image: src = 0x1007bd0 + INFO: hisi_mcu_load_image: dst = 0x5e00000 + INFO: hisi_mcu_load_image: size = 93828 + INFO: hisi_mcu_load_image: [SRC 0x1007bd0] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57 + INFO: hisi_mcu_load_image: [DST 0x5e00000] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57 + INFO: hisi_mcu_load_image: mcu sections 2: + INFO: hisi_mcu_load_image: src = 0x101ea54 + INFO: hisi_mcu_load_image: dst = 0x5e16e84 + INFO: hisi_mcu_load_image: size = 15428 + INFO: hisi_mcu_load_image: [SRC 0x101ea54] 0x9 0x1020640 0x10001 0x8f0d180 + INFO: hisi_mcu_load_image: [DST 0x5e16e84] 0x9 0x1020640 0x10001 0x8f0d180 + INFO: hisi_mcu_load_image: mcu sections 3: + INFO: hisi_mcu_load_image: src = 0x1022698 + INFO: hisi_mcu_load_image: dst = 0x5e22a10 + INFO: hisi_mcu_load_image: size = 3060 + INFO: hisi_mcu_load_image: [SRC 0x1022698] 0x0 0x0 0x0 0x0 + INFO: hisi_mcu_load_image: [DST 0x5e22a10] 0x0 0x0 0x0 0x0 + INFO: hisi_mcu_load_image: mcu sections 4: + INFO: hisi_mcu_load_image: src = 0x102328c + INFO: hisi_mcu_load_image: dst = 0x5e23604 + INFO: hisi_mcu_load_image: size = 2616 + INFO: hisi_mcu_load_image: [SRC 0x102328c] 0xf80000a0 0x0 0xf80000ac 0x0 + INFO: hisi_mcu_load_image: [DST 0x5e23604] 0xf80000a0 0x0 0xf80000ac 0x0 + INFO: hisi_mcu_start_run: AO_SC_SYS_CTRL2=0 + INFO: plat_hikey_bl2_handle_scp_bl2: MCU PC is at 0x42933301 + INFO: plat_hikey_bl2_handle_scp_bl2: AO_SC_PERIPH_CLKSTAT4 is 0x3b018f09 + WARNING: BL2: Platform setup already done!! + INFO: BL2: Loading image id 3 + INFO: Loading image id=3 at address 0xf9858000 + INFO: Image id=3 loaded: 0xf9858000 - 0xf9860058 + INFO: BL2: Loading image id 5 + INFO: Loading image id=5 at address 0x35000000 + INFO: Image id=5 loaded: 0x35000000 - 0x35061cd2 + NOTICE: BL2: Booting BL31 + INFO: Entry point address = 0xf9858000 + INFO: SPSR = 0x3cd + NOTICE: BL31: v1.5(debug):v1.5-694-g6d4f6aea + NOTICE: BL31: Built : 09:21:44, Aug 29 2018 + WARNING: Using deprecated integer interrupt array in gicv2_driver_data_t + WARNING: Please migrate to using an interrupt_prop_t array + INFO: ARM GICv2 driver initialized + INFO: BL31: Initializing runtime services + INFO: BL31: cortex_a53: CPU workaround for disable_non_temporal_hint was applied + INFO: BL31: cortex_a53: CPU workaround for 843419 was applied + INFO: BL31: cortex_a53: CPU workaround for 855873 was applied + INFO: BL31: Preparing for EL3 exit to normal world + INFO: Entry point address = 0x35000000 + INFO: SPSR = 0x3c9 + + U-Boot 2018.09-rc1 (Aug 22 2018 - 14:55:49 +0530)hikey + + DRAM: 990 MiB + HI6553 PMIC init + MMC: config_sd_carddetect: SD card present + Hisilicon DWMMC: 0, Hisilicon DWMMC: 1 + Loading Environment from FAT... Unable to use mmc 1:1... Failed (-5) + In: uart@f7113000 + Out: uart@f7113000 + Err: uart@f7113000 + Net: Net Initialization Skipped + No ethernet found. + Hit any key to stop autoboot: 0 + starting USB... + USB0: scanning bus 0 for devices... 2 USB Device(s) found + scanning usb for storage devices... 0 Storage Device(s) found + scanning usb for ethernet devices... 0 Ethernet Device(s) found diff --git a/doc/board/hisilicon/hikey960.rst b/doc/board/hisilicon/hikey960.rst new file mode 100644 index 0000000000..93e983b99f --- /dev/null +++ b/doc/board/hisilicon/hikey960.rst @@ -0,0 +1,284 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +HiKey960 board +############## + +Introduction +============ + +HiKey960 is one of the 96Boards Consumer Edition board from HiSilicon. +The board/SoC has: + +* HiSilicon Kirin960 (HI3660) SoC with 4xCortex-A73 and 4xCortex-A53 +* ARM Mali G71 MP8 GPU +* 3GB LPDDR4 SDRAM +* 32GB UFS Flash Storage +* microSD +* 802.11a/b/g/n WiFi, Bluetooth + +More information about this board can be found in 96Boards website: +https://www.96boards.org/product/hikey960/ + +Currently the u-boot port supports: + +* SD card + +Compile from source +=================== + +First get all the sources + +.. code-block:: bash + + mkdir -p ~/hikey960/src ~/hikey960/bin + cd ~/hikey960/src + git clone https://github.com/ARM-software/arm-trusted-firmware + git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4 + git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2 + wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/config + wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_usb_xloader.img + wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_uce_boot.img + wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_xloader.img + wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/recovery.bin + wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hikey_idt + +Get the SCP_BL2 lpm3.img binary. It is shipped as part of the UEFI source. +The latest version can be obtained from the OpenPlatformPkg repo. + +.. code-block:: bash + + cp OpenPlatformPkg/Platforms/Hisilicon/HiKey960/Binary/lpm3.img ~/hikey960/bin/ + +Compile U-Boot +============== + +.. code-block:: bash + + cd ~/hikey960/src/u-boot + make CROSS_COMPILE=aarch64-linux-gnu- hikey960_defconfig + make CROSS_COMPILE=aarch64-linux-gnu- + cp u-boot.bin ~/hikey960/bin/ + +Compile ARM Trusted Firmware (ATF) +================================== + +.. code-block:: bash + + cd ~/hikey960/src/arm-trusted-firmware + make CROSS_COMPILE=aarch64-linux-gnu- all fip \ + SCP_BL2=~/hikey960/bin/lpm3.img \ + BL33=~/hikey960/bin/u-boot.bin DEBUG=1 PLAT=hikey960 + +Copy the resulting FIP binary + +.. code-block:: bash + + cp build/hikey960/debug/fip.bin ~/hikey960/bin + +Compile l-loader +================ + +.. code-block:: bash + + cd ~/hikey960/src/l-loader + ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/bl1.bin + ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/bl2.bin + ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/fip.bin + ln -sf ~/hikey960/bin/u-boot.bin + make hikey960 PTABLE_LST=linux-32g NS_BL1U=u-boot.bin + +Copy the resulting binaries + +.. code-block:: bash + + cp *.img ~/hikey960/bin + cp l-loader.bin ~/hikey960/bin + +These instructions are adapted from +https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey960.rst + +Setup console +============= + +Install ser2net. Use telnet as the console since UEFI in recovery mode +output window fails to display in minicom. + +.. code-block:: bash + + sudo apt-get install ser2net + +Configure ser2net + +.. code-block:: bash + + sudo vi /etc/ser2net.conf + +Append one line for serial-over-USB in #ser2net.conf + + 2004:telnet:0:/dev/ttyUSB0:115200 8DATABITS NONE 1STOPBIT banner + +Start ser2net + +.. code-block:: bash + + sudo killall ser2net + sudo ser2net -u + +Open the console. + +.. code-block:: bash + + telnet localhost 2004 + +And you could open the console remotely, too. + +Flashing +======== + +1. Boot Hikey960 into recovery mode as per the below document: +https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey960/installation/board-recovery.md + +Once Hikey960 is in recovery mode, flash the recovery binary: + +.. code-block:: bash + + cd ~/hikey960/src + chmod +x ./hikey_idt + sudo ./hikey_idt -c config -p /dev/ttyUSB1 + +Now move to the Hikey960 console and press `f` during UEFI boot. This +will allow the board to boot into fastboot mode. Once the board is in +fastboot mode, you should see the ID of the HiKey960 board using the +following command + +.. code-block:: bash + + sudo fastboot devices + + 1ED3822A018E3372 fastboot + +3. Flash the images + +Now, the images can be flashed using fastboot: + +.. code-block:: bash + + sudo fastboot flash ptable ~/hikey960/bin/prm_ptable.img + sudo fastboot flash xloader ~/hikey960/bin/hisi-sec_xloader.img + sudo fastboot flash fastboot ~/hikey960/bin/l-loader.bin + sudo fastboot flash fip ~/hikey960/bin/fip.bin + +4. Set the "Boot Mode" switch to OFF position for normal boot mode. +Then power on HiKey960 + +Observe the console traces using UART6 on the Low Speed Expansion header:: + + NOTICE: BL2: v2.1(debug):v2.1-531-g3ee48f40 + NOTICE: BL2: Built : 18:15:58, Aug 2 2019 + INFO: BL2: Doing platform setup + INFO: UFS LUN0 contains 1024 blocks with 4096-byte size + INFO: UFS LUN1 contains 1024 blocks with 4096-byte size + INFO: UFS LUN2 contains 2048 blocks with 4096-byte size + INFO: UFS LUN3 contains 7805952 blocks with 4096-byte size + INFO: ufs: change power mode success + INFO: BL2: Loading image id 2 + INFO: Loading image id=2 at address 0x89c80000 + INFO: Image id=2 loaded: 0x89c80000 - 0x89cb5088 + INFO: BL2: Initiating SCP_BL2 transfer to SCP + INFO: BL2: SCP_BL2: 0x89c80000@0x35088 + INFO: BL2: SCP_BL2 HEAD: + INFO: BL2: SCP_BL2 0x7000 0x179 0x159 0x149 + INFO: BL2: SCP_BL2 0x189 0x18b 0x18d 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x18f + INFO: BL2: SCP_BL2 0x191 0x0 0x193 0x195 + INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd + INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd + INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd + INFO: BL2: SCP_BL2 0x4d454355 0x43494741 0x424d554e 0x21215245 + INFO: BL2: SCP_BL2 0x4a054904 0x42912000 0xf841bfbc 0xe7fa0b04 + INFO: BL2: SCP_BL2 0xb88cf000 0x3b18 0x3d1c 0x6809493e + INFO: BL2: SCP_BL2 0x4613680a 0x201f102 0xf0002a04 0x600a804c + INFO: BL2: SCP_BL2 0x204f04f 0xf203fb02 0xf102440a 0x60100204 + INFO: BL2: SCP_BL2 0x160f04f 0xf103fb01 0x68004834 0x61044408 + INFO: BL2: SCP_BL2 0x61866145 0xf8c061c7 0xf8c08020 0xf8c09024 + INFO: BL2: SCP_BL2 0xf8c0a028 0xf3efb02c 0xf3ef8208 0x68118309 + INFO: BL2: SCP_BL2 0xf1026401 0xf0110204 0xbf070f04 0x46113220 + INFO: BL2: SCP_BL2 TAIL: + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x19cad151 0x19b80040 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0 + INFO: BL2: SCP_BL2 transferred to SCP + INFO: start fw loading + INFO: fw load success + WARNING: BL2: Platform setup already done!! + INFO: BL2: Loading image id 3 + INFO: Loading image id=3 at address 0x1ac58000 + INFO: Image id=3 loaded: 0x1ac58000 - 0x1ac63024 + INFO: BL2: Loading image id 5 + INFO: Loading image id=5 at address 0x1ac98000 + INFO: Image id=5 loaded: 0x1ac98000 - 0x1ad0819c + NOTICE: BL2: Booting BL31 + INFO: Entry point address = 0x1ac58000 + INFO: SPSR = 0x3cd + NOTICE: BL31: v2.1(debug):v2.1-531-g3ee48f40 + NOTICE: BL31: Built : 18:16:01, Aug 2 2019 + INFO: ARM GICv2 driver initialized + INFO: BL31: Initializing runtime services + INFO: BL31: cortex_a53: CPU workaround for 855873 was applied + INFO: plat_setup_psci_ops: sec_entrypoint=0x1ac580fc + INFO: BL31: Preparing for EL3 exit to normal world + INFO: Entry point address = 0x1ac98000 + INFO: SPSR = 0x3c9 + + U-Boot 2019.07-00628-g286f05a6fc-dirty (Aug 02 2019 - 17:14:05 +0530) + Hikey960 + + DRAM: 3 GiB + PSCI: v1.1 + MMC: dwmmc1@ff37f000: 0 + Loading Environment from EXT4... ** File not found /uboot.env ** + + ** Unable to read "/uboot.env" from mmc0:2 ** + In: serial@fff32000 + Out: serial@fff32000 + Err: serial@fff32000 + Net: Net Initialization Skipped + No ethernet found. + Hit any key to stop autoboot: 0 + switch to partitions #0, OK + mmc0 is current device + Scanning mmc 0:1... + Found /extlinux/extlinux.conf + Retrieving file: /extlinux/extlinux.conf + 201 bytes read in 12 ms (15.6 KiB/s) + 1: hikey960-kernel + Retrieving file: /Image + 24689152 bytes read in 4377 ms (5.4 MiB/s) + append: earlycon=pl011,mmio32,0xfff32000 console=ttyAMA6,115200 rw root=/dev/mmcblk0p2 rot + Retrieving file: /hi3660-hikey960.dtb + 35047 bytes read in 14 ms (2.4 MiB/s) + ## Flattened Device Tree blob at 10000000 + Booting using the fdt blob at 0x10000000 + Using Device Tree in place at 0000000010000000, end 000000001000b8e6 + + Starting kernel ... + + [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034] + [ 0.000000] Linux version 5.2.0-03138-gd75da80dce39 (mani@Mani-XPS-13-9360) (gcc versi9 + [ 0.000000] Machine model: HiKey960 + [ 0.000000] earlycon: pl11 at MMIO32 0x00000000fff32000 (options '') + [ 0.000000] printk: bootconsole [pl11] enabled + [ 0.000000] efi: Getting EFI parameters from FDT: diff --git a/doc/board/hisilicon/index.rst b/doc/board/hisilicon/index.rst new file mode 100644 index 0000000000..5455b766f2 --- /dev/null +++ b/doc/board/hisilicon/index.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +HiSilicon +========= + +.. toctree:: + :maxdepth: 2 + + hikey + hikey960 + poplar diff --git a/doc/board/hisilicon/poplar.rst b/doc/board/hisilicon/poplar.rst new file mode 100644 index 0000000000..0fccc14b80 --- /dev/null +++ b/doc/board/hisilicon/poplar.rst @@ -0,0 +1,302 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Poplar board +############ + +Board Information +================= + +Developed by HiSilicon, the board features the Hi3798C V200 with an +integrated quad-core 64-bit ARM Cortex A53 processor and high +performance Mali T720 GPU, making it capable of running any commercial +set-top solution based on Linux or Android. Its high performance +specification also supports a premium user experience with up to H.265 +HEVC decoding of 4K video at 60 frames per second. + +* SOC Hisilicon Hi3798CV200 +* CPU Quad-core ARM Cortex-A53 64 bit +* DRAM DDR3/3L/4 SDRAM interface, maximum 32-bit data width 2 GB +* USB Two USB 2.0 ports One USB 3.0 ports +* CONSOLE USB-micro port for console support +* ETHERNET 1 GBe Ethernet +* PCIE One PCIe 2.0 interfaces +* JTAG 8-Pin JTAG +* EXPANSION INTERFACE Linaro 96Boards Low Speed Expansion slot +* DIMENSION Standard 160×120 mm 96Boards Enterprice Edition form factor +* WIFI 802.11AC 2*2 with Bluetooth +* CONNECTORS One connector for Smart Card One connector for TSI + +Build instructions +================== + +.. note:: + + U-Boot has a **strong** dependency with the l-loader and the ARM trusted + firmware repositories. + +The boot sequence is:: + + l-loader --> arm_trusted_firmware --> U-Boot + +U-Boot needs to be aware of the BL31 runtime location and size to avoid writing +over it. Currently, BL31 is being placed below the kernel text offset (check +poplar.c) but this could change in the future. + +The current version of U-Boot has been tested with + +- https://github.com/Linaro/poplar-l-loader.git:: + + commit f0988698dcc5c08bd0a8f50aa0457e138a5f438c + Author: Alex Elder <elder@linaro.org> + Date: Fri Jun 16 08:57:59 2017 -0500 + + l-loader: use external memory region definitions + + The ARM Trusted Firmware code now has a header file that collects + all the definitions for the memory regions used for its boot stages. + Include that file where needed, and use the definitions found therein + + Signed-off-by: Alex Elder <elder@linaro.org> + +- https://github.com/Linaro/poplar-arm-trusted-firmware.git:: + + commit 6ac42dd3be13c99aa8ce29a15073e2f19d935f68 + Author: Alex Elder <elder@linaro.org> + Date: Fri Jun 16 09:24:50 2017 -0500 + + poplar: define memory regions in a separate file + + Separate the definitions for memory regions used for the BL stage + images and FIP into a new file. The "l-loader" image uses knowledge + of the sizes and locations of these memory regions, and it can now + include this (external) header to get these definitions, rather than + having to make coordinated changes to both code bases. + + The new file has a complete set of definitions (more than may be + required by one or the other user). It also includes a summary of + how the boot process works, and how it uses these regions. + + It should now be relatively easy to adjust the sizes and locations + of these memory regions, or to add to them (e.g. for TEE). + + Signed-off-by: Alex Elder <elder@linaro.org> + + +Compile from source +------------------- + +Get all the sources + +.. code-block:: bash + + mkdir -p ~/poplar/src ~/poplar/bin + cd ~/poplar/src + git clone https://github.com/Linaro/poplar-l-loader.git l-loader + git clone https://github.com/Linaro/poplar-arm-trusted-firmware.git atf + git clone https://github.com/Linaro/poplar-U-Boot.git U-Boot + +Make sure you are using the correct branch on each one of these repositories. +The definition of "correct" might change over time (at this moment in time this +would be the "latest" branch). + +Compile U-Boot +~~~~~~~~~~~~~~ + +Prerequisite: + +.. code-block:: bash + + sudo apt-get install device-tree-compiler + +.. code-block:: bash + + cd ~/poplar/src/U-Boot + make CROSS_COMPILE=aarch64-linux-gnu- poplar_defconfig + make CROSS_COMPILE=aarch64-linux-gnu- + cp U-Boot.bin ~/poplar/bin + +Compile ARM Trusted Firmware (ATF) +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +.. code-block:: bash + + cd ~/poplar/src/atf + make CROSS_COMPILE=aarch64-linux-gnu- all fip \ + SPD=none BL33=~/poplar/bin/U-Boot.bin DEBUG=1 PLAT=poplar + +Copy resulting binaries + +.. code-block:: bash + + cp build/hi3798cv200/debug/bl1.bin ~/poplar/src/l-loader/atf/ + cp build/hi3798cv200/debug/fip.bin ~/poplar/src/l-loader/atf/ + +Compile l-loader +~~~~~~~~~~~~~~~~ + +.. code-block:: bash + + cd ~/poplar/src/l-loader + make clean + make CROSS_COMPILE=arm-linux-gnueabi- + +Due to BootROM requiremets, rename l-loader.bin to fastboot.bin: + +.. code-block:: bash + + cp l-loader.bin ~/poplar/bin/fastboot.bin + +Flash instructions +================== + +Two methods: + +Using USB debrick support + Copy fastboot.bin to a FAT partition on the USB drive and reboot the + poplar board while pressing S3(usb_boot). + + The system will execute the new U-Boot and boot into a shell which you + can then use to write to eMMC. + +Using U-BOOT from shell + 1) using AXIS usb ethernet dongle and tftp + 2) using FAT formated USB drive + +Flash using TFTP (USB ethernet dongle) +-------------------------------------- + +Plug a USB AXIS ethernet dongle on any of the USB2 ports on the Poplar board. +Copy fastboot.bin to your tftp server. +In U-Boot make sure your network is properly setup. + +Then:: + + => tftp 0x30000000 fastboot.bin + starting USB... + USB0: USB EHCI 1.00 + scanning bus 0 for devices... 1 USB Device(s) found + USB1: USB EHCI 1.00 + scanning bus 1 for devices... 3 USB Device(s) found + scanning usb for storage devices... 0 Storage Device(s) found + scanning usb for ethernet devices... 1 Ethernet Device(s) found + Waiting for Ethernet connection... done. + Using asx0 device + TFTP from server 192.168.1.4; our IP address is 192.168.1.10 + Filename 'poplar/fastboot.bin'. + Load address: 0x30000000 + Loading: ################################################################# + ################################################################# + ############################################################### + 2 MiB/s + done + Bytes transferred = 983040 (f0000 hex) + + => mmc write 0x30000000 0 0x780 + + MMC write: dev # 0, block # 0, count 1920 ... 1920 blocks written: OK + => reset + +Flash using USB FAT drive +------------------------- + +Copy fastboot.bin to any partition on a FAT32 formated usb flash drive. +Enter the uboot prompt:: + + => fatls usb 0:2 + 983040 fastboot.bin + + 1 file(s), 0 dir(s) + + => fatload usb 0:2 0x30000000 fastboot.bin + reading fastboot.bin + 983040 bytes read in 44 ms (21.3 MiB/s) + + => mmc write 0x30000000 0 0x780 + + MMC write: dev # 0, block # 0, count 1920 ... 1920 blocks written: OK + +Boot trace +========== + +:: + + Bootrom start + Boot Media: eMMC + Decrypt auxiliary code ...OK + + lsadc voltage min: 000000FE, max: 000000FF, aver: 000000FE, index: 00000000 + + Entry boot auxiliary code + + Auxiliary code - v1.00 + DDR code - V1.1.2 20160205 + Build: Mar 24 2016 - 17:09:44 + Reg Version: v134 + Reg Time: 2016/03/18 09:44:55 + Reg Name: hi3798cv2dmb_hi3798cv200_ddr3_2gbyte_8bitx4_4layers.reg + + Boot auxiliary code success + Bootrom success + + LOADER: Switched to aarch64 mode + LOADER: Entering ARM TRUSTED FIRMWARE + LOADER: CPU0 executes at 0x000ce000 + + INFO: BL1: 0xe1000 - 0xe7000 [size = 24576] + NOTICE: Booting Trusted Firmware + NOTICE: BL1: v1.3(debug):v1.3-372-g1ba9c60 + NOTICE: BL1: Built : 17:51:33, Apr 30 2017 + INFO: BL1: RAM 0xe1000 - 0xe7000 + INFO: BL1: Loading BL2 + INFO: Loading image id=1 at address 0xe9000 + INFO: Image id=1 loaded at address 0xe9000, size = 0x5008 + NOTICE: BL1: Booting BL2 + INFO: Entry point address = 0xe9000 + INFO: SPSR = 0x3c5 + NOTICE: BL2: v1.3(debug):v1.3-372-g1ba9c60 + NOTICE: BL2: Built : 17:51:33, Apr 30 2017 + INFO: BL2: Loading BL31 + INFO: Loading image id=3 at address 0x129000 + INFO: Image id=3 loaded at address 0x129000, size = 0x8038 + INFO: BL2: Loading BL33 + INFO: Loading image id=5 at address 0x37000000 + INFO: Image id=5 loaded at address 0x37000000, size = 0x58f17 + NOTICE: BL1: Booting BL31 + INFO: Entry point address = 0x129000 + INFO: SPSR = 0x3cd + INFO: Boot bl33 from 0x37000000 for 364311 Bytes + NOTICE: BL31: v1.3(debug):v1.3-372-g1ba9c60 + NOTICE: BL31: Built : 17:51:33, Apr 30 2017 + INFO: BL31: Initializing runtime services + INFO: BL31: Preparing for EL3 exit to normal world + INFO: Entry point address = 0x37000000 + INFO: SPSR = 0x3c9 + + U-Boot 2017.05-rc2-00130-gd2255b0 (Apr 30 2017 - 17:51:28 +0200)poplar + + Model: HiSilicon Poplar Development Board + BOARD: Hisilicon HI3798cv200 Poplar + DRAM: 1 GiB + MMC: Hisilicon DWMMC: 0 + In: serial@f8b00000 + Out: serial@f8b00000 + Err: serial@f8b00000 + Net: Net Initialization Skipped + No ethernet found. + + Hit any key to stop autoboot: 0 + starting USB... + USB0: USB EHCI 1.00 + scanning bus 0 for devices... 1 USB Device(s) found + USB1: USB EHCI 1.00 + scanning bus 1 for devices... 4 USB Device(s) found + scanning usb for storage devices... 1 Storage Device(s) found + scanning usb for ethernet devices... 1 Ethernet Device(s) found + + USB device 0: + Device 0: Vendor: SanDisk Rev: 1.00 Prod: Cruzer Blade + Type: Removable Hard Disk + Capacity: 7632.0 MB = 7.4 GB (15630336 x 512) + ... is now current device + Scanning usb 0:1... + => diff --git a/doc/board/index.rst b/doc/board/index.rst index 35dd3bcf5f..531e547e7e 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -26,6 +26,7 @@ Board-specific doc gateworks/index google/index highbank/index + hisilicon/index htc/index intel/index kontron/index diff --git a/doc/build/clang.rst b/doc/build/clang.rst index cc265506c2..09bb988e92 100644 --- a/doc/build/clang.rst +++ b/doc/build/clang.rst @@ -11,14 +11,6 @@ The ARM backend can be instructed not to use the r9 and x18 registers using supported inline assembly is needed to get and set the r9 or x18 value. This leads to larger code then strictly necessary, but at least works. -**NOTE:** target compilation only work for _some_ ARM boards at the moment. -Also AArch64 is not supported currently due to a lack of private libgcc -support. Boards which reassign gd in c will also fail to compile, but there is -in no strict reason to do so in the ARM world, since crt0.S takes care of this. -These assignments can be avoided by changing the init calls but this is not in -mainline yet. - - Debian based ------------ @@ -28,14 +20,20 @@ Required packages can be installed via apt, e.g. sudo apt-get install clang -Note that we still use binutils for some tools so we must continue to set -CROSS_COMPILE. To compile U-Boot with Clang on Linux without IAS use e.g. +We make use of the CROSS_COMPILE variable to derive the build target which is +passed as the --target parameter to clang. + +The CROSS_COMPILE variable further determines the paths to other build +tools. As assembler we use the binary pointed to by '$(CROSS_COMPILE)as' +instead of the LLVM integrated assembler (IAS). + +Here is an example demonstrating building U-Boot for the Raspberry Pi 2 +using clang: .. code-block:: bash make HOSTCC=clang rpi_2_defconfig - make HOSTCC=clang CROSS_COMPILE=arm-linux-gnueabi- \ - CC="clang -target arm-linux-gnueabi" -j8 + make HOSTCC=clang CROSS_COMPILE=arm-linux-gnueabi- CC=clang -j8 It can also be used to compile sandbox: diff --git a/doc/develop/bootstd.rst b/doc/develop/bootstd.rst index 51cd573662..496e24bc7a 100644 --- a/doc/develop/bootstd.rst +++ b/doc/develop/bootstd.rst @@ -247,7 +247,7 @@ fdtfile Name of the flattened device tree (FDT) file to load, e.g. "rockchip/rk3399-rockpro64.dtb" -fdtaddr_addr_r +fdt_addr_r Address at which to load the FDT, e.g. 0x01f00000 fdtoverlay_addr_r (needed if overlays are used) diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index 0e753453b6..37e9fc1a34 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -68,9 +68,9 @@ For the next scheduled release, release candidates were made on:: * U-Boot v2024.01-rc2 was released on Mon 06 November 2023. -.. * U-Boot v2024.01-rc3 was released on Mon 20 November 2023. +* U-Boot v2024.01-rc3 was released on Mon 20 November 2023. -.. * U-Boot v2024.01-rc4 was released on Mon 04 December 2023. +* U-Boot v2024.01-rc4 was released on Mon 04 December 2023. .. * U-Boot v2024.01-rc5 was released on Mon 18 December 2023. diff --git a/doc/develop/sending_patches.rst b/doc/develop/sending_patches.rst index ba73d0d11b..5a6962f102 100644 --- a/doc/develop/sending_patches.rst +++ b/doc/develop/sending_patches.rst @@ -363,7 +363,7 @@ A Custodian has additional privileges and can: * Awaiting Upstream - * Superseeded + * Superseded * Deferred @@ -399,7 +399,7 @@ today. Not all states are used by all custodians. and has not merged yet to master, or has queued the patch up to be submitted to be merged, but has not yet. -* Superseeded: Patches are marked as 'superseeded' when the poster submits a +* Superseded: Patches are marked as 'superseded' when the poster submits a new version of these patches. * Deferred: Deferred usually means the patch depends on something else that diff --git a/doc/sphinx/load_config.py b/doc/sphinx/load_config.py index eeb394b39e..8b416bfd75 100644 --- a/doc/sphinx/load_config.py +++ b/doc/sphinx/load_config.py @@ -3,7 +3,7 @@ import os import sys -from sphinx.util.pycompat import execfile_ +from sphinx.util.osutil import fs_encoding # ------------------------------------------------------------------------------ def loadConfig(namespace): @@ -48,7 +48,9 @@ def loadConfig(namespace): sys.stdout.write("load additional sphinx-config: %s\n" % config_file) config = namespace.copy() config['__file__'] = config_file - execfile_(config_file, config) + with open(config_file, 'rb') as f: + code = compile(f.read(), fs_encoding, 'exec') + exec(code, config) del config['__file__'] namespace.update(config) else: diff --git a/drivers/clk/exynos/clk-pll.h b/drivers/clk/exynos/clk-pll.h index c79aac4425..7b7af5e676 100644 --- a/drivers/clk/exynos/clk-pll.h +++ b/drivers/clk/exynos/clk-pll.h @@ -5,4 +5,9 @@ * Thomas Abraham <thomas.ab@samsung.com> */ +#ifndef __EXYNOS_CLK_PLL_H +#define __EXYNOS_CLK_PLL_H + unsigned long pll145x_get_rate(unsigned int *con1, unsigned long fin_freq); + +#endif /* __EXYNOS_CLK_PLL_H */ diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c index 5405067861..98f95859f3 100644 --- a/drivers/i2c/i2c-uclass.c +++ b/drivers/i2c/i2c-uclass.c @@ -427,7 +427,7 @@ int i2c_get_chip_by_phandle(const struct udevice *parent, const char *prop_name, goto err_exit; } - ret = dev_read_u32(parent, "i2cbcdev", &phandle); + ret = dev_read_u32(parent, prop_name, &phandle); if (ret) goto err_exit; diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 8cd501c5f7..97aaf1e4ec 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -318,7 +318,7 @@ static unsigned int renesas_sdhi_init_tuning(struct tmio_sd_priv *priv) RENESAS_SDHI_SCC_DTCNTL_TAPNUM_MASK; } -static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv) +static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv, bool clk_disable) { u32 reg; @@ -350,6 +350,12 @@ static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv) reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); reg &= ~RENESAS_SDHI_SCC_RVSCNTL_RVSEN; tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); + + if (clk_disable) { + reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL); + reg &= ~TMIO_SD_CLKCTL_SCLKEN; + tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL); + } } static int renesas_sdhi_hs400(struct udevice *dev) @@ -629,7 +635,7 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) out: if (ret < 0) { dev_warn(dev, "Tuning procedure failed\n"); - renesas_sdhi_reset_tuning(priv); + renesas_sdhi_reset_tuning(priv, true); } return ret; @@ -668,7 +674,7 @@ static int renesas_sdhi_set_ios(struct udevice *dev) (mmc->selected_mode != UHS_SDR104) && (mmc->selected_mode != MMC_HS_200) && (mmc->selected_mode != MMC_HS_400)) { - renesas_sdhi_reset_tuning(priv); + renesas_sdhi_reset_tuning(priv, mmc->clk_disable); } #endif @@ -1095,7 +1101,7 @@ static int renesas_sdhi_probe(struct udevice *dev) CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \ CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) if (priv->caps & TMIO_SD_CAP_RCAR_UHS) - renesas_sdhi_reset_tuning(priv); + renesas_sdhi_reset_tuning(priv, true); #endif return 0; diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index 732b076045..abed392c28 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -224,6 +224,11 @@ config SPI_FLASH_XTX Add support for various XTX (XTX Technology Limited) SPI flash chips (XT25xxx). +config SPI_FLASH_ZBIT + bool "ZBIT SPI flash support" + help + Add support for Zbit Semiconductor Inc. SPI flash chips (ZB25xxx). + endif config SPI_FLASH_USE_4K_SECTORS diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 3cb132dcff..f86e7ff8e5 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -572,5 +572,10 @@ const struct flash_info spi_nor_ids[] = { { INFO("xt25w01g", 0x0b651B, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, #endif +#ifdef CONFIG_SPI_FLASH_ZBIT + /* Zbit Semiconductor Inc. */ + { INFO("zb25vq128", 0x5e4018, 0, 64 * 1024, 256, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, +#endif { }, }; diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 2395720c99..33b8bc1214 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -56,7 +56,6 @@ choice depends on ARCH_SUNXI default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40 - default AXP305_POWER if MACH_SUN50I_H616 default AXP818_POWER if MACH_SUN8I_A83T default SUNXI_NO_PMIC if MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_V3S diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c index b76aadb065..1330482c16 100644 --- a/drivers/scsi/scsi.c +++ b/drivers/scsi/scsi.c @@ -374,6 +374,7 @@ static int scsi_read_capacity(struct udevice *dev, struct scsi_cmd *pccb, pccb->cmd[0] = SCSI_RD_CAPAC10; pccb->cmd[1] = pccb->lun << 5; pccb->cmdlen = 10; + pccb->dma_dir = DMA_FROM_DEVICE; pccb->msgout[0] = SCSI_IDENTIFY; /* NOT USED */ pccb->datalen = 8; @@ -538,6 +539,7 @@ static int scsi_detect_dev(struct udevice *dev, int target, int lun, for (count = 0; count < 3; count++) { pccb->datalen = 0; + pccb->dma_dir = DMA_NONE; scsi_setup_test_unit_ready(pccb); err = scsi_exec(dev, pccb); if (!err) diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c index 7aeb8c0f8c..7d04dcff54 100644 --- a/drivers/serial/serial_s5p.c +++ b/drivers/serial/serial_s5p.c @@ -7,7 +7,6 @@ * based on drivers/serial/s3c64xx.c */ -#include <common.h> #include <dm.h> #include <errno.h> #include <fdtdec.h> @@ -21,32 +20,39 @@ #include <serial.h> #include <clk.h> -DECLARE_GLOBAL_DATA_PTR; - enum { PORT_S5P = 0, PORT_S5L }; +#define UFCON_FIFO_EN BIT(0) +#define UFCON_RX_FIFO_RESET BIT(1) +#define UMCON_RESET_VAL 0x0 +#define ULCON_WORD_8_BIT 0x3 +#define UCON_RX_IRQ_OR_POLLING BIT(0) +#define UCON_TX_IRQ_OR_POLLING BIT(2) +#define UCON_RX_ERR_IRQ_EN BIT(6) +#define UCON_TX_IRQ_LEVEL BIT(9) + #define S5L_RX_FIFO_COUNT_SHIFT 0 #define S5L_RX_FIFO_COUNT_MASK (0xf << S5L_RX_FIFO_COUNT_SHIFT) -#define S5L_RX_FIFO_FULL (1 << 8) +#define S5L_RX_FIFO_FULL BIT(8) #define S5L_TX_FIFO_COUNT_SHIFT 4 #define S5L_TX_FIFO_COUNT_MASK (0xf << S5L_TX_FIFO_COUNT_SHIFT) -#define S5L_TX_FIFO_FULL (1 << 9) +#define S5L_TX_FIFO_FULL BIT(9) #define S5P_RX_FIFO_COUNT_SHIFT 0 #define S5P_RX_FIFO_COUNT_MASK (0xff << S5P_RX_FIFO_COUNT_SHIFT) -#define S5P_RX_FIFO_FULL (1 << 8) +#define S5P_RX_FIFO_FULL BIT(8) #define S5P_TX_FIFO_COUNT_SHIFT 16 #define S5P_TX_FIFO_COUNT_MASK (0xff << S5P_TX_FIFO_COUNT_SHIFT) -#define S5P_TX_FIFO_FULL (1 << 24) +#define S5P_TX_FIFO_FULL BIT(24) /* Information about a serial port */ struct s5p_serial_plat { - struct s5p_uart *reg; /* address of registers in physical memory */ - u8 reg_width; /* register width */ - u8 port_id; /* uart port number */ + struct s5p_uart *reg; /* address of registers in physical memory */ + u8 reg_width; /* register width */ + u8 port_id; /* uart port number */ u8 rx_fifo_count_shift; u8 tx_fifo_count_shift; u32 rx_fifo_count_mask; @@ -59,7 +65,7 @@ struct s5p_serial_plat { * The coefficient, used to calculate the baudrate on S5P UARTs is * calculated as * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT - * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1, + * however, section 31.6.11 of the datasheet doesn't recommend using 1 for 1, * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants: */ static const int udivslot[] = { @@ -83,13 +89,15 @@ static const int udivslot[] = { static void __maybe_unused s5p_serial_init(struct s5p_uart *uart) { - /* enable FIFOs, auto clear Rx FIFO */ - writel(0x3, &uart->ufcon); - writel(0, &uart->umcon); - /* 8N1 */ - writel(0x3, &uart->ulcon); + /* Enable FIFOs, auto clear Rx FIFO */ + writel(UFCON_FIFO_EN | UFCON_RX_FIFO_RESET, &uart->ufcon); + /* No auto flow control, disable nRTS signal */ + writel(UMCON_RESET_VAL, &uart->umcon); + /* 8N1, no parity bit */ + writel(ULCON_WORD_8_BIT, &uart->ulcon); /* No interrupts, no DMA, pure polling */ - writel(0x245, &uart->ucon); + writel(UCON_RX_IRQ_OR_POLLING | UCON_TX_IRQ_OR_POLLING | + UCON_RX_ERR_IRQ_EN | UCON_TX_IRQ_LEVEL, &uart->ucon); } static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, u8 reg_width, @@ -118,7 +126,7 @@ int s5p_serial_setbrg(struct udevice *dev, int baudrate) #if IS_ENABLED(CONFIG_CLK_EXYNOS) || IS_ENABLED(CONFIG_ARCH_APPLE) struct clk clk; - u32 ret; + int ret; ret = clk_get_by_index(dev, 1, &clk); if (ret < 0) @@ -213,16 +221,13 @@ static int s5p_serial_of_to_plat(struct udevice *dev) { struct s5p_serial_plat *plat = dev_get_plat(dev); const ulong port_type = dev_get_driver_data(dev); - fdt_addr_t addr; - addr = dev_read_addr(dev); - if (addr == FDT_ADDR_T_NONE) + plat->reg = dev_read_addr_ptr(dev); + if (!plat->reg) return -EINVAL; - plat->reg = (struct s5p_uart *)addr; plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1); - plat->port_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "id", dev_seq(dev)); + plat->port_id = dev_read_u8_default(dev, "id", dev_seq(dev)); if (port_type == PORT_S5L) { plat->rx_fifo_count_shift = S5L_RX_FIFO_COUNT_SHIFT; @@ -244,10 +249,10 @@ static int s5p_serial_of_to_plat(struct udevice *dev) } static const struct dm_serial_ops s5p_serial_ops = { - .putc = s5p_serial_putc, - .pending = s5p_serial_pending, - .getc = s5p_serial_getc, - .setbrg = s5p_serial_setbrg, + .putc = s5p_serial_putc, + .pending = s5p_serial_pending, + .getc = s5p_serial_getc, + .setbrg = s5p_serial_setbrg, }; static const struct udevice_id s5p_serial_ids[] = { @@ -257,13 +262,13 @@ static const struct udevice_id s5p_serial_ids[] = { }; U_BOOT_DRIVER(serial_s5p) = { - .name = "serial_s5p", - .id = UCLASS_SERIAL, - .of_match = s5p_serial_ids, - .of_to_plat = s5p_serial_of_to_plat, + .name = "serial_s5p", + .id = UCLASS_SERIAL, + .of_match = s5p_serial_ids, + .of_to_plat = s5p_serial_of_to_plat, .plat_auto = sizeof(struct s5p_serial_plat), - .probe = s5p_serial_probe, - .ops = &s5p_serial_ops, + .probe = s5p_serial_probe, + .ops = &s5p_serial_ops, }; #endif @@ -291,10 +296,12 @@ static inline void _debug_uart_putc(int ch) struct s5p_uart *uart = (struct s5p_uart *)CONFIG_VAL(DEBUG_UART_BASE); #if IS_ENABLED(CONFIG_ARCH_APPLE) - while (readl(&uart->ufstat) & S5L_TX_FIFO_FULL); + while (readl(&uart->ufstat) & S5L_TX_FIFO_FULL) + ; writel(ch, &uart->utxh); #else - while (readl(&uart->ufstat) & S5P_TX_FIFO_FULL); + while (readl(&uart->ufstat) & S5P_TX_FIFO_FULL) + ; writeb(ch, &uart->utxh); #endif } diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index 744fde8069..6fb2de8a5a 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -610,6 +610,7 @@ static const struct udevice_id dwc3_glue_ids[] = { { .compatible = "rockchip,rk3328-dwc3", .data = (ulong)&rk_ops }, { .compatible = "rockchip,rk3399-dwc3" }, { .compatible = "rockchip,rk3568-dwc3", .data = (ulong)&rk_ops }, + { .compatible = "rockchip,rk3588-dwc3", .data = (ulong)&rk_ops }, { .compatible = "qcom,dwc3" }, { .compatible = "fsl,imx8mp-dwc3", .data = (ulong)&imx8mp_ops }, { .compatible = "fsl,imx8mq-dwc3" }, diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index 2bfacfe59f..750d471487 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -13,6 +13,7 @@ #include <cpu_func.h> #include <net.h> #include <malloc.h> +#include <wait_bit.h> #include <asm/byteorder.h> #include <asm/cache.h> #include <linux/delay.h> @@ -354,12 +355,49 @@ static int ci_ep_enable(struct usb_ep *ep, return 0; } +static int ep_disable(int num, int in) +{ + struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; + unsigned int ep_bit, enable_bit; + int err; + + if (in) { + ep_bit = EPT_TX(num); + enable_bit = CTRL_TXE; + } else { + ep_bit = EPT_RX(num); + enable_bit = CTRL_RXE; + } + + /* clear primed buffers */ + do { + writel(ep_bit, &udc->epflush); + err = wait_for_bit_le32(&udc->epflush, ep_bit, false, 1000, false); + if (err) + return err; + } while (readl(&udc->epstat) & ep_bit); + + /* clear enable bit */ + clrbits_le32(&udc->epctrl[num], enable_bit); + + return 0; +} + static int ci_ep_disable(struct usb_ep *ep) { struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); + int num, in, err; + + num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; + in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0; + + err = ep_disable(num, in); + if (err) + return err; ci_ep->desc = NULL; ep->desc = NULL; + ci_ep->req_primed = false; return 0; } diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 741775a7bc..9f322c9550 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -520,7 +520,7 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) cmdbuf[req->actual] = '\0'; cmd = fastboot_handle_command(cmdbuf, response); } else { - pr_err("buffer overflow"); + pr_err("buffer overflow\n"); fastboot_fail("buffer overflow", response); } diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index b501ea514b..35610ffc2b 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -90,7 +90,7 @@ config USB_XHCI_OMAP config USB_XHCI_PCI bool "Support for PCI-based xHCI USB controller" - depends on DM_USB + depends on DM_USB && PCI default y if X86 help Enables support for the PCI-based xHCI controller. diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index c8260cbdf9..b60661fe05 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -202,6 +202,7 @@ static dma_addr_t queue_trb(struct xhci_ctrl *ctrl, struct xhci_ring *ring, bool more_trbs_coming, unsigned int *trb_fields) { struct xhci_generic_trb *trb; + dma_addr_t addr; int i; trb = &ring->enqueue->generic; @@ -211,9 +212,11 @@ static dma_addr_t queue_trb(struct xhci_ctrl *ctrl, struct xhci_ring *ring, xhci_flush_cache((uintptr_t)trb, sizeof(struct xhci_generic_trb)); + addr = xhci_trb_virt_to_dma(ring->enq_seg, (union xhci_trb *)trb); + inc_enq(ctrl, ring, more_trbs_coming); - return xhci_trb_virt_to_dma(ring->enq_seg, (union xhci_trb *)trb); + return addr; } /** @@ -243,7 +246,8 @@ static int prepare_ring(struct xhci_ctrl *ctrl, struct xhci_ring *ep_ring, puts("WARN waiting for error on ep to be cleared\n"); return -EINVAL; case EP_STATE_HALTED: - puts("WARN halted endpoint, queueing URB anyway.\n"); + puts("WARN endpoint is halted\n"); + return -EINVAL; case EP_STATE_STOPPED: case EP_STATE_RUNNING: debug("EP STATE RUNNING.\n"); @@ -466,7 +470,8 @@ union xhci_trb *xhci_wait_for_event(struct xhci_ctrl *ctrl, trb_type expected) continue; type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->event_cmd.flags)); - if (type == expected) + if (type == expected || + (expected == TRB_NONE && type != TRB_PORT_STATUS)) return event; if (type == TRB_PORT_STATUS) @@ -492,8 +497,9 @@ union xhci_trb *xhci_wait_for_event(struct xhci_ctrl *ctrl, trb_type expected) if (expected == TRB_TRANSFER) return NULL; - printf("XHCI timeout on event type %d... cannot recover.\n", expected); - BUG(); + printf("XHCI timeout on event type %d...\n", expected); + + return NULL; } /* @@ -511,6 +517,9 @@ static void reset_ep(struct usb_device *udev, int ep_index) printf("Resetting EP %d...\n", ep_index); xhci_queue_command(ctrl, 0, udev->slot_id, ep_index, TRB_RESET_EP); event = xhci_wait_for_event(ctrl, TRB_COMPLETION); + if (!event) + return; + field = le32_to_cpu(event->trans_event.flags); BUG_ON(TRB_TO_SLOT_ID(field) != udev->slot_id); xhci_acknowledge_event(ctrl); @@ -519,6 +528,9 @@ static void reset_ep(struct usb_device *udev, int ep_index) (void *)((uintptr_t)ring->enqueue | ring->cycle_state)); xhci_queue_command(ctrl, addr, udev->slot_id, ep_index, TRB_SET_DEQ); event = xhci_wait_for_event(ctrl, TRB_COMPLETION); + if (!event) + return; + BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags)) != udev->slot_id || GET_COMP_CODE(le32_to_cpu( event->event_cmd.status)) != COMP_SUCCESS); @@ -538,29 +550,49 @@ static void abort_td(struct usb_device *udev, int ep_index) struct xhci_ctrl *ctrl = xhci_get_ctrl(udev); struct xhci_ring *ring = ctrl->devs[udev->slot_id]->eps[ep_index].ring; union xhci_trb *event; + xhci_comp_code comp; + trb_type type; u64 addr; u32 field; xhci_queue_command(ctrl, 0, udev->slot_id, ep_index, TRB_STOP_RING); - event = xhci_wait_for_event(ctrl, TRB_TRANSFER); - field = le32_to_cpu(event->trans_event.flags); - BUG_ON(TRB_TO_SLOT_ID(field) != udev->slot_id); - BUG_ON(TRB_TO_EP_INDEX(field) != ep_index); - BUG_ON(GET_COMP_CODE(le32_to_cpu(event->trans_event.transfer_len - != COMP_STOP))); - xhci_acknowledge_event(ctrl); + event = xhci_wait_for_event(ctrl, TRB_NONE); + if (!event) + return; - event = xhci_wait_for_event(ctrl, TRB_COMPLETION); - BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags)) - != udev->slot_id || GET_COMP_CODE(le32_to_cpu( - event->event_cmd.status)) != COMP_SUCCESS); + type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->event_cmd.flags)); + if (type == TRB_TRANSFER) { + field = le32_to_cpu(event->trans_event.flags); + BUG_ON(TRB_TO_SLOT_ID(field) != udev->slot_id); + BUG_ON(TRB_TO_EP_INDEX(field) != ep_index); + BUG_ON(GET_COMP_CODE(le32_to_cpu(event->trans_event.transfer_len + != COMP_STOP))); + xhci_acknowledge_event(ctrl); + + event = xhci_wait_for_event(ctrl, TRB_COMPLETION); + if (!event) + return; + type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->event_cmd.flags)); + + } else { + printf("abort_td: Expected a TRB_TRANSFER TRB first\n"); + } + + comp = GET_COMP_CODE(le32_to_cpu(event->event_cmd.status)); + BUG_ON(type != TRB_COMPLETION || + TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags)) + != udev->slot_id || (comp != COMP_SUCCESS && comp + != COMP_CTX_STATE)); xhci_acknowledge_event(ctrl); addr = xhci_trb_virt_to_dma(ring->enq_seg, (void *)((uintptr_t)ring->enqueue | ring->cycle_state)); xhci_queue_command(ctrl, addr, udev->slot_id, ep_index, TRB_SET_DEQ); event = xhci_wait_for_event(ctrl, TRB_COMPLETION); + if (!event) + return; + BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags)) != udev->slot_id || GET_COMP_CODE(le32_to_cpu( event->event_cmd.status)) != COMP_SUCCESS); @@ -644,6 +676,14 @@ int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe, ep_ctx = xhci_get_ep_ctx(ctrl, virt_dev->out_ctx, ep_index); + /* + * If the endpoint was halted due to a prior error, resume it before + * the next transfer. It is the responsibility of the upper layer to + * have dealt with whatever caused the error. + */ + if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) == EP_STATE_HALTED) + reset_ep(udev, ep_index); + ring = virt_dev->eps[ep_index].ring; /* * How much data is (potentially) left before the 64KB boundary? diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index 5cacf0769e..d13cbff9b3 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -451,6 +451,9 @@ static int xhci_configure_endpoints(struct usb_device *udev, bool ctx_change) xhci_queue_command(ctrl, in_ctx->dma, udev->slot_id, 0, ctx_change ? TRB_EVAL_CONTEXT : TRB_CONFIG_EP); event = xhci_wait_for_event(ctrl, TRB_COMPLETION); + if (!event) + return -ETIMEDOUT; + BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags)) != udev->slot_id); @@ -647,6 +650,9 @@ static int xhci_address_device(struct usb_device *udev, int root_portnr) xhci_queue_command(ctrl, virt_dev->in_ctx->dma, slot_id, 0, TRB_ADDR_DEV); event = xhci_wait_for_event(ctrl, TRB_COMPLETION); + if (!event) + return -ETIMEDOUT; + BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags)) != slot_id); switch (GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))) { @@ -722,6 +728,9 @@ static int _xhci_alloc_device(struct usb_device *udev) xhci_queue_command(ctrl, 0, 0, 0, TRB_ENABLE_SLOT); event = xhci_wait_for_event(ctrl, TRB_COMPLETION); + if (!event) + return -ETIMEDOUT; + BUG_ON(GET_COMP_CODE(le32_to_cpu(event->event_cmd.status)) != COMP_SUCCESS); diff --git a/drivers/virtio/virtio_rng.c b/drivers/virtio/virtio_rng.c index b85545c2ee..786359a6e3 100644 --- a/drivers/virtio/virtio_rng.c +++ b/drivers/virtio/virtio_rng.c @@ -20,7 +20,7 @@ struct virtio_rng_priv { static int virtio_rng_read(struct udevice *dev, void *data, size_t len) { int ret; - unsigned int rsize; + unsigned int rsize = 1; unsigned char buf[BUFFER_SIZE] __aligned(4); unsigned char *ptr = data; struct virtio_sg sg; @@ -29,7 +29,12 @@ static int virtio_rng_read(struct udevice *dev, void *data, size_t len) while (len) { sg.addr = buf; - sg.length = min(len, sizeof(buf)); + /* + * Work around implementations which always return 8 bytes + * less than requested, down to 0 bytes, which would + * cause an endless loop otherwise. + */ + sg.length = min(rsize ? len : len + 8, sizeof(buf)); sgs[0] = &sg; ret = virtqueue_add(priv->rng_vq, sgs, 0, 1); diff --git a/drivers/watchdog/s5p_wdt.c b/drivers/watchdog/s5p_wdt.c index 5ad7d2609f..80524a0010 100644 --- a/drivers/watchdog/s5p_wdt.c +++ b/drivers/watchdog/s5p_wdt.c @@ -6,6 +6,7 @@ #include <common.h> #include <asm/io.h> +#include <asm/arch/cpu.h> #include <asm/arch/watchdog.h> #define PRESCALER_VAL 255 diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c index ed329284de..417e8d7eef 100644 --- a/drivers/watchdog/wdt-uclass.c +++ b/drivers/watchdog/wdt-uclass.c @@ -7,6 +7,7 @@ #include <common.h> #include <cyclic.h> +#include <div64.h> #include <dm.h> #include <errno.h> #include <hang.h> @@ -141,7 +142,7 @@ int wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) printf("WDT: Started %s with%s servicing %s (%ds timeout)\n", dev->name, IS_ENABLED(CONFIG_WATCHDOG) ? "" : "out", - str, priv->timeout); + str, (u32)lldiv(timeout_ms, 1000)); } return ret; diff --git a/include/usb/xhci.h b/include/usb/xhci.h index 4a4ac10229..04d16a256b 100644 --- a/include/usb/xhci.h +++ b/include/usb/xhci.h @@ -901,6 +901,8 @@ union xhci_trb { /* TRB type IDs */ typedef enum { + /* reserved, used as a software sentinel */ + TRB_NONE = 0, /* bulk, interrupt, isoc scatter/gather, and control data stage */ TRB_NORMAL = 1, /* setup stage for control transfers */ diff --git a/lib/efi/efi_app.c b/lib/efi/efi_app.c index 2209410f35..c5eb816655 100644 --- a/lib/efi/efi_app.c +++ b/lib/efi/efi_app.c @@ -12,18 +12,21 @@ #include <cpu_func.h> #include <debug_uart.h> #include <dm.h> +#include <efi.h> +#include <efi_api.h> #include <errno.h> #include <init.h> #include <malloc.h> +#include <sysreset.h> +#include <uuid.h> #include <asm/global_data.h> #include <linux/err.h> #include <linux/types.h> -#include <efi.h> -#include <efi_api.h> -#include <sysreset.h> +#include <asm/global_data.h> #include <dm/device-internal.h> #include <dm/lists.h> #include <dm/root.h> +#include <mapmem.h> DECLARE_GLOBAL_DATA_PTR; @@ -320,6 +323,19 @@ int dm_scan_other(bool pre_reloc_only) return 0; } +static void scan_tables(struct efi_system_table *sys_table) +{ + efi_guid_t acpi = EFI_ACPI_TABLE_GUID; + uint i; + + for (i = 0; i < sys_table->nr_tables; i++) { + struct efi_configuration_table *tab = &sys_table->tables[i]; + + if (!memcmp(&tab->guid, &acpi, sizeof(efi_guid_t))) + gd_set_acpi_start(map_to_sysmem(tab->table)); + } +} + /** * efi_main() - Start an EFI image * @@ -354,6 +370,8 @@ efi_status_t EFIAPI efi_main(efi_handle_t image, return ret; } + scan_tables(priv->sys_table); + /* * We could store the EFI memory map here, but it changes all the time, * so this is only useful for debugging. diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index 4ccd26f94a..2e3935467c 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -133,18 +133,20 @@ endif config EFI_VAR_BUF_SIZE int "Memory size of the UEFI variable store" - default 16384 if EFI_MM_COMM_TEE - default 65536 + default 131072 range 4096 2147483647 help This defines the size in bytes of the memory area reserved for keeping UEFI variables. - When using StandAloneMM (CONFIG_EFI_MM_COMM_TEE=y) this value should - match the value of PcdFlashNvStorageVariableSize used to compile the - StandAloneMM module. + When using StandAloneMM (CONFIG_EFI_MM_COMM_TEE=y) is used the + available size for storing variables is defined in + PcdFlashNvStorageVariableSize. + That value is probed at runtime from U-Boot. In that case, + EFI_VAR_BUF_SIZE represents the memory U-Boot reserves to present + runtime variables to the OS. - Minimum 4096, default 65536, or 16384 when using StandAloneMM. + Minimum 4096, default 131072 config EFI_GET_TIME bool "GetTime() runtime service" diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile index 8d31fc61c6..d476df112b 100644 --- a/lib/efi_loader/Makefile +++ b/lib/efi_loader/Makefile @@ -51,9 +51,7 @@ obj-y += efi_console.o obj-y += efi_device_path.o obj-$(CONFIG_EFI_DEVICE_PATH_TO_TEXT) += efi_device_path_to_text.o obj-$(CONFIG_EFI_DEVICE_PATH_UTIL) += efi_device_path_utilities.o -ifeq ($(CONFIG_GENERATE_ACPI_TABLE),) obj-y += efi_dt_fixup.o -endif obj-y += efi_file.o obj-$(CONFIG_EFI_LOADER_HII) += efi_hii.o obj-y += efi_image_loader.o diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c index 0b7579cb5a..fad0476a88 100644 --- a/lib/efi_loader/efi_boottime.c +++ b/lib/efi_loader/efi_boottime.c @@ -1339,7 +1339,7 @@ static efi_status_t efi_disconnect_all_drivers const efi_guid_t *protocol, efi_handle_t child_handle) { - efi_uintn_t number_of_drivers, tmp; + efi_uintn_t number_of_drivers; efi_handle_t *driver_handle_buffer; efi_status_t r, ret; @@ -1350,27 +1350,13 @@ static efi_status_t efi_disconnect_all_drivers if (!number_of_drivers) return EFI_SUCCESS; - tmp = number_of_drivers; while (number_of_drivers) { - ret = EFI_CALL(efi_disconnect_controller( + r = EFI_CALL(efi_disconnect_controller( handle, driver_handle_buffer[--number_of_drivers], child_handle)); - if (ret != EFI_SUCCESS) - goto reconnect; - } - - free(driver_handle_buffer); - return ret; - -reconnect: - /* Reconnect all disconnected drivers */ - for (; number_of_drivers < tmp; number_of_drivers++) { - r = EFI_CALL(efi_connect_controller(handle, - &driver_handle_buffer[number_of_drivers], - NULL, true)); if (r != EFI_SUCCESS) - EFI_PRINT("Failed to reconnect controller\n"); + ret = r; } free(driver_handle_buffer); @@ -1409,6 +1395,13 @@ static efi_status_t efi_uninstall_protocol r = efi_disconnect_all_drivers(handle, protocol, NULL); if (r != EFI_SUCCESS) { r = EFI_ACCESS_DENIED; + /* + * This will reconnect all controllers of the handle, even ones + * that were not connected before. This can be done better + * but we are following the EDKII implementation on this for + * now + */ + EFI_CALL(efi_connect_controller(handle, NULL, NULL, true)); goto out; } /* Close protocol */ diff --git a/lib/efi_loader/efi_smbios.c b/lib/efi_loader/efi_smbios.c index 48446f654d..0fbf51b98d 100644 --- a/lib/efi_loader/efi_smbios.c +++ b/lib/efi_loader/efi_smbios.c @@ -49,25 +49,27 @@ efi_status_t efi_smbios_register(void) static int install_smbios_table(void) { - ulong addr; - void *buf; + u64 addr; + efi_status_t ret; if (!IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLE) || IS_ENABLED(CONFIG_X86)) return 0; - /* Align the table to a 4KB boundary to keep EFI happy */ - buf = memalign(SZ_4K, TABLE_SIZE); - if (!buf) + addr = SZ_4G; + ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, + EFI_RUNTIME_SERVICES_DATA, + efi_size_in_pages(TABLE_SIZE), &addr); + if (ret != EFI_SUCCESS) return log_msg_ret("mem", -ENOMEM); - addr = map_to_sysmem(buf); + addr = map_to_sysmem((void *)(uintptr_t)addr); if (!write_smbios_table(addr)) { log_err("Failed to write SMBIOS table\n"); return log_msg_ret("smbios", -EINVAL); } /* Make a note of where we put it */ - log_debug("SMBIOS tables written to %lx\n", addr); + log_debug("SMBIOS tables written to %llx\n", addr); gd->arch.smbios_start = addr; return 0; diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c index 2eaa12b83b..463ea4c154 100644 --- a/lib/efi_loader/efi_tcg2.c +++ b/lib/efi_loader/efi_tcg2.c @@ -944,8 +944,11 @@ static efi_status_t efi_init_event_log(void) * Add SCRTM version to the log if previous firmmware * doesn't pass an eventlog. */ - if (!elog.found) + if (!elog.found) { ret = efi_append_scrtm_version(dev); + if (ret != EFI_SUCCESS) + goto free_pool; + } ret = create_final_event(); if (ret != EFI_SUCCESS) diff --git a/lib/efi_loader/efi_var_file.c b/lib/efi_loader/efi_var_file.c index 62e071bd83..d7dba05071 100644 --- a/lib/efi_loader/efi_var_file.c +++ b/lib/efi_loader/efi_var_file.c @@ -204,8 +204,11 @@ efi_status_t efi_var_restore(struct efi_var_file *buf, bool safe) * File ubootefi.var is read from the EFI system partitions and the variables * stored in the file are created. * - * In case the file does not exist yet or a variable cannot be set EFI_SUCCESS - * is returned. + * On first boot the file ubootefi.var does not exist yet. This is why we must + * return EFI_SUCCESS in this case. + * + * If the variable file is corrupted, e.g. incorrect CRC32, we do not want to + * stop the boot process. We deliberately return EFI_SUCCESS in this case, too. * * Return: status code */ diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 8dc6ec82cd..16bbc277a9 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -339,7 +339,12 @@ cmd_capsule_esl_gen = \ $(shell sed "s:ESL_BIN_FILE:$(capsule_esl_path):" $(capsule_esl_input_file) > $@) $(obj)/.capsule_esl.dtsi: FORCE +ifeq ($(CONFIG_EFI_CAPSULE_ESL_FILE),"") + $(error "CONFIG_EFI_CAPSULE_ESL_FILE is empty, EFI capsule authentication \ + public key must be specified when CONFIG_EFI_CAPSULE_AUTHENTICATE is enabled") +else $(call cmd_capsule_esl_gen) +endif capsule_esl_input_file=$(srctree)/lib/efi_loader/capsule_esl.dtsi.in capsule_esl_dtsi = .capsule_esl.dtsi diff --git a/tools/renesas_spkgimage.c b/tools/renesas_spkgimage.c index 5cd81dd5bf..ce3b2b28ae 100644 --- a/tools/renesas_spkgimage.c +++ b/tools/renesas_spkgimage.c @@ -147,7 +147,8 @@ static int spkgimage_verify_header(unsigned char *ptr, int size, /* Check the marker bytes */ if (memcmp(header->marker, marker, 4)) { - fprintf(stderr, "Error: invalid marker bytes\n"); + if (param->type == IH_TYPE_RENESAS_SPKG) + fprintf(stderr, "Error: invalid marker bytes\n"); return -EINVAL; } |