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-rw-r--r--.mailmap1
-rw-r--r--Makefile2
-rw-r--r--arch/arm/dts/armada-xp-gp-u-boot.dtsi19
-rw-r--r--arch/arm/dts/armada-xp-gp.dts4
-rw-r--r--arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi3
-rw-r--r--arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi3
-rw-r--r--arch/arm/dts/imx6q-ba16.dtsi11
-rw-r--r--arch/arm/dts/imx6ull-dart-6ul.dtsi17
-rw-r--r--arch/arm/dts/imx8mm-beacon-baseboard.dtsi16
-rw-r--r--arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi4
-rw-r--r--arch/arm/dts/imx8mm-beacon-som.dtsi44
-rw-r--r--arch/arm/dts/imx8mm-evk-u-boot.dtsi8
-rw-r--r--arch/arm/dts/imx8mm.dtsi119
-rw-r--r--arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi8
-rw-r--r--arch/arm/dts/imx8mp-evk-u-boot.dtsi8
-rw-r--r--arch/arm/dts/imx8mq-evk-u-boot.dtsi14
-rw-r--r--arch/arm/dts/imx8mq-phanbell-u-boot.dtsi5
-rw-r--r--arch/arm/dts/imx8qm-rom7720-a1.dts4
-rw-r--r--arch/arm/mach-imx/imx8/ahab.c3
-rw-r--r--arch/arm/mach-imx/mx7/clock.c22
-rw-r--r--arch/x86/include/asm/fsp/fsp_support.h3
-rw-r--r--board/freescale/mx6sabresd/mx6sabresd.c6
-rw-r--r--board/ge/bx50v3/bx50v3.c51
-rw-r--r--board/toradex/apalis-imx8x/MAINTAINERS2
-rw-r--r--board/toradex/apalis_imx6/MAINTAINERS2
-rw-r--r--board/toradex/colibri-imx6ull/MAINTAINERS2
-rw-r--r--board/toradex/colibri_imx6/MAINTAINERS2
-rw-r--r--board/toradex/colibri_imx7/MAINTAINERS2
-rw-r--r--board/toradex/colibri_t20/MAINTAINERS2
-rw-r--r--board/toradex/colibri_t30/MAINTAINERS2
-rw-r--r--board/toradex/colibri_vf/MAINTAINERS2
-rw-r--r--board/toradex/verdin-imx8mm/MAINTAINERS2
-rw-r--r--board/variscite/dart_6ul/dart_6ul.c104
-rw-r--r--cmd/ubi.c5
-rw-r--r--common/image-fit.c65
-rw-r--r--configs/imx8mm_beacon_defconfig7
-rw-r--r--configs/imx8mm_evk_defconfig4
-rw-r--r--configs/imx8mn_ddr4_evk_defconfig4
-rw-r--r--configs/imx8mp_evk_defconfig5
-rw-r--r--configs/variscite_dart6ul_defconfig2
-rw-r--r--doc/android/boot-image.rst7
-rw-r--r--doc/board/intel/edison.rst49
-rw-r--r--drivers/i2c/mxc_i2c.c2
-rw-r--r--drivers/nvme/nvme.h8
-rw-r--r--drivers/pci/pci-aardvark.c3
-rw-r--r--drivers/usb/Kconfig2
-rw-r--r--include/compiler.h9
-rw-r--r--include/configs/ge_bx50v3.h4
-rw-r--r--include/dt-bindings/clock/imx8mm-clock.h28
-rw-r--r--include/efi_loader.h8
-rw-r--r--include/image.h4
-rw-r--r--include/signatures.h (renamed from arch/x86/include/asm/fsp/fsp_types.h)6
-rw-r--r--lib/efi_loader/efi_bootmgr.c2
-rw-r--r--lib/efi_loader/efi_boottime.c23
-rw-r--r--lib/efi_loader/efi_console.c12
-rw-r--r--lib/efi_loader/efi_variable_tee.c20
56 files changed, 582 insertions, 194 deletions
diff --git a/.mailmap b/.mailmap
index 33001f1e01..b76f02283c 100644
--- a/.mailmap
+++ b/.mailmap
@@ -30,6 +30,7 @@ Jagan Teki <jaganna@xilinx.com>
Jagan Teki <jagannadh.teki@gmail.com>
Jagan Teki <jagannadha.sutradharudu-teki@xilinx.com>
Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@linaro.org>
+Igor Opaniuk <igor.opaniuk@gmail.com> <igor.opaniuk@toradex.com>
Markus Klotzbuecher <mk@denx.de>
Patrice Chotard <patrice.chotard@foss.st.com> <patrice.chotard@st.com>
Patrick Delaunay <patrick.delaunay@foss.st.com> <patrick.delaunay@st.com>
diff --git a/Makefile b/Makefile
index 679e4a603a..3ee4cc00dd 100644
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,7 @@
VERSION = 2021
PATCHLEVEL = 01
SUBLEVEL =
-EXTRAVERSION = -rc4
+EXTRAVERSION = -rc5
NAME =
# *DOCUMENTATION*
diff --git a/arch/arm/dts/armada-xp-gp-u-boot.dtsi b/arch/arm/dts/armada-xp-gp-u-boot.dtsi
new file mode 100644
index 0000000000..2422856616
--- /dev/null
+++ b/arch/arm/dts/armada-xp-gp-u-boot.dtsi
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/ {
+ soc {
+ internal-regs {
+ serial@12000 {
+ u-boot,dm-pre-reloc;
+ };
+ };
+ };
+};
+
+&spi0 {
+ u-boot,dm-pre-reloc;
+
+ spi-flash@0 {
+ u-boot,dm-pre-reloc;
+ };
+};
diff --git a/arch/arm/dts/armada-xp-gp.dts b/arch/arm/dts/armada-xp-gp.dts
index 1139e9469a..d46475fe22 100644
--- a/arch/arm/dts/armada-xp-gp.dts
+++ b/arch/arm/dts/armada-xp-gp.dts
@@ -31,6 +31,10 @@
stdout-path = "serial0:115200n8";
};
+ aliases {
+ spi0 = &spi0;
+ };
+
memory@0 {
device_type = "memory";
/*
diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi
index 80d6475b7c..9e0d264b71 100644
--- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi
+++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi
@@ -118,8 +118,11 @@
&usdhc1 {
u-boot,dm-spl;
+ mmc-hs400-1_8v;
};
&usdhc2 {
u-boot,dm-spl;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
};
diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi
index 771ab635f1..701af4434d 100644
--- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi
+++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi
@@ -118,8 +118,11 @@
&usdhc1 {
u-boot,dm-spl;
+ mmc-hs400-1_8v;
};
&usdhc2 {
u-boot,dm-spl;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
};
diff --git a/arch/arm/dts/imx6q-ba16.dtsi b/arch/arm/dts/imx6q-ba16.dtsi
index 7d8f61f2fd..9da2bb6e86 100644
--- a/arch/arm/dts/imx6q-ba16.dtsi
+++ b/arch/arm/dts/imx6q-ba16.dtsi
@@ -174,6 +174,17 @@
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
status = "okay";
+ phy-handle = <&phy0>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy0: ethernet-phy@4 {
+ reg = <4>;
+ qca,clk-out-frequency = <125000000>;
+ };
+ };
};
&hdmi {
diff --git a/arch/arm/dts/imx6ull-dart-6ul.dtsi b/arch/arm/dts/imx6ull-dart-6ul.dtsi
index e96669f493..805a382da9 100644
--- a/arch/arm/dts/imx6ull-dart-6ul.dtsi
+++ b/arch/arm/dts/imx6ull-dart-6ul.dtsi
@@ -14,6 +14,10 @@
chosen {
stdout-path = &uart1;
};
+
+ aliases {
+ eeprom0 = &eeprom_som;
+ };
};
&fec1 {
@@ -52,6 +56,10 @@
};
};
+&gpio1 {
+ u-boot,dm-pre-reloc;
+};
+
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
@@ -96,10 +104,13 @@
scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
status = "okay";
+ u-boot,dm-pre-reloc;
- eeprom@50 {
- compatible = "cat,24c32";
+ eeprom_som: eeprom@50 {
+ u-boot,dm-pre-reloc;
+ compatible = "atmel,24c04";
reg = <0x50>;
+ status = "okay";
};
};
@@ -205,6 +216,7 @@
};
pinctrl_i2c2: i2cgrp {
+ u-boot,dm-pre-reloc;
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
@@ -212,6 +224,7 @@
};
pinctrl_i2c2_gpio: i2c2grp_gpio {
+ u-boot,dm-pre-reloc;
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0
MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0
diff --git a/arch/arm/dts/imx8mm-beacon-baseboard.dtsi b/arch/arm/dts/imx8mm-beacon-baseboard.dtsi
index baa5f997d0..d6b9dedd16 100644
--- a/arch/arm/dts/imx8mm-beacon-baseboard.dtsi
+++ b/arch/arm/dts/imx8mm-beacon-baseboard.dtsi
@@ -10,19 +10,19 @@
led0 {
label = "gen_led0";
gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
- default-state = "none";
+ default-state = "off";
};
led1 {
label = "gen_led1";
gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
- default-state = "none";
+ default-state = "off";
};
led2 {
label = "gen_led2";
gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
- default-state = "none";
+ default-state = "off";
};
led3 {
@@ -70,7 +70,7 @@
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_espi2>;
- cs-gpios = <&gpio5 9 0>;
+ cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
status = "okay";
eeprom@0 {
@@ -210,7 +210,7 @@
>;
};
- pinctrl_pcal6414: pcal6414-gpio {
+ pinctrl_pcal6414: pcal6414-gpiogrp {
fsl,pins = <
MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19
>;
@@ -240,7 +240,7 @@
>;
};
- pinctrl_usdhc2_gpio: usdhc2grpgpio {
+ pinctrl_usdhc2_gpio: usdhc2gpiogrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x41
MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
@@ -259,7 +259,7 @@
>;
};
- pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
@@ -271,7 +271,7 @@
>;
};
- pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
index fc1aebb2fe..6d80a529ae 100644
--- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
@@ -37,6 +37,10 @@
/delete-property/ assigned-clock-rates;
};
+&reg_usdhc2_vmmc {
+ u-boot,off-on-delay-us = <20000>;
+};
+
&fec1 {
phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
};
diff --git a/arch/arm/dts/imx8mm-beacon-som.dtsi b/arch/arm/dts/imx8mm-beacon-som.dtsi
index 801bd02eae..b88c3c99b0 100644
--- a/arch/arm/dts/imx8mm-beacon-som.dtsi
+++ b/arch/arm/dts/imx8mm-beacon-som.dtsi
@@ -24,6 +24,26 @@
cpu-supply = <&buck2_reg>;
};
+&ddrc {
+ operating-points-v2 = <&ddrc_opp_table>;
+
+ ddrc_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-25M {
+ opp-hz = /bits/ 64 <25000000>;
+ };
+
+ opp-100M {
+ opp-hz = /bits/ 64 <100000000>;
+ };
+
+ opp-750M {
+ opp-hz = /bits/ 64 <750000000>;
+ };
+ };
+};
+
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
@@ -52,9 +72,10 @@
pmic@4b {
compatible = "rohm,bd71847";
reg = <0x4b>;
+ pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio1>;
- interrupts = <3 GPIO_ACTIVE_LOW>;
+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
rohm,reset-snvs-powered;
regulators {
@@ -116,7 +137,7 @@
ldo1_reg: LDO1 {
regulator-name = "ldo1";
- regulator-min-microvolt = <3000000>;
+ regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
@@ -124,7 +145,7 @@
ldo2_reg: LDO2 {
regulator-name = "ldo2";
- regulator-min-microvolt = <900000>;
+ regulator-min-microvolt = <800000>;
regulator-max-microvolt = <900000>;
regulator-boot-on;
regulator-always-on;
@@ -164,7 +185,7 @@
status = "okay";
eeprom@50 {
- compatible = "microchip, at24c64d", "atmel,24c64";
+ compatible = "microchip,24c64", "atmel,24c64";
pagesize = <32>;
read-only; /* Manufacturing EEPROM programmed at factory */
reg = <0x50>;
@@ -190,6 +211,7 @@
host-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
device-wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
clocks = <&osc_32k>;
+ max-speed = <4000000>;
clock-names = "extclk";
};
};
@@ -270,9 +292,9 @@
>;
};
- pinctrl_pmic: pmicirq {
+ pinctrl_pmic: pmicirqgrp {
fsl,pins = <
- MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
+ MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
>;
};
@@ -289,7 +311,7 @@
>;
};
- pinctrl_usdhc1_gpio: usdhc1grpgpio {
+ pinctrl_usdhc1_gpio: usdhc1gpiogrp {
fsl,pins = <
MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41
>;
@@ -306,7 +328,7 @@
>;
};
- pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
@@ -317,7 +339,7 @@
>;
};
- pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
@@ -344,7 +366,7 @@
>;
};
- pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+ pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
@@ -360,7 +382,7 @@
>;
};
- pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+ pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
index b5c12105a9..e843a5648e 100644
--- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
@@ -46,6 +46,10 @@
u-boot,dm-spl;
};
+&reg_usdhc2_vmmc {
+ u-boot,off-on-delay-us = <20000>;
+};
+
&pinctrl_reg_usdhc2_vmmc {
u-boot,dm-spl;
};
@@ -96,10 +100,14 @@
&usdhc2 {
u-boot,dm-spl;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
};
&usdhc3 {
u-boot,dm-spl;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
};
&i2c1 {
diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi
index 1e5e11592f..05ee062548 100644
--- a/arch/arm/dts/imx8mm.dtsi
+++ b/arch/arm/dts/imx8mm.dtsi
@@ -18,10 +18,18 @@
aliases {
ethernet0 = &fec1;
+ gpio0 = &gpio1;
+ gpio1 = &gpio2;
+ gpio2 = &gpio3;
+ gpio3 = &gpio4;
+ gpio4 = &gpio5;
i2c0 = &i2c1;
i2c1 = &i2c2;
i2c2 = &i2c3;
i2c3 = &i2c4;
+ mmc0 = &usdhc1;
+ mmc1 = &usdhc2;
+ mmc2 = &usdhc3;
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
@@ -29,14 +37,6 @@
spi0 = &ecspi1;
spi1 = &ecspi2;
spi2 = &ecspi3;
- mmc0 = &usdhc1;
- mmc1 = &usdhc2;
- mmc2 = &usdhc3;
- gpio0 = &gpio1;
- gpio1 = &gpio2;
- gpio2 = &gpio3;
- gpio3 = &gpio4;
- gpio4 = &gpio5;
};
cpus {
@@ -68,6 +68,7 @@
nvmem-cells = <&cpu_speed_grade>;
nvmem-cell-names = "speed_grade";
cpu-idle-states = <&cpu_pd_wait>;
+ #cooling-cells = <2>;
};
A53_1: cpu@1 {
@@ -80,6 +81,7 @@
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
cpu-idle-states = <&cpu_pd_wait>;
+ #cooling-cells = <2>;
};
A53_2: cpu@2 {
@@ -92,6 +94,7 @@
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
cpu-idle-states = <&cpu_pd_wait>;
+ #cooling-cells = <2>;
};
A53_3: cpu@3 {
@@ -104,6 +107,7 @@
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
cpu-idle-states = <&cpu_pd_wait>;
+ #cooling-cells = <2>;
};
A53_L2: l2-cache0 {
@@ -125,7 +129,7 @@
opp-1600000000 {
opp-hz = /bits/ 64 <1600000000>;
- opp-microvolt = <900000>;
+ opp-microvolt = <950000>;
opp-supported-hw = <0xc>, <0x7>;
clock-latency-ns = <150000>;
opp-suspend;
@@ -204,6 +208,38 @@
arm,no-tick-in-suspend;
};
+ thermal-zones {
+ cpu-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <2000>;
+ thermal-sensors = <&tmu>;
+ trips {
+ cpu_alert0: trip0 {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit0: trip1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert0>;
+ cooling-device =
+ <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
usbphynop1: usbphynop1 {
compatible = "usb-nop-xceiv";
clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
@@ -227,12 +263,14 @@
ranges = <0x0 0x0 0x0 0x3e000000>;
aips1: bus@30000000 {
- compatible = "simple-bus";
+ compatible = "fsl,aips-bus", "simple-bus";
+ reg = <0x30000000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x30000000 0x30000000 0x400000>;
sai1: sai@30010000 {
+ #sound-dai-cells = <0>;
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
reg = <0x30010000 0x10000>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
@@ -246,6 +284,7 @@
};
sai2: sai@30020000 {
+ #sound-dai-cells = <0>;
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
reg = <0x30020000 0x10000>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
@@ -273,6 +312,7 @@
};
sai5: sai@30050000 {
+ #sound-dai-cells = <0>;
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
reg = <0x30050000 0x10000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
@@ -286,6 +326,7 @@
};
sai6: sai@30060000 {
+ #sound-dai-cells = <0>;
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
reg = <0x30060000 0x10000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
@@ -363,6 +404,13 @@
gpio-ranges = <&iomuxc 0 119 30>;
};
+ tmu: tmu@30260000 {
+ compatible = "fsl,imx8mm-tmu";
+ reg = <0x30260000 0x10000>;
+ clocks = <&clk IMX8MM_CLK_TMU_ROOT>;
+ #thermal-sensor-cells = <0>;
+ };
+
wdog1: watchdog@30280000 {
compatible = "fsl,imx8mm-wdt", "fsl,imx21-wdt";
reg = <0x30280000 0x10000>;
@@ -419,7 +467,7 @@
reg = <0x30340000 0x10000>;
};
- ocotp: ocotp-ctrl@30350000 {
+ ocotp: efuse@30350000 {
compatible = "fsl,imx8mm-ocotp", "syscon";
reg = <0x30350000 0x10000>;
clocks = <&clk IMX8MM_CLK_OCOTP_ROOT>;
@@ -455,6 +503,8 @@
compatible = "fsl,sec-v4.0-pwrkey";
regmap = <&snvs>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_SNVS_ROOT>;
+ clock-names = "snvs-pwrkey";
linux,keycode = <KEY_POWER>;
wakeup-source;
status = "disabled";
@@ -469,16 +519,20 @@
<&clk_ext3>, <&clk_ext4>;
clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
"clk_ext3", "clk_ext4";
- assigned-clocks = <&clk IMX8MM_CLK_NOC>,
+ assigned-clocks = <&clk IMX8MM_CLK_A53_SRC>,
+ <&clk IMX8MM_CLK_A53_CORE>,
+ <&clk IMX8MM_CLK_NOC>,
<&clk IMX8MM_CLK_AUDIO_AHB>,
<&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
<&clk IMX8MM_SYS_PLL3>,
<&clk IMX8MM_VIDEO_PLL1>,
<&clk IMX8MM_AUDIO_PLL1>,
<&clk IMX8MM_AUDIO_PLL2>;
- assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_800M>,
+ <&clk IMX8MM_ARM_PLL_OUT>,
+ <&clk IMX8MM_SYS_PLL3_OUT>,
<&clk IMX8MM_SYS_PLL1_800M>;
- assigned-clock-rates = <0>,
+ assigned-clock-rates = <0>, <0>, <0>,
<400000000>,
<400000000>,
<750000000>,
@@ -496,7 +550,8 @@
};
aips2: bus@30400000 {
- compatible = "simple-bus";
+ compatible = "fsl,aips-bus", "simple-bus";
+ reg = <0x30400000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x30400000 0x30400000 0x400000>;
@@ -555,10 +610,12 @@
};
aips3: bus@30800000 {
- compatible = "simple-bus";
+ compatible = "fsl,aips-bus", "simple-bus";
+ reg = <0x30800000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x30800000 0x30800000 0x400000>;
+ ranges = <0x30800000 0x30800000 0x400000>,
+ <0x8000000 0x8000000 0x10000000>;
ecspi1: spi@30820000 {
compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
@@ -718,6 +775,14 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx8mm-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;
@@ -760,6 +825,19 @@
status = "disabled";
};
+ flexspi: spi@30bb0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nxp,imx8mm-fspi";
+ reg = <0x30bb0000 0x10000>, <0x8000000 0x10000000>;
+ reg-names = "fspi_base", "fspi_mmap";
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_QSPI_ROOT>,
+ <&clk IMX8MM_CLK_QSPI_ROOT>;
+ clock-names = "fspi", "fspi_en";
+ status = "disabled";
+ };
+
sdma1: dma-controller@30bd0000 {
compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma";
reg = <0x30bd0000 0x10000>;
@@ -776,7 +854,8 @@
reg = <0x30be0000 0x10000>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_ENET1_ROOT>,
<&clk IMX8MM_CLK_ENET1_ROOT>,
<&clk IMX8MM_CLK_ENET_TIMER>,
@@ -800,7 +879,8 @@
};
aips4: bus@32c00000 {
- compatible = "simple-bus";
+ compatible = "fsl,aips-bus", "simple-bus";
+ reg = <0x32c00000 0x400000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x32c00000 0x32c00000 0x400000>;
@@ -896,7 +976,6 @@
ddr-pmu@3d800000 {
compatible = "fsl,imx8mm-ddr-pmu", "fsl,imx8m-ddr-pmu";
reg = <0x3d800000 0x400000>;
- interrupt-parent = <&gic>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
};
};
diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
index 4419679d4c..025090fff4 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
@@ -47,6 +47,10 @@
u-boot,dm-spl;
};
+&reg_usdhc2_vmmc {
+ u-boot,off-on-delay-us = <20000>;
+};
+
&pinctrl_uart2 {
u-boot,dm-spl;
};
@@ -93,10 +97,14 @@
&usdhc2 {
u-boot,dm-spl;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
};
&usdhc3 {
u-boot,dm-spl;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
};
&wdog1 {
diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
index 24a93ac2d6..4f00b5a3a9 100644
--- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
@@ -49,6 +49,10 @@
};
&reg_usdhc2_vmmc {
+ u-boot,off-on-delay-us = <20000>;
+};
+
+&reg_usdhc2_vmmc {
u-boot,dm-spl;
};
@@ -122,10 +126,14 @@
&usdhc2 {
u-boot,dm-spl;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
};
&usdhc3 {
u-boot,dm-spl;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
};
&wdog1 {
diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi b/arch/arm/dts/imx8mq-evk-u-boot.dtsi
new file mode 100644
index 0000000000..44af663727
--- /dev/null
+++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+&reg_usdhc2_vmmc {
+ u-boot,off-on-delay-us = <20000>;
+};
+
+&usdhc1 {
+ mmc-hs400-1_8v;
+};
+
+&usdhc2 {
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+};
diff --git a/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi
new file mode 100644
index 0000000000..4712cf6a44
--- /dev/null
+++ b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi
@@ -0,0 +1,5 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+&reg_usdhc2_vmmc {
+ u-boot,off-on-delay-us = <20000>;
+};
diff --git a/arch/arm/dts/imx8qm-rom7720-a1.dts b/arch/arm/dts/imx8qm-rom7720-a1.dts
index 5f9ac955ed..d1f2fff869 100644
--- a/arch/arm/dts/imx8qm-rom7720-a1.dts
+++ b/arch/arm/dts/imx8qm-rom7720-a1.dts
@@ -293,7 +293,7 @@
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-handle = <&ethphy0>;
fsl,ar8031-phy-fixup;
fsl,magic-packet;
@@ -318,7 +318,7 @@
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec2>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-handle = <&ethphy1>;
fsl,ar8031-phy-fixup;
fsl,magic-packet;
diff --git a/arch/arm/mach-imx/imx8/ahab.c b/arch/arm/mach-imx/imx8/ahab.c
index 4bb7c46921..600a1108ce 100644
--- a/arch/arm/mach-imx/imx8/ahab.c
+++ b/arch/arm/mach-imx/imx8/ahab.c
@@ -303,10 +303,11 @@ static int confirm_close(void)
static int do_ahab_close(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
+ int confirmed = argc >= 2 && !strcmp(argv[1], "-y");
int err;
u16 lc;
- if (!confirm_close())
+ if (!confirmed && !confirm_close())
return -EACCES;
err = sc_seco_chip_info(-1, &lc, NULL, NULL, NULL);
diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c
index aba9461d92..6a1bad855e 100644
--- a/arch/arm/mach-imx/mx7/clock.c
+++ b/arch/arm/mach-imx/mx7/clock.c
@@ -916,7 +916,7 @@ void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq)
}
if (5 == i) {
- printf("Fail to set rate to %dkhz", freq);
+ printf("Fail to set rate to %u kHz", freq);
return;
}
}
@@ -936,7 +936,7 @@ void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq)
}
if (best == 0) {
- printf("Fail to set rate to %dkhz", freq);
+ printf("Fail to set rate to %u kHz", freq);
return;
}
@@ -1115,17 +1115,17 @@ int do_mx7_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
printf("\n");
- printf("IPG %8d kHz\n", mxc_get_clock(MXC_IPG_CLK) / 1000);
- printf("UART %8d kHz\n", mxc_get_clock(MXC_UART_CLK) / 1000);
+ printf("IPG %8u kHz\n", mxc_get_clock(MXC_IPG_CLK) / 1000);
+ printf("UART %8u kHz\n", mxc_get_clock(MXC_UART_CLK) / 1000);
#ifdef CONFIG_MXC_SPI
- printf("CSPI %8d kHz\n", mxc_get_clock(MXC_CSPI_CLK) / 1000);
+ printf("CSPI %8u kHz\n", mxc_get_clock(MXC_CSPI_CLK) / 1000);
#endif
- printf("AHB %8d kHz\n", mxc_get_clock(MXC_AHB_CLK) / 1000);
- printf("AXI %8d kHz\n", mxc_get_clock(MXC_AXI_CLK) / 1000);
- printf("DDR %8d kHz\n", mxc_get_clock(MXC_DDR_CLK) / 1000);
- printf("USDHC1 %8d kHz\n", mxc_get_clock(MXC_ESDHC_CLK) / 1000);
- printf("USDHC2 %8d kHz\n", mxc_get_clock(MXC_ESDHC2_CLK) / 1000);
- printf("USDHC3 %8d kHz\n", mxc_get_clock(MXC_ESDHC3_CLK) / 1000);
+ printf("AHB %8u kHz\n", mxc_get_clock(MXC_AHB_CLK) / 1000);
+ printf("AXI %8u kHz\n", mxc_get_clock(MXC_AXI_CLK) / 1000);
+ printf("DDR %8u kHz\n", mxc_get_clock(MXC_DDR_CLK) / 1000);
+ printf("USDHC1 %8u kHz\n", mxc_get_clock(MXC_ESDHC_CLK) / 1000);
+ printf("USDHC2 %8u kHz\n", mxc_get_clock(MXC_ESDHC2_CLK) / 1000);
+ printf("USDHC3 %8u kHz\n", mxc_get_clock(MXC_ESDHC3_CLK) / 1000);
return 0;
}
diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp/fsp_support.h
index 29e511415c..3cd3e4fcf5 100644
--- a/arch/x86/include/asm/fsp/fsp_support.h
+++ b/arch/x86/include/asm/fsp/fsp_support.h
@@ -7,11 +7,12 @@
#ifndef __FSP_SUPPORT_H__
#define __FSP_SUPPORT_H__
+#include <signatures.h>
+
#include <asm/fsp/fsp_bootmode.h>
#include <asm/fsp/fsp_fv.h>
#include <asm/fsp/fsp_hob.h>
#include <asm/fsp/fsp_infoheader.h>
-#include <asm/fsp/fsp_types.h>
#include <asm/fsp_arch.h>
#include <asm/fsp/fsp_azalia.h>
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 0d343da519..9a176f4711 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -575,12 +575,6 @@ int board_late_init(void)
return 0;
}
-int checkboard(void)
-{
- puts("Board: MX6-SabreSD\n");
- return 0;
-}
-
#ifdef CONFIG_SPL_BUILD
#include <asm/arch/mx6-ddr.h>
#include <spl.h>
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index 4754647fb4..3ea9425fd1 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -47,6 +47,10 @@ DECLARE_GLOBAL_DATA_PTR;
#define VPD_PRODUCT_B650 2
#define VPD_PRODUCT_B450 3
+#define AR8033_DBG_REG_ADDR 0x1d
+#define AR8033_DBG_REG_DATA 0x1e
+#define AR8033_SERDES_REG 0x5
+
static int productid; /* Default to generic. */
static struct vpd_cache vpd;
@@ -61,31 +65,16 @@ int dram_init(void)
return 0;
}
-static int mx6_rgmii_rework(struct phy_device *phydev)
-{
- /* Configure AR8033 to ouput a 125MHz clk from CLK_25M */
- /* set device address 0x7 */
- phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
- /* offset 0x8016: CLK_25M Clock Select */
- phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
- /* enable register write, no post increment, address 0x7 */
- phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
- /* set to 125 MHz from local PLL source */
- phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x18);
-
- /* rgmii tx clock delay enable */
- /* set debug port address: SerDes Test and System Mode Control */
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
- /* enable rgmii tx clock delay */
- /* set the reserved bits to avoid board specific voltage peak issue*/
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47);
-
- return 0;
-}
-
int board_phy_config(struct phy_device *phydev)
{
- mx6_rgmii_rework(phydev);
+ /*
+ * Set reserved bits to avoid board specific voltage peak issue. The
+ * value is a magic number provided directly by Qualcomm. Note, that
+ * PHY driver will take control of BIT(8) in this register to control
+ * TX clock delay, so we do not initialize that bit here.
+ */
+ phy_write(phydev, MDIO_DEVAD_NONE, AR8033_DBG_REG_ADDR, AR8033_SERDES_REG);
+ phy_write(phydev, MDIO_DEVAD_NONE, AR8033_DBG_REG_DATA, 0x3c47);
if (phydev->drv->config)
phydev->drv->config(phydev);
@@ -356,15 +345,12 @@ static void process_vpd(struct vpd_cache *vpd)
switch (vpd->product_id) {
case VPD_PRODUCT_B450:
- env_set("confidx", "1");
i210_index = 1;
break;
case VPD_PRODUCT_B650:
- env_set("confidx", "2");
i210_index = 1;
break;
case VPD_PRODUCT_B850:
- env_set("confidx", "3");
i210_index = 2;
break;
}
@@ -554,16 +540,23 @@ int ft_board_setup(void *blob, struct bd_info *bd)
int board_fit_config_name_match(const char *name)
{
+ const char *machine = name;
+
if (!vpd.is_read)
return strcmp(name, "imx6q-bx50v3");
+ if (!strncmp(machine, "Boot ", 5))
+ machine += 5;
+ if (!strncmp(machine, "imx6q-", 6))
+ machine += 6;
+
switch (vpd.product_id) {
case VPD_PRODUCT_B450:
- return strcmp(name, "imx6q-b450v3");
+ return strcasecmp(machine, "b450v3");
case VPD_PRODUCT_B650:
- return strcmp(name, "imx6q-b650v3");
+ return strcasecmp(machine, "b650v3");
case VPD_PRODUCT_B850:
- return strcmp(name, "imx6q-b850v3");
+ return strcasecmp(machine, "b850v3");
default:
return -1;
}
diff --git a/board/toradex/apalis-imx8x/MAINTAINERS b/board/toradex/apalis-imx8x/MAINTAINERS
index fbf9379931..5272154447 100644
--- a/board/toradex/apalis-imx8x/MAINTAINERS
+++ b/board/toradex/apalis-imx8x/MAINTAINERS
@@ -1,5 +1,5 @@
Apalis iMX8X
-M: Igor Opaniuk <igor.opaniuk@toradex.com>
+M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
W: http://developer.toradex.com/software/linux/linux-software
S: Maintained
F: arch/arm/dts/fsl-imx8x-apalis.dts
diff --git a/board/toradex/apalis_imx6/MAINTAINERS b/board/toradex/apalis_imx6/MAINTAINERS
index 4a2707e771..fde4d92dc3 100644
--- a/board/toradex/apalis_imx6/MAINTAINERS
+++ b/board/toradex/apalis_imx6/MAINTAINERS
@@ -1,5 +1,5 @@
Apalis iMX6
-M: Igor Opaniuk <igor.opaniuk@toradex.com>
+M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
W: http://developer.toradex.com/software/linux/linux-software
W: https://www.toradex.com/community
S: Maintained
diff --git a/board/toradex/colibri-imx6ull/MAINTAINERS b/board/toradex/colibri-imx6ull/MAINTAINERS
index 4107d29876..899b1ff555 100644
--- a/board/toradex/colibri-imx6ull/MAINTAINERS
+++ b/board/toradex/colibri-imx6ull/MAINTAINERS
@@ -1,5 +1,5 @@
Colibri iMX6ULL
-M: Igor Opaniuk <igor.opaniuk@toradex.com>
+M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
W: http://developer.toradex.com/software/linux/linux-software
W: https://www.toradex.com/community
S: Maintained
diff --git a/board/toradex/colibri_imx6/MAINTAINERS b/board/toradex/colibri_imx6/MAINTAINERS
index 76f9446bba..2cbf65433d 100644
--- a/board/toradex/colibri_imx6/MAINTAINERS
+++ b/board/toradex/colibri_imx6/MAINTAINERS
@@ -1,5 +1,5 @@
Colibri iMX6
-M: Igor Opaniuk <igor.opaniuk@toradex.com>
+M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
W: http://developer.toradex.com/software/linux/linux-software
W: https://www.toradex.com/community
S: Maintained
diff --git a/board/toradex/colibri_imx7/MAINTAINERS b/board/toradex/colibri_imx7/MAINTAINERS
index 61a504487a..3d7d010d8a 100644
--- a/board/toradex/colibri_imx7/MAINTAINERS
+++ b/board/toradex/colibri_imx7/MAINTAINERS
@@ -1,5 +1,5 @@
Colibri iMX7
-M: Igor Opaniuk <igor.opaniuk@toradex.com>
+M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
W: http://developer.toradex.com/software/linux/linux-software
W: https://www.toradex.com/community
S: Maintained
diff --git a/board/toradex/colibri_t20/MAINTAINERS b/board/toradex/colibri_t20/MAINTAINERS
index 2a8e6fb74b..61fbd2c1e0 100644
--- a/board/toradex/colibri_t20/MAINTAINERS
+++ b/board/toradex/colibri_t20/MAINTAINERS
@@ -1,5 +1,5 @@
COLIBRI_T20
-M: Igor Opaniuk <igor.opaniuk@toradex.com>
+M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
S: Maintained
F: board/toradex/colibri_t20/
F: include/configs/colibri_t20.h
diff --git a/board/toradex/colibri_t30/MAINTAINERS b/board/toradex/colibri_t30/MAINTAINERS
index 00c03c89b8..ded9e28295 100644
--- a/board/toradex/colibri_t30/MAINTAINERS
+++ b/board/toradex/colibri_t30/MAINTAINERS
@@ -1,5 +1,5 @@
Colibri T30
-M: Igor Opaniuk <igor.opaniuk@toradex.com>
+M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
S: Maintained
F: board/toradex/colibri_t30/
F: include/configs/colibri_t30.h
diff --git a/board/toradex/colibri_vf/MAINTAINERS b/board/toradex/colibri_vf/MAINTAINERS
index f94cc0fbe2..c6627654a2 100644
--- a/board/toradex/colibri_vf/MAINTAINERS
+++ b/board/toradex/colibri_vf/MAINTAINERS
@@ -1,5 +1,5 @@
Colibri VFxx
-M: Igor Opaniuk <igor.opaniuk@toradex.com>
+M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
W: http://developer.toradex.com/software/linux/linux-software
W: https://www.toradex.com/community
S: Maintained
diff --git a/board/toradex/verdin-imx8mm/MAINTAINERS b/board/toradex/verdin-imx8mm/MAINTAINERS
index 2495696e9d..08c370178c 100644
--- a/board/toradex/verdin-imx8mm/MAINTAINERS
+++ b/board/toradex/verdin-imx8mm/MAINTAINERS
@@ -1,5 +1,5 @@
Verdin iMX8M Mini
-M: Igor Opaniuk <igor.opaniuk@toradex.com>
+M: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
W: https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-mini
S: Maintained
F: arch/arm/dts/imx8mm-verdin.dts
diff --git a/board/variscite/dart_6ul/dart_6ul.c b/board/variscite/dart_6ul/dart_6ul.c
index d8e383d323..360be758bb 100644
--- a/board/variscite/dart_6ul/dart_6ul.c
+++ b/board/variscite/dart_6ul/dart_6ul.c
@@ -12,8 +12,11 @@
#include <asm/arch/sys_proto.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/mxc_i2c.h>
+#include <dm.h>
#include <fsl_esdhc_imx.h>
+#include <i2c_eeprom.h>
#include <linux/bitops.h>
+#include <malloc.h>
#include <miiphy.h>
#include <netdev.h>
#include <usb.h>
@@ -222,9 +225,108 @@ int board_init(void)
return 0;
}
+/* length of strings stored in the eeprom */
+#define DART6UL_PN_LEN 16
+#define DART6UL_ASSY_LEN 16
+#define DART6UL_DATE_LEN 12
+
+/* eeprom content, 512 bytes */
+struct dart6ul_info {
+ u32 magic;
+ u8 partnumber[DART6UL_PN_LEN];
+ u8 assy[DART6UL_ASSY_LEN];
+ u8 date[DART6UL_DATE_LEN];
+ u32 custom_addr_val[32];
+ struct cmd {
+ u8 addr;
+ u8 index;
+ } custom_cmd[150];
+ u8 res[33];
+ u8 som_info;
+ u8 ddr_size;
+ u8 crc;
+} __attribute__ ((__packed__));
+
+#define DART6UL_INFO_STORAGE_GET(n) ((n) & 0x3)
+#define DART6UL_INFO_WIFI_GET(n) ((n) >> 2 & 0x1)
+#define DART6UL_INFO_REV_GET(n) ((n) >> 3 & 0x3)
+#define DART6UL_DDRSIZE_IN_MIB(n) ((n) << 8)
+#define DART6UL_INFO_MAGIC 0x32524156
+
+static const char *som_info_storage_to_str(u8 som_info)
+{
+ switch (DART6UL_INFO_STORAGE_GET(som_info)) {
+ case 0x0: return "none (SD only)";
+ case 0x1: return "NAND";
+ case 0x2: return "eMMC";
+ default: return "unknown";
+ }
+}
+
+static const char *som_info_rev_to_str(u8 som_info)
+{
+ switch (DART6UL_INFO_REV_GET(som_info)) {
+ case 0x0: return "2.4G";
+ case 0x1: return "5G";
+ default: return "unknown";
+ }
+}
+
int checkboard(void)
{
- puts("Board: Variscite DART-6UL Evaluation Kit\n");
+ const char *path = "eeprom0";
+ struct dart6ul_info *info;
+ struct udevice *dev;
+ int ret, off;
+
+ off = fdt_path_offset(gd->fdt_blob, path);
+ if (off < 0) {
+ printf("%s: fdt_path_offset() failed: %d\n", __func__, off);
+ return off;
+ }
+
+ ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev);
+ if (ret) {
+ printf("%s: uclass_get_device_by_of_offset() failed: %d\n", __func__, ret);
+ return ret;
+ }
+
+ info = malloc(sizeof(struct dart6ul_info));
+ if (!info)
+ return -ENOMEM;
+
+ ret = i2c_eeprom_read(dev, 0, (uint8_t *)info,
+ sizeof(struct dart6ul_info));
+ if (ret) {
+ printf("%s: i2c_eeprom_read() failed: %d\n", __func__, ret);
+ free(info);
+ return ret;
+ }
+
+ if (info->magic != DART6UL_INFO_MAGIC) {
+ printf("Board: Invalid board info magic: 0x%08x, expected 0x%08x\n",
+ info->magic, DART6UL_INFO_MAGIC);
+ /* do not fail if the content is invalid */
+ free(info);
+ return 0;
+ }
+
+ /* make sure strings are null terminated */
+ info->partnumber[DART6UL_PN_LEN - 1] = '\0';
+ info->assy[DART6UL_ASSY_LEN - 1] = '\0';
+ info->date[DART6UL_DATE_LEN - 1] = '\0';
+
+ printf("Board: PN: %s, Assy: %s, Date: %s\n"
+ " Storage: %s, Wifi: %s, DDR: %d MiB, Rev: %s\n",
+ info->partnumber,
+ info->assy,
+ info->date,
+ som_info_storage_to_str(info->som_info),
+ DART6UL_INFO_WIFI_GET(info->som_info) ? "yes" : "no",
+ DART6UL_DDRSIZE_IN_MIB(info->ddr_size),
+ som_info_rev_to_str(info->som_info));
+
+ free(info);
return 0;
}
diff --git a/cmd/ubi.c b/cmd/ubi.c
index 171377cc66..cb14e3e1e7 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -264,6 +264,11 @@ static int ubi_rename_vol(char *oldname, char *newname)
return ENODEV;
}
+ if (!ubi_check(newname)) {
+ printf("%s: volume %s already exist\n", __func__, newname);
+ return EINVAL;
+ }
+
printf("Rename UBI volume %s to %s\n", oldname, newname);
if (ubi->ro_mode) {
diff --git a/common/image-fit.c b/common/image-fit.c
index c82d4d8015..6a8787ca0a 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -15,7 +15,6 @@
#include <u-boot/crc.h>
#else
#include <linux/compiler.h>
-#include <linux/kconfig.h>
#include <common.h>
#include <errno.h>
#include <log.h>
@@ -28,6 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
#include <bootm.h>
#include <image.h>
#include <bootstage.h>
+#include <linux/kconfig.h>
#include <u-boot/crc.h>
#include <u-boot/md5.h>
#include <u-boot/sha1.h>
@@ -486,16 +486,16 @@ void fit_image_print(const void *fit, int image_noffset, const char *p)
ret = fit_image_get_data_and_size(fit, image_noffset, &data, &size);
-#ifndef USE_HOSTCC
- printf("%s Data Start: ", p);
- if (ret) {
- printf("unavailable\n");
- } else {
- void *vdata = (void *)data;
+ if (!host_build()) {
+ printf("%s Data Start: ", p);
+ if (ret) {
+ printf("unavailable\n");
+ } else {
+ void *vdata = (void *)data;
- printf("0x%08lx\n", (ulong)map_to_sysmem(vdata));
+ printf("0x%08lx\n", (ulong)map_to_sysmem(vdata));
+ }
}
-#endif
printf("%s Data Size: ", p);
if (ret)
@@ -1420,7 +1420,6 @@ int fit_all_image_verify(const void *fit)
return 1;
}
-#ifdef CONFIG_FIT_CIPHER
static int fit_image_uncipher(const void *fit, int image_noffset,
void **data, size_t *size)
{
@@ -1444,7 +1443,6 @@ static int fit_image_uncipher(const void *fit, int image_noffset,
out:
return ret;
}
-#endif /* CONFIG_FIT_CIPHER */
/**
* fit_image_check_os - check whether image node is of a given os type
@@ -1486,9 +1484,8 @@ int fit_image_check_arch(const void *fit, int noffset, uint8_t arch)
uint8_t image_arch;
int aarch32_support = 0;
-#ifdef CONFIG_ARM64_SUPPORT_AARCH32
- aarch32_support = 1;
-#endif
+ if (IS_ENABLED(CONFIG_ARM64_SUPPORT_AARCH32))
+ aarch32_support = 1;
if (fit_image_get_arch(fit, noffset, &image_arch))
return 0;
@@ -1741,12 +1738,19 @@ int fit_conf_get_node(const void *fit, const char *conf_uname)
if (conf_uname == NULL) {
/* get configuration unit name from the default property */
debug("No configuration specified, trying default...\n");
- conf_uname = (char *)fdt_getprop(fit, confs_noffset,
- FIT_DEFAULT_PROP, &len);
- if (conf_uname == NULL) {
- fit_get_debug(fit, confs_noffset, FIT_DEFAULT_PROP,
- len);
- return len;
+ if (!host_build() && IS_ENABLED(CONFIG_MULTI_DTB_FIT)) {
+ noffset = fit_find_config_node(fit);
+ if (noffset < 0)
+ return noffset;
+ conf_uname = fdt_get_name(fit, noffset, NULL);
+ } else {
+ conf_uname = (char *)fdt_getprop(fit, confs_noffset,
+ FIT_DEFAULT_PROP, &len);
+ if (conf_uname == NULL) {
+ fit_get_debug(fit, confs_noffset, FIT_DEFAULT_PROP,
+ len);
+ return len;
+ }
}
debug("Found default configuration: '%s'\n", conf_uname);
}
@@ -1977,13 +1981,13 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
}
bootstage_mark(bootstage_id + BOOTSTAGE_SUB_CHECK_ARCH);
-#if !defined(USE_HOSTCC) && !defined(CONFIG_SANDBOX)
- if (!fit_image_check_target_arch(fit, noffset)) {
- puts("Unsupported Architecture\n");
- bootstage_error(bootstage_id + BOOTSTAGE_SUB_CHECK_ARCH);
- return -ENOEXEC;
+ if (!host_build() && IS_ENABLED(CONFIG_SANDBOX)) {
+ if (!fit_image_check_target_arch(fit, noffset)) {
+ puts("Unsupported Architecture\n");
+ bootstage_error(bootstage_id + BOOTSTAGE_SUB_CHECK_ARCH);
+ return -ENOEXEC;
+ }
}
-#endif
#ifndef USE_HOSTCC
fit_image_get_arch(fit, noffset, &os_arch);
@@ -2029,9 +2033,8 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
return -ENOENT;
}
-#ifdef CONFIG_FIT_CIPHER
/* Decrypt data before uncompress/move */
- if (IMAGE_ENABLE_DECRYPT) {
+ if (IS_ENABLED(CONFIG_FIT_CIPHER) && IMAGE_ENABLE_DECRYPT) {
puts(" Decrypting Data ... ");
if (fit_image_uncipher(fit, noffset, &buf, &size)) {
puts("Error\n");
@@ -2039,12 +2042,10 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
}
puts("OK\n");
}
-#endif
-#if !defined(USE_HOSTCC) && defined(CONFIG_FIT_IMAGE_POST_PROCESS)
/* perform any post-processing on the image data */
- board_fit_image_post_process(&buf, &size);
-#endif
+ if (!host_build() && IS_ENABLED(CONFIG_FIT_IMAGE_POST_PROCESS))
+ board_fit_image_post_process(&buf, &size);
len = (ulong)size;
diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig
index c5d331f617..49d5453078 100644
--- a/configs/imx8mm_beacon_defconfig
+++ b/configs/imx8mm_beacon_defconfig
@@ -70,6 +70,13 @@ CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_SPL_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_SPL_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_SPL_MMC_HS400_SUPPORT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig
index 91d3bc3ac9..1aef1ab40d 100644
--- a/configs/imx8mm_evk_defconfig
+++ b/configs/imx8mm_evk_defconfig
@@ -66,6 +66,10 @@ CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig
index 22e5f5aeea..41889c4624 100644
--- a/configs/imx8mn_ddr4_evk_defconfig
+++ b/configs/imx8mn_ddr4_evk_defconfig
@@ -65,6 +65,10 @@ CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig
index cd5724e811..6166d103e3 100644
--- a/configs/imx8mp_evk_defconfig
+++ b/configs/imx8mp_evk_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x40200000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SYS_MALLOC_F_LEN=0x10000
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
CONFIG_SYS_I2C_MXC_I2C1=y
@@ -70,6 +70,9 @@ CONFIG_LED_GPIO=y
CONFIG_DM_MMC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig
index 5f94cea5dd..721882567d 100644
--- a/configs/variscite_dart6ul_defconfig
+++ b/configs/variscite_dart6ul_defconfig
@@ -36,6 +36,8 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM_I2C_GPIO=y
CONFIG_SYS_I2C_MXC=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_PHYLIB=y
diff --git a/doc/android/boot-image.rst b/doc/android/boot-image.rst
index 195da688f4..fa8f2a47ee 100644
--- a/doc/android/boot-image.rst
+++ b/doc/android/boot-image.rst
@@ -30,9 +30,10 @@ next image headers:
v2, v1 and v0 formats are backward compatible.
-Android Boot Image format is represented by :c:type:`struct andr_img_hdr` in
-U-Boot, and can be seen in ``include/android_image.h``. U-Boot supports booting
-Android Boot Image and also has associated command
+The Android Boot Image format is represented by
+:c:type:`struct andr_img_hdr <andr_img_hdr>` in U-Boot, and can be seen in
+``include/android_image.h``. U-Boot supports booting Android Boot Image and also
+has associated command
Booting
-------
diff --git a/doc/board/intel/edison.rst b/doc/board/intel/edison.rst
index d658fac02c..5a65673d1e 100644
--- a/doc/board/intel/edison.rst
+++ b/doc/board/intel/edison.rst
@@ -23,38 +23,48 @@ use.
more step (if and only if you have original U-Boot), i.e. run the
following command::
- $ truncate -s %4096 u-boot.bin
+ $ truncate -s %4096 u-boot.bin
2. Run your board and interrupt booting to U-Boot console. In the console
call::
- => run do_force_flash_os
+ => run do_force_flash_os
3. Wait for few seconds, it will prepare environment variable and runs
DFU. Run DFU command from the host system::
- $ dfu-util -v -d 8087:0a99 --alt u-boot0 -D u-boot.bin
+ $ dfu-util -v -d 8087:0a99 --alt u-boot0 -D u-boot.bin
4. Return to U-Boot console and following hint. i.e. push Ctrl+C, and
reset the board::
- => reset
-
+ => reset
Updating U-Boot using xFSTK
---------------------------
You can also update U-Boot using the xfstk-dldr-solo tool if you can build it.
-One way to do that is to follow the `xFSTK`_ instructions. You may need to use
-a virtual machine running Ubuntu Trusty. Once you have built it and installed
-libboost-all-dev, you can copy xfstk-dldr-solo to /usr/local/bin and
+One way to do that is to follow the `xFSTK`_ instructions. In short, after you
+install all necessary dependencies and clone repository, it will look like this:
+
+.. code-block:: sh
+
+ cd xFSTK
+ export DISTRIBUTION_NAME=ubuntu20.04
+ export BUILD_VERSION=1.8.5
+ git checkout v$BUILD_VERSION
+ ...
+
+Once you have built it, you can copy xfstk-dldr-solo to /usr/local/bin and
libboost_program_options.so.1.54.0 to /usr/lib/i386-linux-gnu/ and with luck
-it will work. You might fine this `drive`_ helpful.
+it will work. You might find this `drive`_ helpful.
+
+If it does, then you can download and unpack the Edison recovery image,
+install dfu-util, reset your board and flash U-Boot like this:
-If it does, then you can download and unpack the Edison reocovery image,
-install dfu-util, reset your board and flash U-Boot like this::
+.. code-block:: sh
- $ xfstk-dldr-solo --gpflags 0x80000007 \
+ xfstk-dldr-solo --gpflags 0x80000007 \
--osimage u-boot-edison.img \
--fwdnx recover/edison_dnx_fwr.bin \
--fwimage recover/edison_ifwi-dbg-00.bin \
@@ -64,7 +74,7 @@ This should show the following
.. code-block:: none
- XFSTK Downloader Solo 0.0.0
+ XFSTK Downloader Solo 1.8.5
Copyright (c) 2015 Intel Corporation
Build date and time: Aug 15 2020 15:07:13
@@ -75,13 +85,12 @@ This should show the following
.......(lots of dots)........XFSTK-STATUS--Reconnecting to device - Attempt #1
.......(even more dots)......................
-
You have about 10 seconds after resetting the board to type the above command.
If you want to check if the board is ready, type:
.. code-block:: none
- lsusb |egrep "8087|8086"
+ lsusb | egrep "8087|8086"
Bus 001 Device 004: ID 8086:e005 Intel Corp.
If you see a device with the same ID as above, the board is waiting for your
@@ -112,9 +121,9 @@ After about 5 seconds you should see some console output from the board:
*** Ready to receive application ***
- After another 10 seconds the xFSTK tool completes and the board resets. About
- 10 seconds after that should see the above message again and then within a
- few seconds U-Boot should start on your board:
+After another 10 seconds the xFSTK tool completes and the board resets. About
+10 seconds after that should see the above message again and then within a few
+seconds U-Boot should start on your board:
.. code-block:: none
@@ -146,7 +155,7 @@ After about 5 seconds you should see some console output from the board:
Building boot_params at 0x00090000
Loading bzImage at address 100000 (5427456 bytes)
Magic signature found
- Kernel command line: "rootwait root=PARTUUID=ada722ed-6410-764e-8619-abff6f66e10e rootfstype=ext4 console=ttyMFD2 earlyprintk=ttyMFD2,keep loglevel=4 g_multi.ethernet_config=cdc systemd.unit=multi-user.target hardware_id=00 g_multi.iSerialNumber=2249baf774c675598661a63098c0ad41 g_multi.dev_addr=02:00:86:c0:ad:41 platform_mrfld_audio.audio_codec=dummy"
+ Kernel command line: "rootwait ..."
Magic signature found
Starting kernel ...
@@ -157,5 +166,5 @@ After about 5 seconds you should see some console output from the board:
edison login:
-.. _xFSTK: https://community.intel.com/t5/Intel-Makers/Building-xFSTK-on-Ubuntu-14-04-32-bit-for-flashing-Edison/td-p/538081
+.. _xFSTK: https://github.com/edison-fw/xFSTK
.. _drive: https://drive.google.com/drive/u/0/folders/1URPHrOk9-UBsh8hjv-7WwC0W6Fy61uAJ
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 7609594bd0..d486dab043 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -954,7 +954,7 @@ static int mxc_i2c_probe(struct udevice *bus)
!dm_gpio_is_valid(&i2c_bus->scl_gpio) ||
ret || ret2) {
dev_err(bus,
- "i2c bus %d at %lu, fail to request scl/sda gpio\n",
+ "i2c bus %d at 0x%2lx, fail to request scl/sda gpio\n",
bus->seq, i2c_bus->base);
return -EINVAL;
}
diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h
index 0e8cb221a7..aa4b3bac67 100644
--- a/drivers/nvme/nvme.h
+++ b/drivers/nvme/nvme.h
@@ -535,28 +535,20 @@ struct nvme_completion {
*/
static inline u64 nvme_readq(__le64 volatile *regs)
{
-#if BITS_PER_LONG == 64
- return readq(regs);
-#else
__u32 *ptr = (__u32 *)regs;
u64 val_lo = readl(ptr);
u64 val_hi = readl(ptr + 1);
return val_lo + (val_hi << 32);
-#endif
}
static inline void nvme_writeq(const u64 val, __le64 volatile *regs)
{
-#if BITS_PER_LONG == 64
- writeq(val, regs);
-#else
__u32 *ptr = (__u32 *)regs;
u32 val_lo = lower_32_bits(val);
u32 val_hi = upper_32_bits(val);
writel(val_lo, ptr);
writel(val_hi, ptr + 1);
-#endif
}
struct nvme_bar {
diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c
index babb84ca93..5c6e30e667 100644
--- a/drivers/pci/pci-aardvark.c
+++ b/drivers/pci/pci-aardvark.c
@@ -649,9 +649,6 @@ static int pcie_advk_remove(struct udevice *dev)
struct pcie_advk *pcie = dev_get_priv(dev);
u32 reg;
- if (dm_gpio_is_valid(&pcie->reset_gpio))
- dm_gpio_set_value(&pcie->reset_gpio, 1);
-
reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
reg &= ~LINK_TRAINING_EN;
advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index fedc0134f5..6e291198ab 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -60,7 +60,7 @@ config DM_USB_GADGET
mode)
config SPL_DM_USB_GADGET
- bool "Enable driver model for USB Gadget in sPL"
+ bool "Enable driver model for USB Gadget in SPL"
depends on SPL_DM_USB
help
Enable driver model for USB Gadget in SPL
diff --git a/include/compiler.h b/include/compiler.h
index 90b7afae53..27b9843497 100644
--- a/include/compiler.h
+++ b/include/compiler.h
@@ -6,6 +6,7 @@
#define __COMPILER_H__
#include <stddef.h>
+#include <stdbool.h>
#ifdef USE_HOSTCC
@@ -150,4 +151,12 @@ typedef unsigned long int uintptr_t;
#define MEM_SUPPORT_64BIT_DATA 0
#endif
+static inline bool host_build(void) {
+#ifdef USE_HOSTCC
+ return true;
+#else
+ return false;
+#endif
+}
+
#endif
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index e5c580b3f9..2d854af9a0 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -62,7 +62,7 @@
"networkboot=" \
"run setnetworkboot; " \
"nfs ${loadaddr} /srv/nfs/fitImage; " \
- "bootm ${loadaddr}#conf@${confidx}\0" \
+ "bootm ${loadaddr}\0" \
#define CONFIG_NETWORKBOOTCOMMAND \
"run networkboot; " \
@@ -111,7 +111,7 @@
"doboot=" \
"echo Booting from ${dev}:${devnum}:${partnum} ...; " \
"run setargs; " \
- "bootm ${loadaddr}#conf@${confidx}\0" \
+ "bootm ${loadaddr}\0" \
"tryboot=" \
"setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
"run loadimage || run swappartitions && run loadimage || " \
diff --git a/include/dt-bindings/clock/imx8mm-clock.h b/include/dt-bindings/clock/imx8mm-clock.h
index 07e6c686f3..e63a5530ae 100644
--- a/include/dt-bindings/clock/imx8mm-clock.h
+++ b/include/dt-bindings/clock/imx8mm-clock.h
@@ -248,6 +248,32 @@
#define IMX8MM_CLK_SNVS_ROOT 228
#define IMX8MM_CLK_GIC 229
-#define IMX8MM_CLK_END 230
+#define IMX8MM_SYS_PLL1_40M_CG 230
+#define IMX8MM_SYS_PLL1_80M_CG 231
+#define IMX8MM_SYS_PLL1_100M_CG 232
+#define IMX8MM_SYS_PLL1_133M_CG 233
+#define IMX8MM_SYS_PLL1_160M_CG 234
+#define IMX8MM_SYS_PLL1_200M_CG 235
+#define IMX8MM_SYS_PLL1_266M_CG 236
+#define IMX8MM_SYS_PLL1_400M_CG 237
+#define IMX8MM_SYS_PLL2_50M_CG 238
+#define IMX8MM_SYS_PLL2_100M_CG 239
+#define IMX8MM_SYS_PLL2_125M_CG 240
+#define IMX8MM_SYS_PLL2_166M_CG 241
+#define IMX8MM_SYS_PLL2_200M_CG 242
+#define IMX8MM_SYS_PLL2_250M_CG 243
+#define IMX8MM_SYS_PLL2_333M_CG 244
+#define IMX8MM_SYS_PLL2_500M_CG 245
+
+#define IMX8MM_CLK_M4_CORE 246
+#define IMX8MM_CLK_VPU_CORE 247
+#define IMX8MM_CLK_GPU3D_CORE 248
+#define IMX8MM_CLK_GPU2D_CORE 249
+
+#define IMX8MM_CLK_CLKO2 250
+
+#define IMX8MM_CLK_A53_CORE 251
+
+#define IMX8MM_CLK_END 252
#endif
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 3c68b85b68..0fc2255f3f 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -297,15 +297,17 @@ enum efi_image_auth_status {
* @exit_status: exit status passed to Exit()
* @exit_data_size: exit data size passed to Exit()
* @exit_data: exit data passed to Exit()
- * @exit_jmp: long jump buffer for returning form started image
+ * @exit_jmp: long jump buffer for returning from started image
* @entry: entry address of the relocated image
+ * @image_type: indicates if the image is an applicition or a driver
+ * @auth_status: indicates if the image is authenticated
*/
struct efi_loaded_image_obj {
struct efi_object header;
- efi_status_t exit_status;
+ efi_status_t *exit_status;
efi_uintn_t *exit_data_size;
u16 **exit_data;
- struct jmp_buf_data exit_jmp;
+ struct jmp_buf_data *exit_jmp;
EFIAPI efi_status_t (*entry)(efi_handle_t image_handle,
struct efi_system_table *st);
u16 image_type;
diff --git a/include/image.h b/include/image.h
index 00bc03bebe..41473dbb9c 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1552,6 +1552,10 @@ int board_fit_config_name_match(const char *name);
* @return no return value (failure should be handled internally)
*/
void board_fit_image_post_process(void **p_image, size_t *p_size);
+#else
+static inline void board_fit_image_post_process(void **p_image, size_t *p_size)
+{
+}
#endif /* CONFIG_SPL_FIT_IMAGE_POST_PROCESS */
#define FDT_ERROR ((ulong)(-1))
diff --git a/arch/x86/include/asm/fsp/fsp_types.h b/include/signatures.h
index 3d5b17ecf1..4042db1e00 100644
--- a/arch/x86/include/asm/fsp/fsp_types.h
+++ b/include/signatures.h
@@ -4,8 +4,8 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#ifndef __FSP_TYPES_H__
-#define __FSP_TYPES_H__
+#ifndef __SIGNATURES_H__
+#define __SIGNATURES_H__
/**
* Returns a 16-bit signature built from 2 ASCII characters.
@@ -59,4 +59,4 @@
#define SIGNATURE_64(A, B, C, D, E, F, G, H) \
(SIGNATURE_32(A, B, C, D) | ((u64)(SIGNATURE_32(E, F, G, H)) << 32))
-#endif
+#endif /* __SIGNATURES_H__ */
diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c
index 61dc72a23d..d3be2f94c6 100644
--- a/lib/efi_loader/efi_bootmgr.c
+++ b/lib/efi_loader/efi_bootmgr.c
@@ -275,7 +275,7 @@ static efi_status_t try_load_entry(u16 n, efi_handle_t *handle,
memcpy(*load_options, lo.optional_data, size);
ret = efi_set_load_options(*handle, size, *load_options);
} else {
- load_options = NULL;
+ *load_options = NULL;
}
error:
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 246b59d3b3..a89bdb3140 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -271,8 +271,8 @@ efi_status_t is_valid_tpl(efi_uintn_t tpl)
* efi_signal_event() - signal an EFI event
* @event: event to signal
*
- * This function signals an event. If the event belongs to an event group all
- * events of the group are signaled. If they are of type EVT_NOTIFY_SIGNAL
+ * This function signals an event. If the event belongs to an event group, all
+ * events of the group are signaled. If they are of type EVT_NOTIFY_SIGNAL,
* their notification function is queued.
*
* For the SignalEvent service see efi_signal_event_ext.
@@ -2000,7 +2000,7 @@ static efi_status_t EFIAPI efi_exit_boot_services(efi_handle_t image_handle,
}
if (!efi_st_keep_devices) {
- if IS_ENABLED(CONFIG_USB_DEVICE)
+ if (IS_ENABLED(CONFIG_USB_DEVICE))
udc_disconnect();
board_quiesce_devices();
dm_remove_devices_flags(DM_REMOVE_ACTIVE_ALL);
@@ -2899,6 +2899,8 @@ efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle,
efi_status_t ret;
void *info;
efi_handle_t parent_image = current_image;
+ efi_status_t exit_status;
+ struct jmp_buf_data exit_jmp;
EFI_ENTRY("%p, %p, %p", image_handle, exit_data_size, exit_data);
@@ -2920,9 +2922,11 @@ efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle,
image_obj->exit_data_size = exit_data_size;
image_obj->exit_data = exit_data;
+ image_obj->exit_status = &exit_status;
+ image_obj->exit_jmp = &exit_jmp;
/* call the image! */
- if (setjmp(&image_obj->exit_jmp)) {
+ if (setjmp(&exit_jmp)) {
/*
* We called the entry point of the child image with EFI_CALL
* in the lines below. The child image called the Exit() boot
@@ -2944,10 +2948,10 @@ efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle,
*/
assert(__efi_entry_check());
EFI_PRINT("%lu returned by started image\n",
- (unsigned long)((uintptr_t)image_obj->exit_status &
+ (unsigned long)((uintptr_t)exit_status &
~EFI_ERROR_MASK));
current_image = parent_image;
- return EFI_EXIT(image_obj->exit_status);
+ return EFI_EXIT(exit_status);
}
current_image = image_handle;
@@ -3130,6 +3134,7 @@ static efi_status_t EFIAPI efi_exit(efi_handle_t image_handle,
struct efi_loaded_image *loaded_image_protocol;
struct efi_loaded_image_obj *image_obj =
(struct efi_loaded_image_obj *)image_handle;
+ struct jmp_buf_data *exit_jmp;
EFI_ENTRY("%p, %ld, %zu, %p", image_handle, exit_status,
exit_data_size, exit_data);
@@ -3171,6 +3176,9 @@ static efi_status_t EFIAPI efi_exit(efi_handle_t image_handle,
if (ret != EFI_SUCCESS)
EFI_PRINT("%s: out of memory\n", __func__);
}
+ /* efi_delete_image() frees image_obj. Copy before the call. */
+ exit_jmp = image_obj->exit_jmp;
+ *image_obj->exit_status = exit_status;
if (image_obj->image_type == IMAGE_SUBSYSTEM_EFI_APPLICATION ||
exit_status != EFI_SUCCESS)
efi_delete_image(image_obj, loaded_image_protocol);
@@ -3184,8 +3192,7 @@ static efi_status_t EFIAPI efi_exit(efi_handle_t image_handle,
*/
efi_restore_gd();
- image_obj->exit_status = exit_status;
- longjmp(&image_obj->exit_jmp, 1);
+ longjmp(exit_jmp, 1);
panic("EFI application exited");
out:
diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c
index 011accab78..705109596e 100644
--- a/lib/efi_loader/efi_console.c
+++ b/lib/efi_loader/efi_console.c
@@ -14,6 +14,7 @@
#include <env.h>
#include <stdio_dev.h>
#include <video_console.h>
+#include <linux/delay.h>
#define EFI_COUT_MODE_2 2
#define EFI_MAX_COUT_MODE 3
@@ -689,6 +690,17 @@ static efi_status_t efi_cin_read_key(struct efi_key_data *key)
switch (ch) {
case 0x1b:
/*
+ * If a second key is received within 10 ms, assume that we are
+ * dealing with an escape sequence. Otherwise consider this the
+ * escape key being hit. 10 ms is long enough to work fine at
+ * 1200 baud and above.
+ */
+ udelay(10000);
+ if (!tstc()) {
+ pressed_key.scan_code = 23;
+ break;
+ }
+ /*
* Xterm Control Sequences
* https://www.xfree86.org/4.8.0/ctlseqs.html
*/
diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c
index be6f3dfad4..b8808fdeca 100644
--- a/lib/efi_loader/efi_variable_tee.c
+++ b/lib/efi_loader/efi_variable_tee.c
@@ -36,20 +36,29 @@ static int get_connection(struct mm_connection *conn)
static const struct tee_optee_ta_uuid uuid = PTA_STMM_UUID;
struct udevice *tee = NULL;
struct tee_open_session_arg arg;
- int rc;
+ int rc = -ENODEV;
tee = tee_find_device(tee, NULL, NULL, NULL);
if (!tee)
- return -ENODEV;
+ goto out;
memset(&arg, 0, sizeof(arg));
tee_optee_ta_uuid_to_octets(arg.uuid, &uuid);
rc = tee_open_session(tee, &arg, 0, NULL);
- if (!rc) {
- conn->tee = tee;
- conn->session = arg.session;
+ if (rc)
+ goto out;
+
+ /* Check the internal OP-TEE result */
+ if (arg.ret != TEE_SUCCESS) {
+ rc = -EIO;
+ goto out;
}
+ conn->tee = tee;
+ conn->session = arg.session;
+
+ return 0;
+out:
return rc;
}
@@ -88,6 +97,7 @@ static efi_status_t optee_mm_communicate(void *comm_buf, ulong dsize)
if (tee_shm_register(conn.tee, comm_buf, buf_size, 0, &shm)) {
log_err("Unable to register shared memory\n");
+ tee_close_session(conn.tee, conn.session);
return EFI_UNSUPPORTED;
}