diff options
| -rw-r--r-- | arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/mach-stm32mp/cpu.c | 4 |
3 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi index cb92fc9c14..1ae57e1854 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi @@ -75,6 +75,8 @@ }; pins2 { u-boot,dm-pre-reloc; + /delete-property/ bias-disable; + bias-pull-up; }; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi index 7529068c51..c73318488d 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi @@ -132,11 +132,11 @@ u-boot,dm-pre-reloc; }; - /* VCO = 600.0 MHz => P = 100, Q = 50, R = 100 */ + /* VCO = 600.0 MHz => P = 99, Q = 74, R = 99 */ pll4: st,pll@3 { compatible = "st,stm32mp1-pll"; reg = <3>; - cfg = < 1 49 5 11 5 PQR(1,1,1) >; + cfg = < 3 98 5 7 5 PQR(1,1,1) >; u-boot,dm-pre-reloc; }; }; diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index b7fcee2b36..f19e5c3f33 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -580,8 +580,8 @@ __weak int setup_mac_address(void) return -EINVAL; } pr_debug("OTP MAC address = %pM\n", enetaddr); - ret = !eth_env_set_enetaddr("ethaddr", enetaddr); - if (!ret) + ret = eth_env_set_enetaddr("ethaddr", enetaddr); + if (ret) pr_err("Failed to set mac address %pM from OTP: %d\n", enetaddr, ret); #endif |