diff options
158 files changed, 2876 insertions, 2231 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 70079974fa..55aceb51cd 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -322,6 +322,7 @@ else dtb-$(CONFIG_ARCH_MVEBU) += \ armada-3720-db.dtb \ armada-3720-espressobin.dtb \ + armada-3720-ripe-atlas.dtb \ armada-3720-turris-mox.dtb \ armada-3720-eDPU.dtb \ armada-3720-uDPU.dtb \ diff --git a/arch/arm/dts/armada-3720-ripe-atlas.dts b/arch/arm/dts/armada-3720-ripe-atlas.dts new file mode 100644 index 0000000000..4457845266 --- /dev/null +++ b/arch/arm/dts/armada-3720-ripe-atlas.dts @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0+ or X11 +/* + * Device Tree file for CZ.NIC' RIPE Atlas Probe + * 2021 by Marek Behún <marek.behun@nic.cz> + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include "armada-372x.dtsi" + +/ { + model = "CZ.NIC's RIPE Atlas Probe"; + compatible = "cznic,ripe-atlas", "marvell,armada3720", + "marvell,armada3710"; + + aliases { + ethernet0 = ð0; + mmc0 = &sdhci0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000 0x20000000>; + }; + + leds { + compatible = "gpio-leds"; + + led { + gpios = <&gpiosb 21 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_RED>; + function = LED_FUNCTION_ACTIVITY; + }; + }; + + vsdc_reg: vsdc-reg { + compatible = "regulator-gpio"; + regulator-name = "vsdc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + + gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>; + gpios-states = <0>; + states = <1800000 0x1 + 3300000 0x0>; + enable-active-high; + }; +}; + +&comphy { + status = "disabled"; +}; + +&mdio { + pinctrl-names = "default"; + pinctrl-0 = <&smi_pins>; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +ð0 { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&phy1>; + status = "okay"; +}; + +&sdhci0 { + bus-width = <8>; + non-removable; + vqmmc-supply = <&vsdc_reg>; + marvell,pad-type = "sd"; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; +}; diff --git a/arch/arm/mach-imx/mxs/Kconfig b/arch/arm/mach-imx/mxs/Kconfig index ccce6a78ca..d2e4205c5c 100644 --- a/arch/arm/mach-imx/mxs/Kconfig +++ b/arch/arm/mach-imx/mxs/Kconfig @@ -54,7 +54,6 @@ config SYS_SOC config SPL_MXS_PMU_MINIMAL_VDD5V_CURRENT bool "Force minimal current draw from VDD5V by MX28 PMU" - default n help After setting this option, the current drawn from VDD5V by the PMU is reduced to zero - the DCDC_BATT is used as @@ -62,7 +61,6 @@ config SPL_MXS_PMU_MINIMAL_VDD5V_CURRENT config SPL_MXS_PMU_DISABLE_BATT_CHARGE bool "Disable Battery Charging in MX28 PMU" - default n config SPL_MXS_PMU_ENABLE_4P2_LINEAR_REGULATOR bool "Enable the 4P2 linear regulator in MX28 PMU" diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 5c7f4bf964..c80d8587b1 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -144,8 +144,12 @@ config TARGET_TURRIS_OMNIA select ATSHA204A config TARGET_TURRIS_MOX - bool "Support Turris Mox" + bool "Support CZ.NIC's Turris Mox / RIPE Atlas Probe" select ARMADA_3700 + select BOARD_TYPES + select ENV_IS_IN_MMC + select ENV_IS_IN_SPI_FLASH + select MULTI_DTB_FIT config TARGET_MVEBU_ARMADA_8K bool "Support Armada 7k/8k platforms" diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index eaaa68a856..79f8877745 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -71,8 +71,9 @@ #error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR must be set to 0 #endif #if !defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET) || \ - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0 -#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to 0 + (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 0 && \ + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET != 4096) +#error CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET must be set to either 0 or 4096 #endif #endif diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index c43c185c17..a6c69c300d 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -450,7 +450,6 @@ config ROCKCHIP_BOOT_MODE_REG config ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON bool "Disable device boot on power plug-in" depends on PMIC_RK8XX - default n ---help--- Say Y here to prevent the device from booting up because of a plug-in event. When set, the device will boot briefly to determine why it was diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index 0e073045be..2fc1521e2d 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -14,7 +14,6 @@ config SPL_SYS_MALLOC_F_LEN config SDM845 bool "Qualcomm Snapdragon 845 SoC" - default n select LINUX_KERNEL_IMAGE_HEADER config LNX_KRNL_IMG_TEXT_OFFSET_BASE diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 40ca7d7b3a..a10e4c06b6 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -811,7 +811,6 @@ config AXP_GPIO config AXP_DISABLE_BOOT_ON_POWERON bool "Disable device boot on power plug-in" depends on AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER - default n ---help--- Say Y here to prevent the device from booting up because of a plug-in event. When set, the device will boot into the SPL briefly to diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 464bd0798f..0e94b84fe6 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -18,7 +18,6 @@ config TEGRA_CLKRST config TEGRA_CRYPTO bool "Tegra AES128 crypto module" select AES - default n config TEGRA_GP_PADCTRL bool diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 587edd50d7..b288c65e7f 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -200,7 +200,6 @@ source "board/sysam/stmark2/Kconfig" config M68K_QEMU bool "Build with workarounds for incomplete QEMU emulation" - default n help QEMU 8.x currently does not implement RAMBAR accesses and DMA timers. Enable this option for U-Boot CI purposes only diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index e9c3042773..b737d5d12f 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1617,7 +1617,7 @@ relocate_code: mr r10,r5 /* Save copy of Destination Address */ GET_GOT -#ifndef CONFIG_SPL_SKIP_RELOCATE +#if !defined(CONFIG_SPL_SKIP_RELOCATE) || !defined(CONFIG_SPL_BUILD) mr r3,r5 /* Destination Address */ lis r4,CONFIG_VAL(SYS_MONITOR_BASE)@h /* Source Address */ ori r4,r4,CONFIG_VAL(SYS_MONITOR_BASE)@l diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index e291456530..8fc81fb284 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -68,7 +68,6 @@ config SPL_SYS_DCACHE_OFF config SPL_ZERO_MEM_BEFORE_USE bool "Zero memory before use" depends on SPL - default n help Zero stack/GD/malloc area in SPL before using them, this is needed for Sifive core devices that uses L2 cache to store SPL. diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi index ff7e5584c5..241f397ba6 100644 --- a/arch/sandbox/dts/sandbox.dtsi +++ b/arch/sandbox/dts/sandbox.dtsi @@ -4,11 +4,23 @@ * and sandbox64 builds. */ +#include <config.h> #include <dt-bindings/input/input.h> #define USB_CLASS_HUB 9 / { + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + event_log: tcg_event_log { + no-map; + reg = <(CFG_SYS_SDRAM_SIZE - 0x2000) 0x2000>; + }; + }; + binman { }; @@ -342,6 +354,7 @@ tpm2 { compatible = "sandbox,tpm2"; + memory-region = <&event_log>; }; triangle { diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 5b54651a1d..2887f6c0e7 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -9,6 +9,7 @@ /dts-v1/; +#include <config.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/sandbox-gpio.h> #include <dt-bindings/input/input.h> @@ -69,6 +70,17 @@ osd0 = "/osd"; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + event_log: tcg_event_log { + no-map; + reg = <(CFG_SYS_SDRAM_SIZE - 0x2000) 0x2000>; + }; + }; + binman: binman { }; @@ -1436,6 +1448,7 @@ tpm2 { compatible = "sandbox,tpm2"; + memory-region = <&event_log>; }; tpm { diff --git a/board/CZ.NIC/turris_mox/mox_sp.c b/board/CZ.NIC/turris_mox/mox_sp.c index 87f67512fb..11d8756471 100644 --- a/board/CZ.NIC/turris_mox/mox_sp.c +++ b/board/CZ.NIC/turris_mox/mox_sp.c @@ -10,6 +10,8 @@ #include <linux/delay.h> #include <mach/mbox.h> +#include "mox_sp.h" + const char *mox_sp_get_ecdsa_public_key(void) { static char public_key[135]; @@ -42,12 +44,13 @@ static inline void res_to_mac(u8 *mac, u32 t1, u32 t2) mac[5] = t2; } -int mbox_sp_get_board_info(u64 *sn, u8 *mac1, u8 *mac2, int *bv, int *ram) +int mbox_sp_get_board_info(u64 *sn, u8 *mac1, u8 *mac2, int *bv, int *ram, + enum cznic_a3720_board *board) { - u32 out[8]; + u32 out[9]; int res; - res = mbox_do_cmd(MBOX_CMD_BOARD_INFO, NULL, 0, out, 8); + res = mbox_do_cmd(MBOX_CMD_BOARD_INFO, NULL, 0, out, 9); if (res < 0) return res; @@ -69,5 +72,8 @@ int mbox_sp_get_board_info(u64 *sn, u8 *mac1, u8 *mac2, int *bv, int *ram) if (mac2) res_to_mac(mac2, out[6], out[7]); + if (board) + *board = out[8] + 1; + return 0; } diff --git a/board/CZ.NIC/turris_mox/mox_sp.h b/board/CZ.NIC/turris_mox/mox_sp.h index 83b6037458..720880d5df 100644 --- a/board/CZ.NIC/turris_mox/mox_sp.h +++ b/board/CZ.NIC/turris_mox/mox_sp.h @@ -8,8 +8,14 @@ #include <common.h> +enum cznic_a3720_board { + BOARD_UNDEFINED = 0x0, + BOARD_TURRIS_MOX = 0x1, + BOARD_RIPE_ATLAS = 0x3, +}; + const char *mox_sp_get_ecdsa_public_key(void); int mbox_sp_get_board_info(u64 *sn, u8 *mac1, u8 *mac2, int *bv, - int *ram); + int *ram, enum cznic_a3720_board *board); #endif /* _BOARD_CZNIC_TURRIS_MOX_MOX_SP_H_ */ diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c index 370c2668b0..63b8699219 100644 --- a/board/CZ.NIC/turris_mox/turris_mox.c +++ b/board/CZ.NIC/turris_mox/turris_mox.c @@ -15,6 +15,7 @@ #include <dm.h> #include <dm/of_extra.h> #include <env.h> +#include <env_internal.h> #include <event.h> #include <fdt_support.h> #include <init.h> @@ -45,6 +46,26 @@ DECLARE_GLOBAL_DATA_PTR; +int board_fit_config_name_match(const char *name) +{ + if (!gd->board_type) { + enum cznic_a3720_board board; + + if (mbox_sp_get_board_info(NULL, NULL, NULL, NULL, NULL, + &board) < 0) { + printf("Cannot determine board, defaulting to Turris MOX!\n"); + board = BOARD_TURRIS_MOX; + } + + gd->board_type = board; + } + + return !((gd->board_type == BOARD_TURRIS_MOX && + !strcmp(name, "armada-3720-turris-mox")) || + (gd->board_type == BOARD_RIPE_ATLAS && + !strcmp(name, "armada-3720-ripe-atlas"))); +} + #if defined(CONFIG_OF_BOARD_FIXUP) int board_fix_fdt(void *blob) { @@ -53,6 +74,9 @@ int board_fix_fdt(void *blob) int i, size, ret; bool eth1_sgmii; + if (gd->board_type != BOARD_TURRIS_MOX) + return 0; + /* * SPI driver is not loaded in driver model yet, but we have to find out * if pcie should be enabled in U-Boot's device tree. Therefore we have @@ -388,16 +412,23 @@ static void load_spi_dtb(void) int misc_init_r(void) { + int i, ret, addrcnt; u8 mac[2][6]; - int i, ret; - ret = mbox_sp_get_board_info(NULL, mac[0], mac[1], NULL, NULL); + ret = mbox_sp_get_board_info(NULL, mac[0], mac[1], NULL, NULL, NULL); if (ret < 0) { printf("Cannot read data from OTP!\n"); return 0; } - for (i = 0; i < 2; ++i) { + if (gd->board_type == BOARD_TURRIS_MOX) + addrcnt = 2; + else if (gd->board_type == BOARD_RIPE_ATLAS) + addrcnt = 1; + else + addrcnt = 0; + + for (i = 0; i < addrcnt; ++i) { u8 oldmac[6]; if (is_valid_ethaddr(mac[i]) && @@ -405,7 +436,13 @@ int misc_init_r(void) eth_env_set_enetaddr_by_index("eth", i, mac[i]); } - load_spi_dtb(); + if (gd->board_type == BOARD_RIPE_ATLAS) { + env_set("board", "ripe_atlas"); + env_set("board_name", "ripe_atlas"); + env_set("fdtfile", "marvell/armada-3720-ripe-atlas.dtb"); + } else { + load_spi_dtb(); + } return 0; } @@ -528,14 +565,15 @@ static void handle_reset_button(void) int show_board_info(void) { int i, ret, board_version, ram_size, is_sd; - const char *pub_key; + const char *pub_key, *model; const u8 *topology; u64 serial_number; - printf("Model: CZ.NIC Turris Mox Board\n"); + model = fdt_getprop(gd->fdt_blob, 0, "model", NULL); + printf("Model: %s\n", model); ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version, - &ram_size); + &ram_size, NULL); if (ret < 0) { printf(" Cannot read board info: %i\n", ret); } else { @@ -550,6 +588,9 @@ int show_board_info(void) else printf(" Cannot read ECDSA Public Key\n"); + if (gd->board_type != BOARD_TURRIS_MOX) + return 0; + ret = mox_get_topology(&topology, &module_count, &is_sd); if (ret) printf("Cannot read module topology!\n"); @@ -668,10 +709,24 @@ err: return NULL; } +enum env_location env_get_location(enum env_operation op, int prio) +{ + if (prio > 0) + return ENVL_UNKNOWN; + + if (gd->board_type == BOARD_RIPE_ATLAS) + return ENVL_MMC; + + return ENVL_SPI_FLASH; +} + static int last_stage_init(void) { struct gpio_desc reset_gpio = {}; + if (gd->board_type != BOARD_TURRIS_MOX) + return 0; + /* configure modules */ if (get_reset_gpio(&reset_gpio) < 0) goto handle_reset_btn; @@ -801,6 +856,9 @@ int ft_board_setup(void *blob, struct bd_info *bd) { int res; + if (gd->board_type != BOARD_TURRIS_MOX) + return 0; + /* * If MOX B (PCI), MOX F (USB) or MOX G (Passthrough PCI) modules are * connected, enable the PCIe node. diff --git a/board/asus/grouper/Kconfig b/board/asus/grouper/Kconfig index 912c6c5fba..47d9bae946 100644 --- a/board/asus/grouper/Kconfig +++ b/board/asus/grouper/Kconfig @@ -12,11 +12,9 @@ config SYS_CONFIG_NAME config GROUPER_TPS65911 bool "Enable support TI TPS65911 PMIC" select CMD_POWEROFF - default n config GROUPER_MAX77663 bool "Enable support MAXIM MAX77663 PMIC" select CMD_POWEROFF - default n endif diff --git a/board/asus/transformer-t30/Kconfig b/board/asus/transformer-t30/Kconfig index 3c36f4ada2..accc999c43 100644 --- a/board/asus/transformer-t30/Kconfig +++ b/board/asus/transformer-t30/Kconfig @@ -14,7 +14,6 @@ config TRANSFORMER_SPI_BOOT select TEGRA20_SLINK select DM_SPI_FLASH select SPI_FLASH_WINBOND - default n help Tegra 3 based Transformers with Windows RT have core boot sequence (BCT and EBT) on separate SPI FLASH diff --git a/board/keymile/Kconfig b/board/keymile/Kconfig index c6576aa652..f7e9b74f57 100644 --- a/board/keymile/Kconfig +++ b/board/keymile/Kconfig @@ -125,7 +125,6 @@ config SYS_IVM_EEPROM_PAGE_LEN config PG_WCOM_UBOOT_UPDATE_SUPPORTED bool "Enable U-Boot Field Fail-Safe Update Functionality" select EVENT - default n help Indicates that field fail-safe u-boot update is supported. This functionality works only for designs that are booting @@ -133,7 +132,6 @@ config PG_WCOM_UBOOT_UPDATE_SUPPORTED config PG_WCOM_UBOOT_BOOTPACKAGE bool "U-Boot Is Part Of Factory Boot-Package Image" - default n help Indicates that u-boot will be a part of the factory programmed boot-package image. @@ -149,7 +147,6 @@ config PG_WCOM_UBOOT_UPDATE_TEXT_BASE config PG_WCOM_UBOOT_UPDATE bool "U-Boot Is Part Of Factory Boot-Package Image" - default n help Indicates that u-boot will be a part of the embedded software and programmed at field. diff --git a/board/lg/x3-t30/Kconfig b/board/lg/x3-t30/Kconfig index 20ea4f5f32..53d776019d 100644 --- a/board/lg/x3-t30/Kconfig +++ b/board/lg/x3-t30/Kconfig @@ -11,14 +11,12 @@ config SYS_CONFIG_NAME config DEVICE_P880 bool "Enable support for LG Optimus 4X HD" - default n help LG Optimus 4X HD derives from x3 board but has slight differences. config DEVICE_P895 bool "Enable support for LG Optimus Vu" - default n help LG Optimus Vu derives from x3 board but has slight differences. diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c index e52e0a59ab..59e1a42564 100644 --- a/board/nuvoton/arbel_evb/arbel_evb.c +++ b/board/nuvoton/arbel_evb/arbel_evb.c @@ -16,7 +16,7 @@ #define DRAM_1GB_SIZE 0x40000000ULL #define DRAM_2GB_ECC_SIZE 0x70000000ULL #define DRAM_2GB_SIZE 0x80000000ULL -#define DRAM_4GB_ECC_SIZE 0xE00000000ULL +#define DRAM_4GB_ECC_SIZE 0xE0000000ULL #define DRAM_4GB_SIZE 0x100000000ULL DECLARE_GLOBAL_DATA_PTR; @@ -29,7 +29,6 @@ int board_init(void) int dram_init(void) { struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA; - uint64_t delta = 0ULL; /* * get dram active size value from bootblock. @@ -38,18 +37,22 @@ int dram_init(void) */ gd->ram_size = readl(&gcr->scrpad_c); - debug("%s: scrpad_c: %llx ", __func__, gd->ram_size); - if (gd->ram_size == 0) { + if (gd->ram_size == 0) gd->ram_size = readl(&gcr->scrpad_b); - debug("%s: scrpad_b: %llx ", __func__, gd->ram_size); - } else { + else gd->ram_size *= 0x100000ULL; - } - gd->bd->bi_dram[0].start = 0; debug("ram_size: %llx ", gd->ram_size); + return 0; +} + +int dram_init_banksize(void) +{ + + gd->bd->bi_dram[0].start = 0; + switch (gd->ram_size) { case DRAM_512MB_ECC_SIZE: case DRAM_512MB_SIZE: @@ -62,32 +65,28 @@ int dram_init(void) gd->bd->bi_dram[1].size = 0; break; case DRAM_4GB_ECC_SIZE: - gd->bd->bi_dram[0].size = DRAM_2GB_ECC_SIZE; + gd->bd->bi_dram[0].size = DRAM_2GB_SIZE; gd->bd->bi_dram[1].start = DRAM_4GB_SIZE; - gd->bd->bi_dram[1].size = DRAM_2GB_SIZE; - delta = DRAM_4GB_SIZE - DRAM_2GB_ECC_SIZE; + gd->bd->bi_dram[1].size = DRAM_2GB_SIZE - + (DRAM_4GB_SIZE - DRAM_4GB_ECC_SIZE); + /* use bank0 only */ + gd->ram_size = DRAM_2GB_SIZE; break; case DRAM_4GB_SIZE: gd->bd->bi_dram[0].size = DRAM_2GB_SIZE; gd->bd->bi_dram[1].start = DRAM_4GB_SIZE; gd->bd->bi_dram[1].size = DRAM_2GB_SIZE; - delta = DRAM_4GB_SIZE - DRAM_2GB_SIZE; + /* use bank0 only */ + gd->ram_size = DRAM_2GB_SIZE; break; default: gd->bd->bi_dram[0].size = DRAM_1GB_SIZE; gd->bd->bi_dram[1].start = 0; gd->bd->bi_dram[1].size = 0; + gd->ram_size = DRAM_1GB_SIZE; break; } - gd->ram_size -= delta; - return 0; } -int dram_init_banksize(void) -{ - dram_init(); - - return 0; -} diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c index e35e55fb5d..0b0686e262 100644 --- a/board/siemens/iot2050/board.c +++ b/board/siemens/iot2050/board.c @@ -155,19 +155,20 @@ static bool board_is_advanced(void) strstr((char *)info->name, "IOT2050-ADVANCED") != NULL; } -static bool board_is_sr1(void) +static bool board_is_pg1(void) { struct iot2050_info *info = IOT2050_INFO_DATA; return info->magic == IOT2050_INFO_MAGIC && - strstr((char *)info->name, "-PG2") == NULL; + (strcmp((char *)info->name, "IOT2050-BASIC") == 0 || + strcmp((char *)info->name, "IOT2050-ADVANCED") == 0); } static bool board_is_m2(void) { struct iot2050_info *info = IOT2050_INFO_DATA; - return !board_is_sr1() && info->magic == IOT2050_INFO_MAGIC && + return info->magic == IOT2050_INFO_MAGIC && strcmp((char *)info->name, "IOT2050-ADVANCED-M2") == 0; } @@ -217,14 +218,14 @@ void set_board_info_env(void) } if (board_is_advanced()) { - if (board_is_sr1()) + if (board_is_pg1()) fdtfile = "ti/k3-am6548-iot2050-advanced.dtb"; else if(board_is_m2()) fdtfile = "ti/k3-am6548-iot2050-advanced-m2.dtb"; else fdtfile = "ti/k3-am6548-iot2050-advanced-pg2.dtb"; } else { - if (board_is_sr1()) + if (board_is_pg1()) fdtfile = "ti/k3-am6528-iot2050-basic.dtb"; else fdtfile = "ti/k3-am6528-iot2050-basic-pg2.dtb"; diff --git a/board/socionext/developerbox/developerbox.c b/board/socionext/developerbox/developerbox.c index 9585944d80..ac4415ff3b 100644 --- a/board/socionext/developerbox/developerbox.c +++ b/board/socionext/developerbox/developerbox.c @@ -20,39 +20,18 @@ #if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) struct efi_fw_image fw_images[] = { -#if CONFIG_IS_ENABLED(FWU_MULTI_BANK_UPDATE) { .image_type_id = DEVELOPERBOX_FIP_IMAGE_GUID, .fw_name = u"DEVELOPERBOX-FIP", .image_index = 1, }, -#else - { - .image_type_id = DEVELOPERBOX_UBOOT_IMAGE_GUID, - .fw_name = u"DEVELOPERBOX-UBOOT", - .image_index = 1, - }, - { - .image_type_id = DEVELOPERBOX_FIP_IMAGE_GUID, - .fw_name = u"DEVELOPERBOX-FIP", - .image_index = 2, - }, - { - .image_type_id = DEVELOPERBOX_OPTEE_IMAGE_GUID, - .fw_name = u"DEVELOPERBOX-OPTEE", - .image_index = 3, - }, -#endif }; struct efi_capsule_update_info update_info = { - .dfu_string = "mtd nor1=u-boot.bin raw 200000 100000;" - "fip.bin raw 180000 78000;" - "optee.bin raw 500000 100000", + .dfu_string = "mtd nor1=fip.bin raw 600000 400000", .num_images = ARRAY_SIZE(fw_images), .images = fw_images, }; - #endif /* EFI_HAVE_CAPSULE_SUPPORT */ static struct mm_region sc2a11_mem_map[] = { diff --git a/boot/Kconfig b/boot/Kconfig index a01e6cb8aa..fbc49c5bca 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -685,6 +685,38 @@ config LEGACY_IMAGE_FORMAT loaded. If a board needs the legacy image format support in this case, enable it here. +config MEASURED_BOOT + bool "Measure boot images and configuration when booting without EFI" + depends on HASH && TPM_V2 + help + This option enables measurement of the boot process when booting + without UEFI . Measurement involves creating cryptographic hashes + of the binary images that are booting and storing them in the TPM. + In addition, a log of these hashes is stored in memory for the OS + to verify the booted images and configuration. Enable this if the + OS has configured some memory area for the event log and you intend + to use some attestation tools on your system. + +if MEASURED_BOOT + config MEASURE_DEVICETREE + bool "Measure the devicetree image" + default y if MEASURED_BOOT + help + On some platforms, the devicetree is not static as it may contain + random MAC addresses or other such data that changes each boot. + Therefore, it should not be measured into the TPM. In that case, + disable the measurement here. + + config MEASURE_IGNORE_LOG + bool "Ignore the existing event log" + default n + help + On platforms that use an event log memory region that persists + through system resets and are the first stage bootloader, then + this option should be enabled to ignore any existing data in the + event log memory region. +endif # MEASURED_BOOT + config SUPPORT_RAW_INITRD bool "Enable raw initrd images" help diff --git a/boot/bootflow.c b/boot/bootflow.c index be543c8588..6922e7e0c4 100644 --- a/boot/bootflow.c +++ b/boot/bootflow.c @@ -752,7 +752,7 @@ int cmdline_set_arg(char *buf, int maxlen, const char *cmdline, in_quote = false; continue; } - if (*p == '=') { + if (*p == '=' && !arg_end) { arg_end = p; val = p + 1; } else if (*p == '"') { @@ -788,7 +788,8 @@ int cmdline_set_arg(char *buf, int maxlen, const char *cmdline, } /* if this is the target arg, update it */ - if (!strncmp(from, set_arg, arg_end - from)) { + if (arg_end - from == set_arg_len && + !strncmp(from, set_arg, set_arg_len)) { if (!buf) { bool has_quote = val_end[-1] == '"'; diff --git a/boot/bootm.c b/boot/bootm.c index 8f96a80d42..cb61485c22 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -23,6 +23,7 @@ #include <asm/global_data.h> #include <asm/io.h> #include <linux/sizes.h> +#include <tpm-v2.h> #if defined(CONFIG_CMD_USB) #include <usb.h> #endif @@ -673,6 +674,75 @@ int bootm_process_cmdline_env(int flags) return 0; } +int bootm_measure(struct bootm_headers *images) +{ + int ret = 0; + + /* Skip measurement if EFI is going to do it */ + if (images->os.os == IH_OS_EFI && + IS_ENABLED(CONFIG_EFI_TCG2_PROTOCOL) && + IS_ENABLED(CONFIG_BOOTM_EFI)) + return ret; + + if (IS_ENABLED(CONFIG_MEASURED_BOOT)) { + struct tcg2_event_log elog; + struct udevice *dev; + void *initrd_buf; + void *image_buf; + const char *s; + u32 rd_len; + bool ign; + + elog.log_size = 0; + ign = IS_ENABLED(CONFIG_MEASURE_IGNORE_LOG); + ret = tcg2_measurement_init(&dev, &elog, ign); + if (ret) + return ret; + + image_buf = map_sysmem(images->os.image_start, + images->os.image_len); + ret = tcg2_measure_data(dev, &elog, 8, images->os.image_len, + image_buf, EV_COMPACT_HASH, + strlen("linux") + 1, (u8 *)"linux"); + if (ret) + goto unmap_image; + + rd_len = images->rd_end - images->rd_start; + initrd_buf = map_sysmem(images->rd_start, rd_len); + ret = tcg2_measure_data(dev, &elog, 9, rd_len, initrd_buf, + EV_COMPACT_HASH, strlen("initrd") + 1, + (u8 *)"initrd"); + if (ret) + goto unmap_initrd; + + if (IS_ENABLED(CONFIG_MEASURE_DEVICETREE)) { + ret = tcg2_measure_data(dev, &elog, 0, images->ft_len, + (u8 *)images->ft_addr, + EV_TABLE_OF_DEVICES, + strlen("dts") + 1, + (u8 *)"dts"); + if (ret) + goto unmap_initrd; + } + + s = env_get("bootargs"); + if (!s) + s = ""; + ret = tcg2_measure_data(dev, &elog, 1, strlen(s) + 1, (u8 *)s, + EV_PLATFORM_CONFIG_FLAGS, + strlen(s) + 1, (u8 *)s); + +unmap_initrd: + unmap_sysmem(initrd_buf); + +unmap_image: + unmap_sysmem(image_buf); + tcg2_measurement_term(dev, &elog, ret != 0); + } + + return ret; +} + /** * Execute selected states of the bootm command. * @@ -724,6 +794,10 @@ int do_bootm_states(struct cmd_tbl *cmdtp, int flag, int argc, if (!ret && (states & BOOTM_STATE_FINDOTHER)) ret = bootm_find_other(cmdtp, flag, argc, argv); + if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !ret && + (states & BOOTM_STATE_MEASURE)) + bootm_measure(images); + /* Load the OS */ if (!ret && (states & BOOTM_STATE_LOADOS)) { iflag = bootm_disable_interrupts(); diff --git a/boot/bootmeth_cros.c b/boot/bootmeth_cros.c index 20e0b1e89c..cd72db8250 100644 --- a/boot/bootmeth_cros.c +++ b/boot/bootmeth_cros.c @@ -406,7 +406,7 @@ static int cros_read_file(struct udevice *dev, struct bootflow *bflow, return -ENOSYS; } -#if CONFIG_IS_ENABLED(BOOSTD_FULL) +#if CONFIG_IS_ENABLED(BOOTSTD_FULL) static int cros_read_all(struct udevice *dev, struct bootflow *bflow) { int ret; @@ -419,7 +419,7 @@ static int cros_read_all(struct udevice *dev, struct bootflow *bflow) return 0; } -#endif /* BOOSTD_FULL */ +#endif /* BOOTSTD_FULL */ static int cros_boot(struct udevice *dev, struct bootflow *bflow) { @@ -458,9 +458,9 @@ static struct bootmeth_ops cros_bootmeth_ops = { .read_bootflow = cros_read_bootflow, .read_file = cros_read_file, .boot = cros_boot, -#if CONFIG_IS_ENABLED(BOOSTD_FULL) +#if CONFIG_IS_ENABLED(BOOTSTD_FULL) .read_all = cros_read_all, -#endif /* BOOSTD_FULL */ +#endif /* BOOTSTD_FULL */ }; static const struct udevice_id cros_bootmeth_ids[] = { diff --git a/boot/bootmeth_efi_mgr.c b/boot/bootmeth_efi_mgr.c index e9d973429f..e6c42d41fb 100644 --- a/boot/bootmeth_efi_mgr.c +++ b/boot/bootmeth_efi_mgr.c @@ -14,6 +14,8 @@ #include <bootmeth.h> #include <command.h> #include <dm.h> +#include <efi_loader.h> +#include <efi_variable.h> /** * struct efi_mgr_priv - private info for the efi-mgr driver @@ -46,13 +48,26 @@ static int efi_mgr_check(struct udevice *dev, struct bootflow_iter *iter) static int efi_mgr_read_bootflow(struct udevice *dev, struct bootflow *bflow) { struct efi_mgr_priv *priv = dev_get_priv(dev); + efi_status_t ret; + efi_uintn_t size; + u16 *bootorder; if (priv->fake_dev) { bflow->state = BOOTFLOWST_READY; return 0; } - /* To be implemented */ + ret = efi_init_obj_list(); + if (ret) + return log_msg_ret("init", ret); + + /* Enable this method if the "BootOrder" UEFI exists. */ + bootorder = efi_get_var(u"BootOrder", &efi_global_variable_guid, + &size); + if (bootorder) { + bflow->state = BOOTFLOWST_READY; + return 0; + } return -EINVAL; } diff --git a/cmd/Kconfig b/cmd/Kconfig index 205df2f1fb..fd16c3a48e 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -246,7 +246,6 @@ config CMD_BOOTM_PRE_LOAD bool "enable pre-load on bootm" depends on CMD_BOOTM depends on IMAGE_PRE_LOAD - default n help Enable support of stage pre-load for the bootm command. This stage allow to check or modify the image provided @@ -1314,6 +1313,13 @@ config CMD_BKOPS_ENABLE on a eMMC device. The feature is optionally available on eMMC devices conforming to standard >= 4.41. +config CMD_MMC_REG + bool "Enable support for reading card registers in the mmc command" + depends on CMD_MMC + help + Enable the commands for reading card registers. This is useful + mostly for debugging or extracting details from the card. + config CMD_MMC_RPMB bool "Enable support for RPMB in the mmc command" depends on SUPPORT_EMMC_RPMB @@ -2360,7 +2366,6 @@ config CMD_VIDCONSOLE config CMD_SELECT_FONT bool "select font size" depends on VIDEO - default n help Enabling this will provide 'font' command. Allows font selection at runtime. @@ -2880,7 +2885,6 @@ config CMD_UBIFS config MMC_SPEED_MODE_SET bool "set speed mode using mmc command" depends on CMD_MMC - default n help Enable setting speed mode using mmc rescan and mmc dev commands. The speed mode is provided as the last argument in these commands diff --git a/cmd/booti.c b/cmd/booti.c index 1d531bdd06..a6c7db272c 100644 --- a/cmd/booti.c +++ b/cmd/booti.c @@ -127,6 +127,7 @@ int do_booti(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) #ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH BOOTM_STATE_RAMDISK | #endif + BOOTM_STATE_MEASURE | BOOTM_STATE_OS_PREP | BOOTM_STATE_OS_FAKE_GO | BOOTM_STATE_OS_GO, &images, 1); diff --git a/cmd/bootm.c b/cmd/bootm.c index 3e504ccfe8..6ded091dd5 100644 --- a/cmd/bootm.c +++ b/cmd/bootm.c @@ -147,6 +147,8 @@ int do_bootm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) BOOTM_STATE_OS_GO; if (IS_ENABLED(CONFIG_SYS_BOOT_RAMDISK_HIGH)) states |= BOOTM_STATE_RAMDISK; + if (IS_ENABLED(CONFIG_MEASURED_BOOT)) + states |= BOOTM_STATE_MEASURE; if (IS_ENABLED(CONFIG_PPC) || IS_ENABLED(CONFIG_MIPS)) states |= BOOTM_STATE_OS_CMDLINE; ret = do_bootm_states(cmdtp, flag, argc, argv, states, &images, 1); diff --git a/cmd/bootz.c b/cmd/bootz.c index 742889f21d..dd6fe4904b 100644 --- a/cmd/bootz.c +++ b/cmd/bootz.c @@ -81,6 +81,7 @@ int do_bootz(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) #ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH BOOTM_STATE_RAMDISK | #endif + BOOTM_STATE_MEASURE | BOOTM_STATE_OS_PREP | BOOTM_STATE_OS_FAKE_GO | BOOTM_STATE_OS_GO, &images, 1); @@ -1110,6 +1110,93 @@ static int do_mmc_boot_wp(struct cmd_tbl *cmdtp, int flag, return CMD_RET_SUCCESS; } +#if CONFIG_IS_ENABLED(CMD_MMC_REG) +static int do_mmc_reg(struct cmd_tbl *cmdtp, int flag, + int argc, char *const argv[]) +{ + ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); + struct mmc *mmc; + int i, ret; + u32 off; + + if (argc < 3 || argc > 5) + return CMD_RET_USAGE; + + mmc = find_mmc_device(curr_device); + if (!mmc) { + printf("no mmc device at slot %x\n", curr_device); + return CMD_RET_FAILURE; + } + + if (IS_SD(mmc)) { + printf("SD registers are not supported\n"); + return CMD_RET_FAILURE; + } + + off = simple_strtoul(argv[3], NULL, 10); + if (!strcmp(argv[2], "cid")) { + if (off > 3) + return CMD_RET_USAGE; + printf("CID[%i]: 0x%08x\n", off, mmc->cid[off]); + if (argv[4]) + env_set_hex(argv[4], mmc->cid[off]); + return CMD_RET_SUCCESS; + } + if (!strcmp(argv[2], "csd")) { + if (off > 3) + return CMD_RET_USAGE; + printf("CSD[%i]: 0x%08x\n", off, mmc->csd[off]); + if (argv[4]) + env_set_hex(argv[4], mmc->csd[off]); + return CMD_RET_SUCCESS; + } + if (!strcmp(argv[2], "dsr")) { + printf("DSR: 0x%08x\n", mmc->dsr); + if (argv[4]) + env_set_hex(argv[4], mmc->dsr); + return CMD_RET_SUCCESS; + } + if (!strcmp(argv[2], "ocr")) { + printf("OCR: 0x%08x\n", mmc->ocr); + if (argv[4]) + env_set_hex(argv[4], mmc->ocr); + return CMD_RET_SUCCESS; + } + if (!strcmp(argv[2], "rca")) { + printf("RCA: 0x%08x\n", mmc->rca); + if (argv[4]) + env_set_hex(argv[4], mmc->rca); + return CMD_RET_SUCCESS; + } + if (!strcmp(argv[2], "extcsd") && + mmc->version >= MMC_VERSION_4_41) { + ret = mmc_send_ext_csd(mmc, ext_csd); + if (ret) + return CMD_RET_FAILURE; + if (!strcmp(argv[3], "all")) { + /* Dump the entire register */ + printf("EXT_CSD:"); + for (i = 0; i < MMC_MAX_BLOCK_LEN; i++) { + if (!(i % 10)) + printf("\n%03i: ", i); + printf(" %02x", ext_csd[i]); + } + printf("\n"); + return CMD_RET_SUCCESS; + } + off = simple_strtoul(argv[3], NULL, 10); + if (off > 512) + return CMD_RET_USAGE; + printf("EXT_CSD[%i]: 0x%02x\n", off, ext_csd[off]); + if (argv[4]) + env_set_hex(argv[4], ext_csd[off]); + return CMD_RET_SUCCESS; + } + + return CMD_RET_FAILURE; +} +#endif + static struct cmd_tbl cmd_mmc[] = { U_BOOT_CMD_MKENT(info, 1, 0, do_mmcinfo, "", ""), U_BOOT_CMD_MKENT(read, 4, 1, do_mmc_read, "", ""), @@ -1142,6 +1229,9 @@ static struct cmd_tbl cmd_mmc[] = { U_BOOT_CMD_MKENT(bkops-enable, 2, 0, do_mmc_bkops_enable, "", ""), U_BOOT_CMD_MKENT(bkops, 4, 0, do_mmc_bkops, "", ""), #endif +#if CONFIG_IS_ENABLED(CMD_MMC_REG) + U_BOOT_CMD_MKENT(reg, 5, 0, do_mmc_reg, "", ""), +#endif }; static int do_mmcops(struct cmd_tbl *cmdtp, int flag, int argc, @@ -1230,6 +1320,12 @@ U_BOOT_CMD( "mmc bkops <dev> [auto|manual] [enable|disable]\n" " - configure background operations handshake on device\n" #endif +#if CONFIG_IS_ENABLED(CMD_MMC_REG) + "mmc reg read <reg> <offset> [env] - read card register <reg> offset <offset>\n" + " (optionally into [env] variable)\n" + " - reg: cid/csd/dsr/ocr/rca/extcsd\n" + " - offset: for cid/csd [0..3], for extcsd [0..511,all]\n" +#endif ); /* Old command kept for compatibility. Same as 'mmc info' */ diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c index ca24a5c1c4..744b1c20aa 100644 --- a/cmd/mvebu/bubt.c +++ b/cmd/mvebu/bubt.c @@ -240,9 +240,16 @@ static int mmc_burn_image(size_t image_size) #endif /* SD reserves LBA-0 for MBR and boots from LBA-1, - * MMC/eMMC boots from LBA-0 + * MMC/eMMC boots from LBA-0 and LBA-4096 */ - start_lba = IS_SD(mmc) ? 1 : 0; + if (IS_SD(mmc)) + start_lba = 1; +#ifdef CONFIG_SUPPORT_EMMC_BOOT + else if (part) + start_lba = 0; +#endif + else + start_lba = 4096; #ifdef CONFIG_BLK blk_count = image_size / mmc->write_bl_len; if (image_size % mmc->write_bl_len) diff --git a/common/Kconfig b/common/Kconfig index 43701fe9e8..0f54819519 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -28,26 +28,26 @@ config CONSOLE_RECORD_OUT_SIZE depends on CONSOLE_RECORD default 0x400 if CONSOLE_RECORD help - Set the size of the console output buffer. When this fills up, no - more data will be recorded until some is removed. The buffer is - allocated immediately after the malloc() region is ready. + Set the size of the console recording output buffer. When this fills + up, no more data will be recorded until some is removed. The buffer + is allocated immediately after the malloc() region is ready. config CONSOLE_RECORD_OUT_SIZE_F hex "Output buffer size before relocation" depends on CONSOLE_RECORD default 0x400 if CONSOLE_RECORD help - Set the size of the console output buffer before relocation. When - this fills up, no more data will be recorded until some is removed. - The buffer is allocated immediately after the early malloc() region is - ready. + Set the size of the console recording output buffer before + relocation. When this fills up, no more data will be recorded until + some is removed. The buffer is allocated immediately after the early + malloc() region is ready. config CONSOLE_RECORD_IN_SIZE hex "Input buffer size" depends on CONSOLE_RECORD default 0x100 if CONSOLE_RECORD help - Set the size of the console input buffer. When this contains data, + Set the size of the console recording input buffer. When this contains data, tstc() and getc() will use this in preference to real device input. The buffer is allocated immediately after the malloc() region is ready. diff --git a/configs/ad401_defconfig b/configs/ad401_defconfig index b9aca3ab0d..b44b9c63e8 100644 --- a/configs/ad401_defconfig +++ b/configs/ad401_defconfig @@ -51,6 +51,7 @@ CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_MESON_SPIFC_A1=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_GADGET=y diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig index 8c32b4b20d..6cfb5a7d32 100644 --- a/configs/arbel_evb_defconfig +++ b/configs/arbel_evb_defconfig @@ -58,6 +58,7 @@ CONFIG_MMC_SDHCI_NPCM=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHY_BROADCOM=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/bananapi-cm4-cm4io_defconfig b/configs/bananapi-cm4-cm4io_defconfig index bb43cc41e5..116147fc9a 100644 --- a/configs/bananapi-cm4-cm4io_defconfig +++ b/configs/bananapi-cm4-cm4io_defconfig @@ -17,12 +17,17 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -37,6 +42,7 @@ CONFIG_ADC=y CONFIG_SARADC_MESON=y CONFIG_BUTTON=y CONFIG_BUTTON_ADC=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_PHY_REALTEK=y CONFIG_DM_MDIO=y diff --git a/configs/bananapi-m2-pro_defconfig b/configs/bananapi-m2-pro_defconfig index 4f8cec9956..2a3958b0fd 100644 --- a/configs/bananapi-m2-pro_defconfig +++ b/configs/bananapi-m2-pro_defconfig @@ -16,12 +16,17 @@ CONFIG_IDENT_STRING="bpi-m2-pro" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -33,6 +38,7 @@ CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ADC=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_PHY_REALTEK=y CONFIG_DM_MDIO=y diff --git a/configs/bananapi-m2s_defconfig b/configs/bananapi-m2s_defconfig index 3dd8ddcdca..405ce3a93a 100644 --- a/configs/bananapi-m2s_defconfig +++ b/configs/bananapi-m2s_defconfig @@ -18,12 +18,17 @@ CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -36,6 +41,7 @@ CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ADC=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_PHY_REALTEK=y CONFIG_DM_MDIO=y diff --git a/configs/bananapi-m5_defconfig b/configs/bananapi-m5_defconfig index 696d2fcc5c..6de5d5fe7b 100644 --- a/configs/bananapi-m5_defconfig +++ b/configs/bananapi-m5_defconfig @@ -16,12 +16,17 @@ CONFIG_IDENT_STRING="bpi-m5" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -33,6 +38,7 @@ CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ADC=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_PHY_REALTEK=y CONFIG_DM_MDIO=y diff --git a/configs/beelink-gsking-x_defconfig b/configs/beelink-gsking-x_defconfig index c022097390..99e36e970a 100644 --- a/configs/beelink-gsking-x_defconfig +++ b/configs/beelink-gsking-x_defconfig @@ -17,12 +17,17 @@ CONFIG_IDENT_STRING=" beelink" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -32,6 +37,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/beelink-gt1-ultimate_defconfig b/configs/beelink-gt1-ultimate_defconfig index c0d22c4147..1313dde92f 100644 --- a/configs/beelink-gt1-ultimate_defconfig +++ b/configs/beelink-gt1-ultimate_defconfig @@ -16,6 +16,10 @@ CONFIG_IDENT_STRING=" beelink-gt1" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y @@ -23,6 +27,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -33,6 +38,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/beelink-gtking_defconfig b/configs/beelink-gtking_defconfig index 42e1ba6560..5c21d8eeab 100644 --- a/configs/beelink-gtking_defconfig +++ b/configs/beelink-gtking_defconfig @@ -17,12 +17,17 @@ CONFIG_IDENT_STRING=" beelink" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -32,6 +37,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/beelink-gtkingpro_defconfig b/configs/beelink-gtkingpro_defconfig index a3713326c1..37bb4cde79 100644 --- a/configs/beelink-gtkingpro_defconfig +++ b/configs/beelink-gtkingpro_defconfig @@ -17,12 +17,17 @@ CONFIG_IDENT_STRING=" beelink" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -32,6 +37,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig index 074936d575..3cd6aa0924 100644 --- a/configs/corstone1000_defconfig +++ b/configs/corstone1000_defconfig @@ -14,7 +14,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0 loglevel=9 ip=dhcp earlyprintk" -CONFIG_BOOTCOMMAND="echo Loading kernel from $kernel_addr to memory ... ; loadm $kernel_addr $kernel_addr_r 0xc00000; usb start; usb reset; run distro_bootcmd; bootefi $kernel_addr_r $fdtcontroladdr;" +CONFIG_BOOTCOMMAND="echo Loading kernel from $kernel_addr to memory ... ; unzip $kernel_addr 0x90000000; loadm 0x90000000 $kernel_addr_r $filesize; usb start; usb reset; run distro_bootcmd; bootefi $kernel_addr_r $fdtcontroladdr;" CONFIG_CONSOLE_RECORD=y CONFIG_LOGLEVEL=7 # CONFIG_DISPLAY_CPUINFO is not set @@ -55,6 +55,7 @@ CONFIG_DM_RTC=y CONFIG_RTC_EMULATION=y CONFIG_DM_SERIAL=y CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y CONFIG_TEE=y CONFIG_OPTEE=y CONFIG_USB=y diff --git a/configs/jethub_j100_defconfig b/configs/jethub_j100_defconfig index 549d5514f7..1e6d5c713b 100644 --- a/configs/jethub_j100_defconfig +++ b/configs/jethub_j100_defconfig @@ -18,6 +18,10 @@ CONFIG_IDENT_STRING=" jethubj100" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y @@ -26,6 +30,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_IMI is not set CONFIG_CMD_EEPROM=y CONFIG_CMD_ADC=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_RANDOM_UUID=y CONFIG_CMD_I2C=y @@ -39,6 +44,7 @@ CONFIG_PARTITION_TYPE_GUID=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MESON=y CONFIG_MMC_MESON_GX=y diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig index df9b8f3aed..b370e5d1d4 100644 --- a/configs/jethub_j80_defconfig +++ b/configs/jethub_j80_defconfig @@ -18,6 +18,10 @@ CONFIG_IDENT_STRING=" jethubj80" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_CPUINFO is not set @@ -27,6 +31,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_IMI is not set CONFIG_CMD_EEPROM=y CONFIG_CMD_ADC=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_RANDOM_UUID=y CONFIG_CMD_I2C=y @@ -40,6 +45,7 @@ CONFIG_PARTITION_TYPE_GUID=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MESON=y CONFIG_MMC_MESON_GX=y diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig index 38b9b2b71c..28e9052245 100644 --- a/configs/khadas-vim2_defconfig +++ b/configs/khadas-vim2_defconfig @@ -16,6 +16,10 @@ CONFIG_IDENT_STRING=" khadas-vim2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_CPUINFO is not set @@ -24,6 +28,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -36,6 +41,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/khadas-vim3_android_ab_defconfig b/configs/khadas-vim3_android_ab_defconfig index ccd6f6f8a0..b41c2660ff 100644 --- a/configs/khadas-vim3_android_ab_defconfig +++ b/configs/khadas-vim3_android_ab_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3" CONFIG_OF_LIBFDT_OVERLAY=y @@ -19,6 +20,10 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y @@ -45,7 +50,10 @@ CONFIG_CMD_AB_SELECT=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_AVB=y CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=2 +CONFIG_SYS_MMC_ENV_PART=2 CONFIG_ADC=y CONFIG_SARADC_MESON=y CONFIG_BUTTON=y diff --git a/configs/khadas-vim3_android_defconfig b/configs/khadas-vim3_android_defconfig index 5c3d565971..88197f5f5e 100644 --- a/configs/khadas-vim3_android_defconfig +++ b/configs/khadas-vim3_android_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3" CONFIG_OF_LIBFDT_OVERLAY=y @@ -19,6 +20,10 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y @@ -43,7 +48,10 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_AVB=y CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=2 +CONFIG_SYS_MMC_ENV_PART=2 CONFIG_ADC=y CONFIG_SARADC_MESON=y CONFIG_BUTTON=y diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig index d611124325..5df4b92143 100644 --- a/configs/khadas-vim3_defconfig +++ b/configs/khadas-vim3_defconfig @@ -18,12 +18,17 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set @@ -41,6 +46,7 @@ CONFIG_ADC=y CONFIG_SARADC_MESON=y CONFIG_BUTTON=y CONFIG_BUTTON_ADC=y +CONFIG_DFU_RAM=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MESON=y CONFIG_MMC_MESON_GX=y diff --git a/configs/khadas-vim3l_android_ab_defconfig b/configs/khadas-vim3l_android_ab_defconfig index 0d6de80013..3381d2e927 100644 --- a/configs/khadas-vim3l_android_ab_defconfig +++ b/configs/khadas-vim3l_android_ab_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l" CONFIG_OF_LIBFDT_OVERLAY=y @@ -19,6 +20,10 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y @@ -45,7 +50,10 @@ CONFIG_CMD_AB_SELECT=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_AVB=y CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=2 +CONFIG_SYS_MMC_ENV_PART=2 CONFIG_ADC=y CONFIG_SARADC_MESON=y CONFIG_BUTTON=y diff --git a/configs/khadas-vim3l_android_defconfig b/configs/khadas-vim3l_android_defconfig index 827752f243..3fa587ef1d 100644 --- a/configs/khadas-vim3l_android_defconfig +++ b/configs/khadas-vim3l_android_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l" CONFIG_OF_LIBFDT_OVERLAY=y @@ -19,6 +20,10 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y @@ -43,7 +48,10 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_AVB=y CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=2 +CONFIG_SYS_MMC_ENV_PART=2 CONFIG_ADC=y CONFIG_SARADC_MESON=y CONFIG_BUTTON=y diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig index f959d33689..de8fdd83cc 100644 --- a/configs/khadas-vim3l_defconfig +++ b/configs/khadas-vim3l_defconfig @@ -18,12 +18,17 @@ CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set @@ -41,6 +46,7 @@ CONFIG_ADC=y CONFIG_SARADC_MESON=y CONFIG_BUTTON=y CONFIG_BUTTON_ADC=y +CONFIG_DFU_RAM=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MESON=y CONFIG_MMC_MESON_GX=y diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig index 6a9e851616..d27ab6f590 100644 --- a/configs/khadas-vim_defconfig +++ b/configs/khadas-vim_defconfig @@ -16,6 +16,10 @@ CONFIG_IDENT_STRING=" khadas-vim" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_CPUINFO is not set @@ -24,6 +28,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -34,6 +39,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_PHY_MESON_GXL=y CONFIG_DM_MDIO=y diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig index 0fa7f3de79..bc17b423a2 100644 --- a/configs/libretech-ac_defconfig +++ b/configs/libretech-ac_defconfig @@ -19,6 +19,10 @@ CONFIG_IDENT_STRING=" libretech-ac" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set @@ -28,6 +32,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -41,6 +46,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig index dee03b3c5f..baa9b1b3db 100644 --- a/configs/libretech-cc_defconfig +++ b/configs/libretech-cc_defconfig @@ -16,6 +16,10 @@ CONFIG_IDENT_STRING=" libretech-cc" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y @@ -23,6 +27,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -33,6 +38,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_PHY_MESON_GXL=y CONFIG_DM_MDIO=y diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig index 628c6bab38..ba74b241ab 100644 --- a/configs/libretech-cc_v2_defconfig +++ b/configs/libretech-cc_v2_defconfig @@ -18,6 +18,10 @@ CONFIG_IDENT_STRING=" libretech-cc-v2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set @@ -26,6 +30,7 @@ CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -37,6 +42,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig index 1c8787c8ab..cd138d696e 100644 --- a/configs/libretech-s905d-pc_defconfig +++ b/configs/libretech-s905d-pc_defconfig @@ -19,6 +19,10 @@ CONFIG_IDENT_STRING=" libretech-s905d-pc" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set @@ -27,6 +31,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -39,6 +44,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig index 170492eb3f..dabb4ca4ec 100644 --- a/configs/libretech-s912-pc_defconfig +++ b/configs/libretech-s912-pc_defconfig @@ -18,6 +18,10 @@ CONFIG_IDENT_STRING=" libretech-s912-pc" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set @@ -26,6 +30,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -38,6 +43,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig index ef101cf430..41dbf7981f 100644 --- a/configs/nanopi-k2_defconfig +++ b/configs/nanopi-k2_defconfig @@ -15,6 +15,10 @@ CONFIG_IDENT_STRING=" nanopi-k2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index ff4895622c..038ef42e9d 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -19,7 +19,8 @@ CONFIG_DEBUG_UART_CLOCK=166666667 CONFIG_IDENT_STRING="\nZyXEL NSA310S/320S 1/2-Bay Power Media Server" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y -CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTSTD_FULL=y +CONFIG_BOOTSTD_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 9481cbc42b..5f9f323e06 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -15,6 +15,10 @@ CONFIG_IDENT_STRING=" odroid-c2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/odroid-c4_defconfig b/configs/odroid-c4_defconfig index 315dc5cadb..fe1f861258 100644 --- a/configs/odroid-c4_defconfig +++ b/configs/odroid-c4_defconfig @@ -17,12 +17,17 @@ CONFIG_IDENT_STRING=" odroid-c4/hc4" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -34,6 +39,7 @@ CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ADC=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_PHY_REALTEK=y CONFIG_DM_MDIO=y diff --git a/configs/odroid-go-ultra_defconfig b/configs/odroid-go-ultra_defconfig index fb8ce5ccad..bc0bf9b896 100644 --- a/configs/odroid-go-ultra_defconfig +++ b/configs/odroid-go-ultra_defconfig @@ -17,11 +17,16 @@ CONFIG_IDENT_STRING=" odroid-go-ultra" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -37,6 +42,7 @@ CONFIG_SARADC_MESON=y CONFIG_BUTTON=y CONFIG_BUTTON_ADC=y CONFIG_BUTTON_GPIO=y +CONFIG_DFU_RAM=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MESON=y CONFIG_MMC_MESON_GX=y diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig index b2507150c7..4316811588 100644 --- a/configs/odroid-hc4_defconfig +++ b/configs/odroid-hc4_defconfig @@ -19,12 +19,17 @@ CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -41,6 +46,7 @@ CONFIG_SARADC_MESON=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/odroid-n2_defconfig b/configs/odroid-n2_defconfig index e55de380a4..9694f04a66 100644 --- a/configs/odroid-n2_defconfig +++ b/configs/odroid-n2_defconfig @@ -17,12 +17,17 @@ CONFIG_IDENT_STRING=" odroid-n2/n2-plus" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -34,6 +39,7 @@ CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ADC=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_PHY_REALTEK=y CONFIG_DM_MDIO=y diff --git a/configs/odroid-n2l_defconfig b/configs/odroid-n2l_defconfig index 983ac883ec..673e0cffb2 100644 --- a/configs/odroid-n2l_defconfig +++ b/configs/odroid-n2l_defconfig @@ -17,12 +17,17 @@ CONFIG_IDENT_STRING=" odroid-n2l" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -34,6 +39,7 @@ CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ADC=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MESON_G12A_USB_PHY=y CONFIG_PINCTRL=y diff --git a/configs/p200_defconfig b/configs/p200_defconfig index 42e7eb855e..cd579ef5f1 100644 --- a/configs/p200_defconfig +++ b/configs/p200_defconfig @@ -15,6 +15,10 @@ CONFIG_IDENT_STRING=" p200" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/p201_defconfig b/configs/p201_defconfig index 5c983751d0..b2f0a0ccdb 100644 --- a/configs/p201_defconfig +++ b/configs/p201_defconfig @@ -16,6 +16,10 @@ CONFIG_IDENT_STRING=" p201" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/p212_defconfig b/configs/p212_defconfig index 2fcf3b30f4..b90391d9b5 100644 --- a/configs/p212_defconfig +++ b/configs/p212_defconfig @@ -16,6 +16,10 @@ CONFIG_IDENT_STRING=" p212" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig index 2747c3c72d..ff6411d894 100644 --- a/configs/pogo_v4_defconfig +++ b/configs/pogo_v4_defconfig @@ -17,7 +17,8 @@ CONFIG_IDENT_STRING="\nPogoplug V4" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_PCI=y CONFIG_LTO=y -CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTSTD_FULL=y +CONFIG_BOOTSTD_DEFAULTS=y CONFIG_BOOTSTAGE=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=10 diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index fbe84d5702..de7267e228 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -21,7 +21,6 @@ CONFIG_BOOTCOMMAND="test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $ # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y -CONFIG_SYS_PBSIZE=276 CONFIG_CMD_REGINFO=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 9ace68e73f..cf74a48ea2 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -12,8 +12,6 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 0c7389e2f9..aeef2f35b0 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -13,8 +13,6 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index e63d6fd934..db9c971c2f 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -19,8 +19,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SPL_SYS_MALLOC=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index 9a8bbef192..9fb40b22f9 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -12,8 +12,6 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 1d0f021ade..e3b123ca4d 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -15,8 +15,6 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};" CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index b048bb8aed..d6bf3130fe 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -18,8 +18,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SPL_SYS_MALLOC=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index f02e9125a6..2ff49fbd6a 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -46,7 +46,6 @@ CONFIG_SPL_NET=y CONFIG_SPL_PCI=y CONFIG_SPL_PCH=y CONFIG_SPL_RTC=y -CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 4b2787d4aa..246ac6b6b8 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -24,7 +24,6 @@ CONFIG_LOG=y CONFIG_LOGF_FUNC=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_PCI_INIT_R=y -CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index 5fdf496a45..c010c25a92 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -27,8 +27,6 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y -CONFIG_SYS_CBSIZE=512 -CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index 1347b86f34..9cc1f5f7c4 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -28,8 +28,6 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y -CONFIG_SYS_CBSIZE=512 -CONFIG_SYS_PBSIZE=532 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/radxa-zero2_defconfig b/configs/radxa-zero2_defconfig index b1aa3c27f8..e9415762ff 100644 --- a/configs/radxa-zero2_defconfig +++ b/configs/radxa-zero2_defconfig @@ -16,12 +16,17 @@ CONFIG_IDENT_STRING=" radxa-zero2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -32,6 +37,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/radxa-zero_defconfig b/configs/radxa-zero_defconfig index 23f30f6b11..103ff8a321 100644 --- a/configs/radxa-zero_defconfig +++ b/configs/radxa-zero_defconfig @@ -16,12 +16,17 @@ CONFIG_IDENT_STRING=" radxa-zero" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -32,6 +37,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/s400_defconfig b/configs/s400_defconfig index 9a7d520f90..8e22c95f88 100644 --- a/configs/s400_defconfig +++ b/configs/s400_defconfig @@ -16,12 +16,17 @@ CONFIG_IDENT_STRING=" s400" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -31,6 +36,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE_MESON8B=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index e3a2f9eb17..c8a4669050 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -14,6 +14,7 @@ CONFIG_FIT_RSASSA_PSS=y CONFIG_FIT_CIPHER=y CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_MEASURED_BOOT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig index 63e4ebe649..c4a49fbd6f 100644 --- a/configs/sei510_defconfig +++ b/configs/sei510_defconfig @@ -21,6 +21,10 @@ CONFIG_IDENT_STRING=" sei510" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run load_logo" @@ -34,6 +38,7 @@ CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y # CONFIG_CMD_IMI is not set CONFIG_CMD_BCB=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y # CONFIG_CMD_LOADS is not set @@ -49,6 +54,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_SYS_MMC_ENV_PART=1 +CONFIG_DFU_RAM=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x6000000 CONFIG_FASTBOOT_FLASH=y diff --git a/configs/sei610_defconfig b/configs/sei610_defconfig index ff7bcb330e..ae254c62f2 100644 --- a/configs/sei610_defconfig +++ b/configs/sei610_defconfig @@ -21,6 +21,10 @@ CONFIG_IDENT_STRING=" sei610" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run load_logo" @@ -34,6 +38,7 @@ CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y # CONFIG_CMD_IMI is not set CONFIG_CMD_BCB=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y # CONFIG_CMD_LOADS is not set @@ -49,6 +54,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_SYS_MMC_ENV_PART=1 +CONFIG_DFU_RAM=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x6000000 CONFIG_FASTBOOT_FLASH=y diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index e0ca6337bd..c9815b612f 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -52,9 +52,10 @@ CONFIG_CMD_HASH=y CONFIG_CMD_BTRFS=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y +CONFIG_OF_LIST="armada-3720-turris-mox armada-3720-ripe-atlas" CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_PART=2 CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_NETCONSOLE=y diff --git a/configs/u200_defconfig b/configs/u200_defconfig index a841a66363..21c90e7678 100644 --- a/configs/u200_defconfig +++ b/configs/u200_defconfig @@ -16,12 +16,17 @@ CONFIG_IDENT_STRING=" u200" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -31,6 +36,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_DM_MDIO=y CONFIG_DM_MDIO_MUX=y diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index bb20a2227f..eec1d964b9 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -79,6 +79,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_READ=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -108,6 +109,12 @@ CONFIG_BOOTCOUNT_ENV=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MP=y CONFIG_FSL_CAAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_GPIO_HOG=y CONFIG_SPL_GPIO_HOG=y CONFIG_MXC_GPIO=y @@ -138,6 +145,7 @@ CONFIG_DWC_ETH_QOS_IMX=y CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PHY_IMX8MQ_USB=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y @@ -160,14 +168,20 @@ CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y CONFIG_IMX_TMU=y CONFIG_USB=y +# CONFIG_SPL_DM_USB is not set +CONFIG_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y CONFIG_USB_EHCI_HCD=y -CONFIG_MXC_USB_OTG_HACTIVE=y +# CONFIG_USB_EHCI_MX7 is not set CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_IMX_WATCHDOG=y CONFIG_HEXDUMP=y diff --git a/configs/videostrong-kii-pro_defconfig b/configs/videostrong-kii-pro_defconfig index 4a2ff34385..3eda8f14a2 100644 --- a/configs/videostrong-kii-pro_defconfig +++ b/configs/videostrong-kii-pro_defconfig @@ -14,6 +14,10 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" kii-pro" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig index 324062e4fa..9bf3de9e7a 100644 --- a/configs/wetek-core2_defconfig +++ b/configs/wetek-core2_defconfig @@ -16,6 +16,10 @@ CONFIG_IDENT_STRING=" wetek-core2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y @@ -23,6 +27,7 @@ CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set CONFIG_CMD_ADC=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y @@ -33,6 +38,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SARADC_MESON=y +CONFIG_DFU_RAM=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/wetek-hub_defconfig b/configs/wetek-hub_defconfig index 4091a19713..fd92b041e7 100644 --- a/configs/wetek-hub_defconfig +++ b/configs/wetek-hub_defconfig @@ -14,6 +14,10 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" wetek-hub" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/wetek-play2_defconfig b/configs/wetek-play2_defconfig index 3ef4390900..b887419a6b 100644 --- a/configs/wetek-play2_defconfig +++ b/configs/wetek-play2_defconfig @@ -14,6 +14,10 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" wetek-play2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y diff --git a/doc/board/socionext/developerbox.rst b/doc/board/socionext/developerbox.rst index aa7080e26c..46712c379b 100644 --- a/doc/board/socionext/developerbox.rst +++ b/doc/board/socionext/developerbox.rst @@ -42,9 +42,10 @@ Compile from source You can build U-Boot without any additinal source code.:: cd u-boot + git checkout v2023.07 export ARCH=arm64 export CROSS_COMPILE=aarch64-linux-gnu- - make SynQuacer_defconfig + make synquacer_developerbox_defconfig make -j `noproc` Then, expand the binary to 1MB for preparing flash.:: @@ -211,8 +212,8 @@ can be installed via NOR flash writer. Once the flasher tool is running we are ready to flash the images.:: Write the FIP image to the Bank-0 & 1 at 6MB and 10MB offset.:: - flash rawwrite 600000 180000 - flash rawwrite a00000 180000 + flash rawwrite 600000 400000 + flash rawwrite a00000 400000 >> Send SPI_NOR_NEWFIP.fd via XMODEM (Control-A S in minicom) << flash rawwrite 500000 1000 diff --git a/doc/build/gcc.rst b/doc/build/gcc.rst index a0650a51db..23501dea37 100644 --- a/doc/build/gcc.rst +++ b/doc/build/gcc.rst @@ -60,8 +60,14 @@ For building U-Boot on Alpine Linux at least the following packages are needed: .. code-block:: bash - apk add alpine-sdk bc bison dtc flex linux-headers ncurses-dev \ - openssl-dev perl python3 py3-setuptools python3-dev sdl2-dev + apk add alpine-sdk bc bison dtc flex gnutls-dev linux-headers ncurses-dev \ + openssl-dev py3-elftools py3-setuptools python3-dev swig util-linux-dev + +Depending on the build target further packages may be needed: + +* sandbox with lcd: sdl2-dev +* riscv64 S-mode targests: opensbi +* some arm64 targets: arm-trusted-firmware Prerequisites ------------- diff --git a/doc/develop/driver-model/debugging.rst b/doc/develop/driver-model/debugging.rst index bbb2794340..e13abddae6 100644 --- a/doc/develop/driver-model/debugging.rst +++ b/doc/develop/driver-model/debugging.rst @@ -49,7 +49,7 @@ to see errors. Common ones are: of_to_plat() method in the driver. If there is no error, you should check if the device is actually bound. Call -dm_dump_all() just before you locate the device to make sure it exists. +dm_dump_tree() just before you locate the device to make sure it exists. If it does not exist, check your device tree compatible strings match up with what the driver expects (in the struct udevice_id array). diff --git a/doc/sphinx/requirements.txt b/doc/sphinx/requirements.txt index 6d45a3feff..39ececb96c 100644 --- a/doc/sphinx/requirements.txt +++ b/doc/sphinx/requirements.txt @@ -23,4 +23,4 @@ sphinxcontrib-htmlhelp==2.0.0 sphinxcontrib-jsmath==1.0.1 sphinxcontrib-qthelp==1.0.3 sphinxcontrib-serializinghtml==1.1.5 -urllib3==2.0.6 +urllib3==2.0.7 diff --git a/doc/usage/cmd/gpt.rst b/doc/usage/cmd/gpt.rst index f6115ecb0e..cbbe44ab58 100644 --- a/doc/usage/cmd/gpt.rst +++ b/doc/usage/cmd/gpt.rst @@ -156,6 +156,7 @@ read', 'gpt swap' and 'gpt rename', you must specify CONFIG_CMD_GPT_RENAME=y. Examples ~~~~~~~~ + Create 6 partitions on a disk:: => setenv gpt_parts 'uuid_disk=bec9fc2a-86c1-483d-8a0e-0109732277d7; @@ -192,10 +193,9 @@ Get the information about the partition named 'rootfs':: Get the list of partition names on the disk:: => gpt enumerate - => echo gpt_partition_list + => echo ${gpt_partition_list} boot rootfs system-data [ext] user modules ramdisk - Get the GUID for a disk:: => gpt guid mmc 0 @@ -209,6 +209,7 @@ Set the bootable flag for the 'boot' partition and clear it for all others:: => gpt set-bootable mmc 0 boot Swap the order of the 'boot' and 'rootfs' partition table entries:: + => gpt setenv mmc 0 rootfs => echo ${gpt_partition_entry} 2 diff --git a/doc/usage/cmd/mmc.rst b/doc/usage/cmd/mmc.rst index 71a0303109..c0924ba576 100644 --- a/doc/usage/cmd/mmc.rst +++ b/doc/usage/cmd/mmc.rst @@ -21,6 +21,7 @@ Synopsis mmc bootpart-resize <dev> <dev part size MB> <RPMB part size MB> mmc partconf <dev> [[varname] | [<boot_ack> <boot_partition> <partition_access>]] mmc rst-function <dev> <value> + mmc reg read <reg> <offset> [env] Description ----------- @@ -183,6 +184,31 @@ The 'mmc rst-function' command changes the RST_n_FUNCTION field. 0x3 Reserved +The 'mmc reg read <reg> <offset> [env]' reads eMMC card register and +either print it to standard output, or store the value in environment +variable. + +<reg> with +optional offset <offset> into the register array, and print it to +standard output or store it into environment variable [env]. + + reg + cid + The Device IDentification (CID) register. Uses offset. + csd + The Device-Specific Data (CSD) register. Uses offset. + dsr + The driver stage register (DSR). + ocr + The operation conditions register (OCR). + rca + The relative Device address (RCA) register. + extcsd + The Extended CSD register. Uses offset. + offset + For 'cid'/'csd' 128 bit registers '[0..3]' in 32-bit increments. For 'extcsd' 512 bit register '[0..512,all]' in 8-bit increments, or 'all' to read the entire register. + env + Optional environment variable into which 32-bit value read from register should be stored. Examples -------- diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 98b4719c40..d8e23fcacf 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -14,6 +14,7 @@ Use U-Boot partitions cmdline semihosting + measured_boot Shell commands -------------- @@ -37,8 +38,8 @@ Shell commands cmd/bootm cmd/bootmenu cmd/bootmeth - cmd/button cmd/bootz + cmd/button cmd/cat cmd/cbsysinfo cmd/cedit @@ -56,8 +57,8 @@ Shell commands cmd/env cmd/event cmd/exception - cmd/extension cmd/exit + cmd/extension cmd/false cmd/fatinfo cmd/fatload @@ -93,15 +94,15 @@ Shell commands cmd/rng cmd/saves cmd/sbi - cmd/sf cmd/scp03 cmd/seama cmd/setexpr + cmd/sf cmd/size cmd/sleep + cmd/sm cmd/sound cmd/source - cmd/sm cmd/temperature cmd/tftpput cmd/trace diff --git a/doc/usage/measured_boot.rst b/doc/usage/measured_boot.rst new file mode 100644 index 0000000000..0aad590859 --- /dev/null +++ b/doc/usage/measured_boot.rst @@ -0,0 +1,31 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Measured Boot +===================== + +U-Boot can perform a measured boot, the process of hashing various components +of the boot process, extending the results in the TPM and logging the +component's measurement in memory for the operating system to consume. + +By default, U-Boot will measure the operating system (linux) image, the +initrd image, and the "bootargs" environment variable. By enabling +CONFIG_MEASURE_DEVICETREE, U-Boot will also measure the devicetree image. + +The operating system typically would verify that the hashes found in the +TPM PCRs match the contents of the event log. This can further be checked +against the hash results of previous boots. + +Requirements +--------------------- + +* A hardware TPM 2.0 supported by the U-Boot drivers +* CONFIG_TPM=y +* CONFIG_MEASURED_BOOT=y +* Device-tree configuration of the TPM device to specify the memory area + for event logging. The TPM device node must either contain a phandle to + a reserved memory region or "linux,sml-base" and "linux,sml-size" + indicating the address and size of the memory region. An example can be + found in arch/sandbox/dts/test.dts +* The operating system must also be configured to use the memory regions + specified in the U-Boot device-tree in order to make use of the event + log. diff --git a/drivers/clk/ti/clk-k3-pll.c b/drivers/clk/ti/clk-k3-pll.c index bf762c558e..c1158c1329 100644 --- a/drivers/clk/ti/clk-k3-pll.c +++ b/drivers/clk/ti/clk-k3-pll.c @@ -25,6 +25,23 @@ #define PLL_16FFT_FREQ_CTRL0 0x30 #define PLL_16FFT_FREQ_CTRL1 0x34 #define PLL_16FFT_DIV_CTRL 0x38 +#define PLL_16FFT_CAL_CTRL 0x60 +#define PLL_16FFT_CAL_STAT 0x64 + +/* CAL STAT register bits */ +#define PLL_16FFT_CAL_STAT_CAL_LOCK BIT(31) + +/* CFG register bits */ +#define PLL_16FFT_CFG_PLL_TYPE_SHIFT (0) +#define PLL_16FFT_CFG_PLL_TYPE_MASK (0x3 << 0) +#define PLL_16FFT_CFG_PLL_TYPE_FRACF 1 + +/* CAL CTRL register bits */ +#define PLL_16FFT_CAL_CTRL_CAL_EN BIT(31) +#define PLL_16FFT_CAL_CTRL_FAST_CAL BIT(20) +#define PLL_16FFT_CAL_CTRL_CAL_BYP BIT(15) +#define PLL_16FFT_CAL_CTRL_CAL_CNT_SHIFT 16 +#define PLL_16FFT_CAL_CTRL_CAL_CNT_MASK (0x7 << 16) /* CTRL register bits */ #define PLL_16FFT_CTRL_BYPASS_EN BIT(31) @@ -40,9 +57,14 @@ /* DIV CTRL register bits */ #define PLL_16FFT_DIV_CTRL_REF_DIV_MASK 0x3f -#define PLL_16FFT_FREQ_CTRL1_FB_DIV_FRAC_BITS 24 +/* HSDIV register bits*/ #define PLL_16FFT_HSDIV_CTRL_CLKOUT_EN BIT(15) +/* FREQ_CTRL1 bits */ +#define PLL_16FFT_FREQ_CTRL1_FB_DIV_FRAC_BITS 24 +#define PLL_16FFT_FREQ_CTRL1_FB_DIV_FRAC_MASK 0xffffff +#define PLL_16FFT_FREQ_CTRL1_FB_DIV_FRAC_SHIFT 0 + /* KICK register magic values */ #define PLL_KICK0_VALUE 0x68ef3490 #define PLL_KICK1_VALUE 0xd172bc5a @@ -63,18 +85,65 @@ static int ti_pll_wait_for_lock(struct clk *clk) { struct ti_pll_clk *pll = to_clk_pll(clk); u32 stat; + u32 cfg; + u32 cal; + u32 freq_ctrl1; int i; + u32 pllfm; + u32 pll_type; + int success; for (i = 0; i < 100000; i++) { stat = readl(pll->reg + PLL_16FFT_STAT); - if (stat & PLL_16FFT_STAT_LOCK) - return 0; + if (stat & PLL_16FFT_STAT_LOCK) { + success = 1; + break; + } } - printf("%s: pll (%s) failed to lock\n", __func__, - clk->dev->name); + /* Enable calibration if not in fractional mode of the FRACF PLL */ + freq_ctrl1 = readl(pll->reg + PLL_16FFT_FREQ_CTRL1); + pllfm = freq_ctrl1 & PLL_16FFT_FREQ_CTRL1_FB_DIV_FRAC_MASK; + pllfm >>= PLL_16FFT_FREQ_CTRL1_FB_DIV_FRAC_SHIFT; + cfg = readl(pll->reg + PLL_16FFT_CFG); + pll_type = (cfg & PLL_16FFT_CFG_PLL_TYPE_MASK) >> PLL_16FFT_CFG_PLL_TYPE_SHIFT; + + if (success && pll_type == PLL_16FFT_CFG_PLL_TYPE_FRACF && pllfm == 0) { + cal = readl(pll->reg + PLL_16FFT_CAL_CTRL); - return -EBUSY; + /* Enable calibration for FRACF */ + cal |= PLL_16FFT_CAL_CTRL_CAL_EN; + + /* Enable fast cal mode */ + cal |= PLL_16FFT_CAL_CTRL_FAST_CAL; + + /* Disable calibration bypass */ + cal &= ~PLL_16FFT_CAL_CTRL_CAL_BYP; + + /* Set CALCNT to 2 */ + cal &= ~PLL_16FFT_CAL_CTRL_CAL_CNT_MASK; + cal |= 2 << PLL_16FFT_CAL_CTRL_CAL_CNT_SHIFT; + + /* Note this register does not readback the written value. */ + writel(cal, pll->reg + PLL_16FFT_CAL_CTRL); + + success = 0; + for (i = 0; i < 100000; i++) { + stat = readl(pll->reg + PLL_16FFT_CAL_STAT); + if (stat & PLL_16FFT_CAL_STAT_CAL_LOCK) { + success = 1; + break; + } + } + } + + if (success == 0) { + printf("%s: pll (%s) failed to lock\n", __func__, + clk->dev->name); + return -EBUSY; + } else { + return 0; + } } static ulong ti_pll_clk_get_rate(struct clk *clk) diff --git a/drivers/crypto/fsl/Kconfig b/drivers/crypto/fsl/Kconfig index 91a51cc5fe..eaad19633f 100644 --- a/drivers/crypto/fsl/Kconfig +++ b/drivers/crypto/fsl/Kconfig @@ -77,7 +77,6 @@ endif config FSL_DCP_RNG bool "Enable Random Number Generator support" depends on DM_RNG - default n help Enable support for the hardware based random number generator module of the DCP. It uses the True Random Number Generator (TRNG) diff --git a/drivers/firmware/arm-ffa/arm-ffa-uclass.c b/drivers/firmware/arm-ffa/arm-ffa-uclass.c index 8c17b19eaf..f1e91d151e 100644 --- a/drivers/firmware/arm-ffa/arm-ffa-uclass.c +++ b/drivers/firmware/arm-ffa/arm-ffa-uclass.c @@ -144,8 +144,6 @@ static int ffa_print_error_log(u32 ffa_id, int ffa_errno) return -EINVAL; abi_idx = FFA_ID_TO_ERRMAP_ID(ffa_id); - if (abi_idx < 0 || abi_idx >= FFA_ERRMAP_COUNT) - return -EINVAL; if (!err_msg_map[abi_idx].err_str[err_idx]) return -EINVAL; diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index 22cb9d637c..d10edd2774 100644 --- a/drivers/memory/Kconfig +++ b/drivers/memory/Kconfig @@ -61,7 +61,6 @@ config TI_GPMC if TI_GPMC config TI_GPMC_DEBUG bool "Debug Texas Instruments GPMC timings" - default n help Enable this to print GPMC timings before and after the GPMC registers are programmed. This should not be left enabled on production systems. diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index fccd9b89b8..97057de8bf 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -375,7 +375,6 @@ config SPL_MXC_OCOTP config NPCM_OTP bool "Nnvoton NPCM BMC On-Chip OTP Memory Support" depends on (ARM && ARCH_NPCM) - default n help Support NPCM BMC OTP memory (fuse). To compile this driver as a module, choose M here: the module diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c index e1d0b8f918..9111bd724c 100644 --- a/drivers/misc/i2c_eeprom.c +++ b/drivers/misc/i2c_eeprom.c @@ -60,6 +60,17 @@ static int i2c_eeprom_std_read(struct udevice *dev, int offset, uint8_t *buf, return dm_i2c_read(dev, offset, buf, size); } +static int i2c_eeprom_len(int offset, int len, int pagesize) +{ + int page_offset = offset & (pagesize - 1); + int maxlen = pagesize - page_offset; + + if (len > maxlen) + len = maxlen; + + return len; +} + static int i2c_eeprom_std_write(struct udevice *dev, int offset, const uint8_t *buf, int size) { @@ -67,7 +78,7 @@ static int i2c_eeprom_std_write(struct udevice *dev, int offset, int ret; while (size > 0) { - int write_size = min_t(int, size, priv->pagesize); + int write_size = i2c_eeprom_len(offset, size, priv->pagesize); ret = dm_i2c_write(dev, offset, buf, write_size); if (ret) diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c index acfc731845..9a088244dd 100644 --- a/drivers/misc/k3_avs.c +++ b/drivers/misc/k3_avs.c @@ -15,6 +15,7 @@ #include <k3-avs.h> #include <dm/device_compat.h> #include <linux/bitops.h> +#include <linux/delay.h> #include <power/regulator.h> #define AM6_VTM_DEVINFO(i) (priv->base + 0x100 + 0x20 * (i)) @@ -25,11 +26,28 @@ #define AM6_VTM_OPP_SHIFT(opp) (8 * (opp)) #define AM6_VTM_OPP_MASK 0xff +#define K3_VTM_DEVINFO_PWR0_OFFSET 0x4 +#define K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK 0xf0 +#define K3_VTM_TMPSENS0_CTRL_OFFSET 0x300 +#define K3_VTM_TMPSENS_STAT_OFFSET 0x8 +#define K3_VTM_ANYMAXT_OUTRG_ALERT_EN 0x1 +#define K3_VTM_LOW_TEMP_OFFSET 0x10 +#define K3_VTM_MISC_CTRL2_OFFSET 0x10 +#define K3_VTM_MISC_CTRL1_OFFSET 0xc +#define K3_VTM_TMPSENS_CTRL1_SOC BIT(5) +#define K3_VTM_TMPSENS_CTRL_CLRZ BIT(6) +#define K3_VTM_TMPSENS_CTRL_MAXT_OUTRG_EN BIT(11) +#define K3_VTM_ADC_COUNT_FOR_123C 0x2f8 +#define K3_VTM_ADC_COUNT_FOR_105C 0x288 +#define K3_VTM_ADC_WA_VALUE 0x2c +#define K3_VTM_FUSE_MASK 0xc0000000 + #define VD_FLAG_INIT_DONE BIT(0) struct k3_avs_privdata { void *base; struct vd_config *vd_config; + struct udevice *dev; }; struct opp { @@ -237,6 +255,88 @@ static int k3_avs_configure(struct udevice *dev, struct k3_avs_privdata *priv) return 0; } +/* k3_avs_program_tshut : Program thermal shutdown value for SOC + * set the values corresponding to thresholds to ~123C and 105C + * This is optional feature, Few times OS driver takes care of + * tshut programing. + */ + +static void k3_avs_program_tshut(struct k3_avs_privdata *priv) +{ + int cnt, id, val; + int workaround_needed = 0; + u32 ctrl_offset; + void __iomem *cfg2_base; + void __iomem *fuse_base; + + cfg2_base = (void __iomem *)devfdt_get_addr_index(priv->dev, 1); + if (IS_ERR(cfg2_base)) { + dev_err(priv->dev, "cfg base is not defined\n"); + return; + } + + /* + * Some of TI's J721E SoCs require a software trimming procedure + * for the temperature monitors to function properly. To determine + * if this particular SoC is NOT affected, both bits in the + * WKUP_SPARE_FUSE0[31:30] will be set (0xC0000000) indicating + * when software trimming should NOT be applied. + * + * https://www.ti.com/lit/er/sprz455c/sprz455c.pdf + * This routine checks if workaround_needed to be applied or not + * based upon workaround_needed, adjust fixed value of tshut high and low + */ + + if (device_is_compatible(priv->dev, "ti,j721e-vtm")) { + fuse_base = (void __iomem *)devfdt_get_addr_index(priv->dev, 2); + if (IS_ERR(fuse_base)) { + dev_err(priv->dev, "fuse-base is not defined for J721E Soc\n"); + return; + } + + if (!((readl(fuse_base) & K3_VTM_FUSE_MASK) == K3_VTM_FUSE_MASK)) + workaround_needed = 1; + } + + dev_dbg(priv->dev, "Work around %sneeded\n", workaround_needed ? "" : "not "); + + /* Get the sensor count in the VTM */ + val = readl(priv->base + K3_VTM_DEVINFO_PWR0_OFFSET); + cnt = val & K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK; + cnt >>= __ffs(K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK); + + /* Program the thermal sensors */ + for (id = 0; id < cnt; id++) { + ctrl_offset = K3_VTM_TMPSENS0_CTRL_OFFSET + id * 0x20; + + val = readl(cfg2_base + ctrl_offset); + val |= (K3_VTM_TMPSENS_CTRL_MAXT_OUTRG_EN | + K3_VTM_TMPSENS_CTRL1_SOC | + K3_VTM_TMPSENS_CTRL_CLRZ | BIT(4)); + writel(val, cfg2_base + ctrl_offset); + } + + /* + * Program TSHUT thresholds + * Step 1: set the thresholds to ~123C and 105C WKUP_VTM_MISC_CTRL2 + * Step 2: WKUP_VTM_TMPSENS_CTRL_j set the MAXT_OUTRG_EN bit + * This is already taken care as per of init + * Step 3: WKUP_VTM_MISC_CTRL set the ANYMAXT_OUTRG_ALERT_EN bit + */ + + /* Low thresholds for tshut*/ + val = (K3_VTM_ADC_COUNT_FOR_105C - workaround_needed * K3_VTM_ADC_WA_VALUE) + << K3_VTM_LOW_TEMP_OFFSET; + /* high thresholds */ + val |= K3_VTM_ADC_COUNT_FOR_123C - workaround_needed * K3_VTM_ADC_WA_VALUE; + + writel(val, cfg2_base + K3_VTM_MISC_CTRL2_OFFSET); + /* ramp-up delay from Linux code */ + mdelay(100); + val = readl(cfg2_base + K3_VTM_MISC_CTRL1_OFFSET) | K3_VTM_ANYMAXT_OUTRG_ALERT_EN; + writel(val, cfg2_base + K3_VTM_MISC_CTRL1_OFFSET); +} + /** * k3_avs_probe: parses VD info from VTM, and re-configures the OPP data * @@ -255,6 +355,7 @@ static int k3_avs_probe(struct udevice *dev) int ret; priv = dev_get_priv(dev); + priv->dev = dev; k3_avs_priv = priv; @@ -294,6 +395,9 @@ static int k3_avs_probe(struct udevice *dev) k3_avs_program_voltage(priv, vd, vd->opp); } + if (!device_is_compatible(priv->dev, "ti,am654-avs")) + k3_avs_program_tshut(priv); + return 0; } diff --git a/drivers/misc/vexpress_config.c b/drivers/misc/vexpress_config.c index 2baca48109..99aad1412a 100644 --- a/drivers/misc/vexpress_config.c +++ b/drivers/misc/vexpress_config.c @@ -92,7 +92,7 @@ static struct misc_ops vexpress_config_ops = { static int vexpress_config_probe(struct udevice *dev) { struct ofnode_phandle_args args; - struct vexpress_config_sysreg *priv; + struct vexpress_config_sysreg *priv = dev_get_priv(dev); const char *prop; int err, prop_size; @@ -105,11 +105,9 @@ static int vexpress_config_probe(struct udevice *dev) if (!prop || (strncmp(prop, "arm,vexpress-sysreg", 19) != 0)) return -ENOENT; - priv = calloc(1, sizeof(*priv)); if (!priv) return -ENOMEM; - dev_get_uclass_priv(dev) = priv; priv->addr = ofnode_get_addr(args.node); return dev_read_u32(dev, "arm,vexpress,site", &priv->site); @@ -127,4 +125,5 @@ U_BOOT_DRIVER(vexpress_config_drv) = { .bind = dm_scan_fdt_dev, .probe = vexpress_config_probe, .ops = &vexpress_config_ops, + .priv_auto = sizeof(struct vexpress_config_sysreg), }; diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index de01b9687b..17618c3bdc 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -46,6 +46,7 @@ config SPL_DM_MMC depends on SPL_DM && DM_MMC default n if ARCH_MVEBU && !MVEBU_SPL_BOOT_DEVICE_MMC default y + select SPL_BLK help This enables the MultiMediaCard (MMC) uclass which supports MMC and Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.) @@ -390,12 +391,6 @@ config HSMMC2_8BIT depends on MMC_OMAP_HS && (OMAP44XX || OMAP54XX || DRA7XX || AM33XX || \ AM43XX || ARCH_KEYSTONE) -config SH_SDHI - bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support" - depends on ARCH_RMOBILE - help - Support for the on-chip SDHI host controller on SuperH/Renesas ARM SoCs platform - config SH_MMCIF bool "SuperH/Renesas ARM SoCs on-chip MMCIF host controller support" depends on ARCH_RMOBILE || SH diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 2c65c4765a..e9cf1fcc64 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -49,7 +49,6 @@ obj-$(CONFIG_MMC_PCI) += pci_mmc.o obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o -obj-$(CONFIG_SH_SDHI) += sh_sdhi.o obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o obj-$(CONFIG_JZ47XX_MMC) += jz_mmc.o obj-$(CONFIG_NEXELL_DWMMC) += nexell_dw_mmc.o diff --git a/drivers/mmc/pci_mmc.c b/drivers/mmc/pci_mmc.c index 9fb7044029..4d163ccba0 100644 --- a/drivers/mmc/pci_mmc.c +++ b/drivers/mmc/pci_mmc.c @@ -50,8 +50,8 @@ static int pci_mmc_probe(struct udevice *dev) desc = mmc_get_blk_desc(&plat->mmc); desc->removable = !(plat->cfg.host_caps & MMC_CAP_NONREMOVABLE); - host->ioaddr = (void *)dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, 0, 0, PCI_REGION_TYPE, - PCI_REGION_MEM); + host->ioaddr = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, 0, 0, + PCI_REGION_TYPE, PCI_REGION_MEM); host->name = dev->name; host->cd_gpio = priv->cd_gpio; host->mmc = &plat->mmc; diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 1ea6e1066f..865efdd321 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -998,7 +998,7 @@ static int rzg2l_sdhi_setup(struct udevice *dev) ret = reset_get_by_index(dev, 0, &rst); if (ret < 0) { dev_err(dev, "failed to get reset line\n"); - goto err_reset; + goto err_get_reset; } ret = reset_deassert(&rst); @@ -1016,6 +1016,8 @@ static int rzg2l_sdhi_setup(struct udevice *dev) err_tmio_probe: reset_assert(&rst); err_reset: + reset_free(&rst); +err_get_reset: clk_disable(&aclk); err_aclk: clk_disable(&imclk2); diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index fc9c6c3799..0178ed8a11 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -306,14 +306,19 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, if (stat & SDHCI_INT_ERROR) break; - if (get_timer(start) >= SDHCI_READ_STATUS_TIMEOUT) { - if (host->quirks & SDHCI_QUIRK_BROKEN_R1B) { + if (host->quirks & SDHCI_QUIRK_BROKEN_R1B && + cmd->resp_type & MMC_RSP_BUSY && !data) { + unsigned int state = + sdhci_readl(host, SDHCI_PRESENT_STATE); + + if (!(state & SDHCI_DAT_ACTIVE)) return 0; - } else { - printf("%s: Timeout for status update!\n", - __func__); - return -ETIMEDOUT; - } + } + + if (get_timer(start) >= SDHCI_READ_STATUS_TIMEOUT) { + printf("%s: Timeout for status update: %08x %08x\n", + __func__, stat, mask); + return -ETIMEDOUT; } } while ((stat & mask) != mask); diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c deleted file mode 100644 index 3ce7cbf71f..0000000000 --- a/drivers/mmc/sh_sdhi.c +++ /dev/null @@ -1,910 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * drivers/mmc/sh_sdhi.c - * - * SD/MMC driver for Renesas rmobile ARM SoCs. - * - * Copyright (C) 2011,2013-2017 Renesas Electronics Corporation - * Copyright (C) 2014 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> - * Copyright (C) 2008-2009 Renesas Solutions Corp. - */ - -#include <common.h> -#include <log.h> -#include <malloc.h> -#include <mmc.h> -#include <dm.h> -#include <part.h> -#include <dm/device_compat.h> -#include <linux/bitops.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <linux/compat.h> -#include <linux/io.h> -#include <linux/sizes.h> -#include <asm/arch/rmobile.h> -#include <asm/arch/sh_sdhi.h> -#include <asm/global_data.h> -#include <clk.h> - -#define DRIVER_NAME "sh-sdhi" - -struct sh_sdhi_host { - void __iomem *addr; - int ch; - int bus_shift; - unsigned long quirks; - unsigned char wait_int; - unsigned char sd_error; - unsigned char detect_waiting; - unsigned char app_cmd; -}; - -static inline void sh_sdhi_writeq(struct sh_sdhi_host *host, int reg, u64 val) -{ - writeq(val, host->addr + (reg << host->bus_shift)); -} - -static inline u64 sh_sdhi_readq(struct sh_sdhi_host *host, int reg) -{ - return readq(host->addr + (reg << host->bus_shift)); -} - -static inline void sh_sdhi_writew(struct sh_sdhi_host *host, int reg, u16 val) -{ - writew(val, host->addr + (reg << host->bus_shift)); -} - -static inline u16 sh_sdhi_readw(struct sh_sdhi_host *host, int reg) -{ - return readw(host->addr + (reg << host->bus_shift)); -} - -static void sh_sdhi_detect(struct sh_sdhi_host *host) -{ - sh_sdhi_writew(host, SDHI_OPTION, - OPT_BUS_WIDTH_1 | sh_sdhi_readw(host, SDHI_OPTION)); - - host->detect_waiting = 0; -} - -static int sh_sdhi_intr(void *dev_id) -{ - struct sh_sdhi_host *host = dev_id; - int state1 = 0, state2 = 0; - - state1 = sh_sdhi_readw(host, SDHI_INFO1); - state2 = sh_sdhi_readw(host, SDHI_INFO2); - - debug("%s: state1 = %x, state2 = %x\n", __func__, state1, state2); - - /* CARD Insert */ - if (state1 & INFO1_CARD_IN) { - sh_sdhi_writew(host, SDHI_INFO1, ~INFO1_CARD_IN); - if (!host->detect_waiting) { - host->detect_waiting = 1; - sh_sdhi_detect(host); - } - sh_sdhi_writew(host, SDHI_INFO1_MASK, INFO1M_RESP_END | - INFO1M_ACCESS_END | INFO1M_CARD_IN | - INFO1M_DATA3_CARD_RE | INFO1M_DATA3_CARD_IN); - return -EAGAIN; - } - /* CARD Removal */ - if (state1 & INFO1_CARD_RE) { - sh_sdhi_writew(host, SDHI_INFO1, ~INFO1_CARD_RE); - if (!host->detect_waiting) { - host->detect_waiting = 1; - sh_sdhi_detect(host); - } - sh_sdhi_writew(host, SDHI_INFO1_MASK, INFO1M_RESP_END | - INFO1M_ACCESS_END | INFO1M_CARD_RE | - INFO1M_DATA3_CARD_RE | INFO1M_DATA3_CARD_IN); - sh_sdhi_writew(host, SDHI_SDIO_INFO1_MASK, SDIO_INFO1M_ON); - sh_sdhi_writew(host, SDHI_SDIO_MODE, SDIO_MODE_OFF); - return -EAGAIN; - } - - if (state2 & INFO2_ALL_ERR) { - sh_sdhi_writew(host, SDHI_INFO2, - (unsigned short)~(INFO2_ALL_ERR)); - sh_sdhi_writew(host, SDHI_INFO2_MASK, - INFO2M_ALL_ERR | - sh_sdhi_readw(host, SDHI_INFO2_MASK)); - host->sd_error = 1; - host->wait_int = 1; - return 0; - } - /* Respons End */ - if (state1 & INFO1_RESP_END) { - sh_sdhi_writew(host, SDHI_INFO1, ~INFO1_RESP_END); - sh_sdhi_writew(host, SDHI_INFO1_MASK, - INFO1M_RESP_END | - sh_sdhi_readw(host, SDHI_INFO1_MASK)); - host->wait_int = 1; - return 0; - } - /* SD_BUF Read Enable */ - if (state2 & INFO2_BRE_ENABLE) { - sh_sdhi_writew(host, SDHI_INFO2, ~INFO2_BRE_ENABLE); - sh_sdhi_writew(host, SDHI_INFO2_MASK, - INFO2M_BRE_ENABLE | INFO2M_BUF_ILL_READ | - sh_sdhi_readw(host, SDHI_INFO2_MASK)); - host->wait_int = 1; - return 0; - } - /* SD_BUF Write Enable */ - if (state2 & INFO2_BWE_ENABLE) { - sh_sdhi_writew(host, SDHI_INFO2, ~INFO2_BWE_ENABLE); - sh_sdhi_writew(host, SDHI_INFO2_MASK, - INFO2_BWE_ENABLE | INFO2M_BUF_ILL_WRITE | - sh_sdhi_readw(host, SDHI_INFO2_MASK)); - host->wait_int = 1; - return 0; - } - /* Access End */ - if (state1 & INFO1_ACCESS_END) { - sh_sdhi_writew(host, SDHI_INFO1, ~INFO1_ACCESS_END); - sh_sdhi_writew(host, SDHI_INFO1_MASK, - INFO1_ACCESS_END | - sh_sdhi_readw(host, SDHI_INFO1_MASK)); - host->wait_int = 1; - return 0; - } - return -EAGAIN; -} - -static int sh_sdhi_wait_interrupt_flag(struct sh_sdhi_host *host) -{ - int timeout = 10000000; - - while (1) { - timeout--; - if (timeout < 0) { - debug(DRIVER_NAME": %s timeout\n", __func__); - return 0; - } - - if (!sh_sdhi_intr(host)) - break; - - udelay(1); /* 1 usec */ - } - - return 1; /* Return value: NOT 0 = complete waiting */ -} - -static int sh_sdhi_clock_control(struct sh_sdhi_host *host, unsigned long clk) -{ - u32 clkdiv, i, timeout; - - if (sh_sdhi_readw(host, SDHI_INFO2) & (1 << 14)) { - printf(DRIVER_NAME": Busy state ! Cannot change the clock\n"); - return -EBUSY; - } - - sh_sdhi_writew(host, SDHI_CLK_CTRL, - ~CLK_ENABLE & sh_sdhi_readw(host, SDHI_CLK_CTRL)); - - if (clk == 0) - return -EIO; - - clkdiv = 0x80; - i = CONFIG_SH_SDHI_FREQ >> (0x8 + 1); - for (; clkdiv && clk >= (i << 1); (clkdiv >>= 1)) - i <<= 1; - - sh_sdhi_writew(host, SDHI_CLK_CTRL, clkdiv); - - timeout = 100000; - /* Waiting for SD Bus busy to be cleared */ - while (timeout--) { - if ((sh_sdhi_readw(host, SDHI_INFO2) & 0x2000)) - break; - } - - if (timeout) - sh_sdhi_writew(host, SDHI_CLK_CTRL, - CLK_ENABLE | sh_sdhi_readw(host, SDHI_CLK_CTRL)); - else - return -EBUSY; - - return 0; -} - -static int sh_sdhi_sync_reset(struct sh_sdhi_host *host) -{ - u32 timeout; - sh_sdhi_writew(host, SDHI_SOFT_RST, SOFT_RST_ON); - sh_sdhi_writew(host, SDHI_SOFT_RST, SOFT_RST_OFF); - sh_sdhi_writew(host, SDHI_CLK_CTRL, - CLK_ENABLE | sh_sdhi_readw(host, SDHI_CLK_CTRL)); - - timeout = 100000; - while (timeout--) { - if (!(sh_sdhi_readw(host, SDHI_INFO2) & INFO2_CBUSY)) - break; - udelay(100); - } - - if (!timeout) - return -EBUSY; - - if (host->quirks & SH_SDHI_QUIRK_16BIT_BUF) - sh_sdhi_writew(host, SDHI_HOST_MODE, 1); - - return 0; -} - -static int sh_sdhi_error_manage(struct sh_sdhi_host *host) -{ - unsigned short e_state1, e_state2; - int ret; - - host->sd_error = 0; - host->wait_int = 0; - - e_state1 = sh_sdhi_readw(host, SDHI_ERR_STS1); - e_state2 = sh_sdhi_readw(host, SDHI_ERR_STS2); - if (e_state2 & ERR_STS2_SYS_ERROR) { - if (e_state2 & ERR_STS2_RES_STOP_TIMEOUT) - ret = -ETIMEDOUT; - else - ret = -EILSEQ; - debug("%s: ERR_STS2 = %04x\n", - DRIVER_NAME, sh_sdhi_readw(host, SDHI_ERR_STS2)); - sh_sdhi_sync_reset(host); - - sh_sdhi_writew(host, SDHI_INFO1_MASK, - INFO1M_DATA3_CARD_RE | INFO1M_DATA3_CARD_IN); - return ret; - } - if (e_state1 & ERR_STS1_CRC_ERROR || e_state1 & ERR_STS1_CMD_ERROR) - ret = -EILSEQ; - else - ret = -ETIMEDOUT; - - debug("%s: ERR_STS1 = %04x\n", - DRIVER_NAME, sh_sdhi_readw(host, SDHI_ERR_STS1)); - sh_sdhi_sync_reset(host); - sh_sdhi_writew(host, SDHI_INFO1_MASK, - INFO1M_DATA3_CARD_RE | INFO1M_DATA3_CARD_IN); - return ret; -} - -static int sh_sdhi_single_read(struct sh_sdhi_host *host, struct mmc_data *data) -{ - long time; - unsigned short blocksize, i; - unsigned short *p = (unsigned short *)data->dest; - u64 *q = (u64 *)data->dest; - - if ((unsigned long)p & 0x00000001) { - debug(DRIVER_NAME": %s: The data pointer is unaligned.", - __func__); - return -EIO; - } - - host->wait_int = 0; - sh_sdhi_writew(host, SDHI_INFO2_MASK, - ~(INFO2M_BRE_ENABLE | INFO2M_BUF_ILL_READ) & - sh_sdhi_readw(host, SDHI_INFO2_MASK)); - sh_sdhi_writew(host, SDHI_INFO1_MASK, - ~INFO1M_ACCESS_END & - sh_sdhi_readw(host, SDHI_INFO1_MASK)); - time = sh_sdhi_wait_interrupt_flag(host); - if (time == 0 || host->sd_error != 0) - return sh_sdhi_error_manage(host); - - host->wait_int = 0; - blocksize = sh_sdhi_readw(host, SDHI_SIZE); - if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF) - for (i = 0; i < blocksize / 8; i++) - *q++ = sh_sdhi_readq(host, SDHI_BUF0); - else - for (i = 0; i < blocksize / 2; i++) - *p++ = sh_sdhi_readw(host, SDHI_BUF0); - - time = sh_sdhi_wait_interrupt_flag(host); - if (time == 0 || host->sd_error != 0) - return sh_sdhi_error_manage(host); - - host->wait_int = 0; - return 0; -} - -static int sh_sdhi_multi_read(struct sh_sdhi_host *host, struct mmc_data *data) -{ - long time; - unsigned short blocksize, i, sec; - unsigned short *p = (unsigned short *)data->dest; - u64 *q = (u64 *)data->dest; - - if ((unsigned long)p & 0x00000001) { - debug(DRIVER_NAME": %s: The data pointer is unaligned.", - __func__); - return -EIO; - } - - debug("%s: blocks = %d, blocksize = %d\n", - __func__, data->blocks, data->blocksize); - - host->wait_int = 0; - for (sec = 0; sec < data->blocks; sec++) { - sh_sdhi_writew(host, SDHI_INFO2_MASK, - ~(INFO2M_BRE_ENABLE | INFO2M_BUF_ILL_READ) & - sh_sdhi_readw(host, SDHI_INFO2_MASK)); - - time = sh_sdhi_wait_interrupt_flag(host); - if (time == 0 || host->sd_error != 0) - return sh_sdhi_error_manage(host); - - host->wait_int = 0; - blocksize = sh_sdhi_readw(host, SDHI_SIZE); - if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF) - for (i = 0; i < blocksize / 8; i++) - *q++ = sh_sdhi_readq(host, SDHI_BUF0); - else - for (i = 0; i < blocksize / 2; i++) - *p++ = sh_sdhi_readw(host, SDHI_BUF0); - } - - return 0; -} - -static int sh_sdhi_single_write(struct sh_sdhi_host *host, - struct mmc_data *data) -{ - long time; - unsigned short blocksize, i; - const unsigned short *p = (const unsigned short *)data->src; - const u64 *q = (const u64 *)data->src; - - if ((unsigned long)p & 0x00000001) { - debug(DRIVER_NAME": %s: The data pointer is unaligned.", - __func__); - return -EIO; - } - - debug("%s: blocks = %d, blocksize = %d\n", - __func__, data->blocks, data->blocksize); - - host->wait_int = 0; - sh_sdhi_writew(host, SDHI_INFO2_MASK, - ~(INFO2M_BWE_ENABLE | INFO2M_BUF_ILL_WRITE) & - sh_sdhi_readw(host, SDHI_INFO2_MASK)); - sh_sdhi_writew(host, SDHI_INFO1_MASK, - ~INFO1M_ACCESS_END & - sh_sdhi_readw(host, SDHI_INFO1_MASK)); - - time = sh_sdhi_wait_interrupt_flag(host); - if (time == 0 || host->sd_error != 0) - return sh_sdhi_error_manage(host); - - host->wait_int = 0; - blocksize = sh_sdhi_readw(host, SDHI_SIZE); - if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF) - for (i = 0; i < blocksize / 8; i++) - sh_sdhi_writeq(host, SDHI_BUF0, *q++); - else - for (i = 0; i < blocksize / 2; i++) - sh_sdhi_writew(host, SDHI_BUF0, *p++); - - time = sh_sdhi_wait_interrupt_flag(host); - if (time == 0 || host->sd_error != 0) - return sh_sdhi_error_manage(host); - - host->wait_int = 0; - return 0; -} - -static int sh_sdhi_multi_write(struct sh_sdhi_host *host, struct mmc_data *data) -{ - long time; - unsigned short i, sec, blocksize; - const unsigned short *p = (const unsigned short *)data->src; - const u64 *q = (const u64 *)data->src; - - debug("%s: blocks = %d, blocksize = %d\n", - __func__, data->blocks, data->blocksize); - - host->wait_int = 0; - for (sec = 0; sec < data->blocks; sec++) { - sh_sdhi_writew(host, SDHI_INFO2_MASK, - ~(INFO2M_BWE_ENABLE | INFO2M_BUF_ILL_WRITE) & - sh_sdhi_readw(host, SDHI_INFO2_MASK)); - - time = sh_sdhi_wait_interrupt_flag(host); - if (time == 0 || host->sd_error != 0) - return sh_sdhi_error_manage(host); - - host->wait_int = 0; - blocksize = sh_sdhi_readw(host, SDHI_SIZE); - if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF) - for (i = 0; i < blocksize / 8; i++) - sh_sdhi_writeq(host, SDHI_BUF0, *q++); - else - for (i = 0; i < blocksize / 2; i++) - sh_sdhi_writew(host, SDHI_BUF0, *p++); - } - - return 0; -} - -static void sh_sdhi_get_response(struct sh_sdhi_host *host, struct mmc_cmd *cmd) -{ - unsigned short i, j, cnt = 1; - unsigned short resp[8]; - - if (cmd->resp_type & MMC_RSP_136) { - cnt = 4; - resp[0] = sh_sdhi_readw(host, SDHI_RSP00); - resp[1] = sh_sdhi_readw(host, SDHI_RSP01); - resp[2] = sh_sdhi_readw(host, SDHI_RSP02); - resp[3] = sh_sdhi_readw(host, SDHI_RSP03); - resp[4] = sh_sdhi_readw(host, SDHI_RSP04); - resp[5] = sh_sdhi_readw(host, SDHI_RSP05); - resp[6] = sh_sdhi_readw(host, SDHI_RSP06); - resp[7] = sh_sdhi_readw(host, SDHI_RSP07); - - /* SDHI REGISTER SPECIFICATION */ - for (i = 7, j = 6; i > 0; i--) { - resp[i] = (resp[i] << 8) & 0xff00; - resp[i] |= (resp[j--] >> 8) & 0x00ff; - } - resp[0] = (resp[0] << 8) & 0xff00; - } else { - resp[0] = sh_sdhi_readw(host, SDHI_RSP00); - resp[1] = sh_sdhi_readw(host, SDHI_RSP01); - } - -#if defined(__BIG_ENDIAN_BITFIELD) - if (cnt == 4) { - cmd->response[0] = (resp[6] << 16) | resp[7]; - cmd->response[1] = (resp[4] << 16) | resp[5]; - cmd->response[2] = (resp[2] << 16) | resp[3]; - cmd->response[3] = (resp[0] << 16) | resp[1]; - } else { - cmd->response[0] = (resp[0] << 16) | resp[1]; - } -#else - if (cnt == 4) { - cmd->response[0] = (resp[7] << 16) | resp[6]; - cmd->response[1] = (resp[5] << 16) | resp[4]; - cmd->response[2] = (resp[3] << 16) | resp[2]; - cmd->response[3] = (resp[1] << 16) | resp[0]; - } else { - cmd->response[0] = (resp[1] << 16) | resp[0]; - } -#endif /* __BIG_ENDIAN_BITFIELD */ -} - -static unsigned short sh_sdhi_set_cmd(struct sh_sdhi_host *host, - struct mmc_data *data, unsigned short opc) -{ - if (host->app_cmd) { - if (!data) - host->app_cmd = 0; - return opc | BIT(6); - } - - switch (opc) { - case MMC_CMD_SWITCH: - return opc | (data ? 0x1c00 : 0x40); - case MMC_CMD_SEND_EXT_CSD: - return opc | (data ? 0x1c00 : 0); - case MMC_CMD_SEND_OP_COND: - return opc | 0x0700; - case MMC_CMD_APP_CMD: - host->app_cmd = 1; - default: - return opc; - } -} - -static unsigned short sh_sdhi_data_trans(struct sh_sdhi_host *host, - struct mmc_data *data, unsigned short opc) -{ - if (host->app_cmd) { - host->app_cmd = 0; - switch (opc) { - case SD_CMD_APP_SEND_SCR: - case SD_CMD_APP_SD_STATUS: - return sh_sdhi_single_read(host, data); - default: - printf(DRIVER_NAME": SD: NOT SUPPORT APP CMD = d'%04d\n", - opc); - return -EINVAL; - } - } else { - switch (opc) { - case MMC_CMD_WRITE_MULTIPLE_BLOCK: - return sh_sdhi_multi_write(host, data); - case MMC_CMD_READ_MULTIPLE_BLOCK: - return sh_sdhi_multi_read(host, data); - case MMC_CMD_WRITE_SINGLE_BLOCK: - return sh_sdhi_single_write(host, data); - case MMC_CMD_READ_SINGLE_BLOCK: - case MMC_CMD_SWITCH: - case MMC_CMD_SEND_EXT_CSD:; - return sh_sdhi_single_read(host, data); - default: - printf(DRIVER_NAME": SD: NOT SUPPORT CMD = d'%04d\n", opc); - return -EINVAL; - } - } -} - -static int sh_sdhi_start_cmd(struct sh_sdhi_host *host, - struct mmc_data *data, struct mmc_cmd *cmd) -{ - long time; - unsigned short shcmd, opc = cmd->cmdidx; - int ret = 0; - unsigned long timeout; - - debug("opc = %d, arg = %x, resp_type = %x\n", - opc, cmd->cmdarg, cmd->resp_type); - - if (opc == MMC_CMD_STOP_TRANSMISSION) { - /* SDHI sends the STOP command automatically by STOP reg */ - sh_sdhi_writew(host, SDHI_INFO1_MASK, ~INFO1M_ACCESS_END & - sh_sdhi_readw(host, SDHI_INFO1_MASK)); - - time = sh_sdhi_wait_interrupt_flag(host); - if (time == 0 || host->sd_error != 0) - return sh_sdhi_error_manage(host); - - sh_sdhi_get_response(host, cmd); - return 0; - } - - if (data) { - if ((opc == MMC_CMD_READ_MULTIPLE_BLOCK) || - opc == MMC_CMD_WRITE_MULTIPLE_BLOCK) { - sh_sdhi_writew(host, SDHI_STOP, STOP_SEC_ENABLE); - sh_sdhi_writew(host, SDHI_SECCNT, data->blocks); - } - sh_sdhi_writew(host, SDHI_SIZE, data->blocksize); - } - - shcmd = sh_sdhi_set_cmd(host, data, opc); - - /* - * U-Boot cannot use interrupt. - * So this flag may not be clear by timing - */ - sh_sdhi_writew(host, SDHI_INFO1, ~INFO1_RESP_END); - - sh_sdhi_writew(host, SDHI_INFO1_MASK, - INFO1M_RESP_END | sh_sdhi_readw(host, SDHI_INFO1_MASK)); - sh_sdhi_writew(host, SDHI_ARG0, - (unsigned short)(cmd->cmdarg & ARG0_MASK)); - sh_sdhi_writew(host, SDHI_ARG1, - (unsigned short)((cmd->cmdarg >> 16) & ARG1_MASK)); - - timeout = 100000; - /* Waiting for SD Bus busy to be cleared */ - while (timeout--) { - if ((sh_sdhi_readw(host, SDHI_INFO2) & 0x2000)) - break; - } - - host->wait_int = 0; - sh_sdhi_writew(host, SDHI_INFO1_MASK, - ~INFO1M_RESP_END & sh_sdhi_readw(host, SDHI_INFO1_MASK)); - sh_sdhi_writew(host, SDHI_INFO2_MASK, - ~(INFO2M_CMD_ERROR | INFO2M_CRC_ERROR | - INFO2M_END_ERROR | INFO2M_TIMEOUT | - INFO2M_RESP_TIMEOUT | INFO2M_ILA) & - sh_sdhi_readw(host, SDHI_INFO2_MASK)); - - sh_sdhi_writew(host, SDHI_CMD, (unsigned short)(shcmd & CMD_MASK)); - time = sh_sdhi_wait_interrupt_flag(host); - if (!time) { - host->app_cmd = 0; - return sh_sdhi_error_manage(host); - } - - if (host->sd_error) { - switch (cmd->cmdidx) { - case MMC_CMD_ALL_SEND_CID: - case MMC_CMD_SELECT_CARD: - case SD_CMD_SEND_IF_COND: - case MMC_CMD_APP_CMD: - ret = -ETIMEDOUT; - break; - default: - debug(DRIVER_NAME": Cmd(d'%d) err\n", opc); - debug(DRIVER_NAME": cmdidx = %d\n", cmd->cmdidx); - ret = sh_sdhi_error_manage(host); - break; - } - host->sd_error = 0; - host->wait_int = 0; - host->app_cmd = 0; - return ret; - } - - if (sh_sdhi_readw(host, SDHI_INFO1) & INFO1_RESP_END) { - host->app_cmd = 0; - return -EINVAL; - } - - if (host->wait_int) { - sh_sdhi_get_response(host, cmd); - host->wait_int = 0; - } - - if (data) - ret = sh_sdhi_data_trans(host, data, opc); - - debug("ret = %d, resp = %08x, %08x, %08x, %08x\n", - ret, cmd->response[0], cmd->response[1], - cmd->response[2], cmd->response[3]); - return ret; -} - -static int sh_sdhi_send_cmd_common(struct sh_sdhi_host *host, - struct mmc_cmd *cmd, struct mmc_data *data) -{ - host->sd_error = 0; - - return sh_sdhi_start_cmd(host, data, cmd); -} - -static int sh_sdhi_set_ios_common(struct sh_sdhi_host *host, struct mmc *mmc) -{ - int ret; - - ret = sh_sdhi_clock_control(host, mmc->clock); - if (ret) - return -EINVAL; - - if (mmc->bus_width == 8) - sh_sdhi_writew(host, SDHI_OPTION, - OPT_BUS_WIDTH_8 | (~OPT_BUS_WIDTH_M & - sh_sdhi_readw(host, SDHI_OPTION))); - else if (mmc->bus_width == 4) - sh_sdhi_writew(host, SDHI_OPTION, - OPT_BUS_WIDTH_4 | (~OPT_BUS_WIDTH_M & - sh_sdhi_readw(host, SDHI_OPTION))); - else - sh_sdhi_writew(host, SDHI_OPTION, - OPT_BUS_WIDTH_1 | (~OPT_BUS_WIDTH_M & - sh_sdhi_readw(host, SDHI_OPTION))); - - debug("clock = %d, buswidth = %d\n", mmc->clock, mmc->bus_width); - - return 0; -} - -static int sh_sdhi_initialize_common(struct sh_sdhi_host *host) -{ - int ret = sh_sdhi_sync_reset(host); - - sh_sdhi_writew(host, SDHI_PORTSEL, USE_1PORT); - -#if defined(__BIG_ENDIAN_BITFIELD) - sh_sdhi_writew(host, SDHI_EXT_SWAP, SET_SWAP); -#endif - - sh_sdhi_writew(host, SDHI_INFO1_MASK, INFO1M_RESP_END | - INFO1M_ACCESS_END | INFO1M_CARD_RE | - INFO1M_DATA3_CARD_RE | INFO1M_DATA3_CARD_IN); - - return ret; -} - -#ifndef CONFIG_DM_MMC -static void *mmc_priv(struct mmc *mmc) -{ - return (void *)mmc->priv; -} - -static int sh_sdhi_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, - struct mmc_data *data) -{ - struct sh_sdhi_host *host = mmc_priv(mmc); - - return sh_sdhi_send_cmd_common(host, cmd, data); -} - -static int sh_sdhi_set_ios(struct mmc *mmc) -{ - struct sh_sdhi_host *host = mmc_priv(mmc); - - return sh_sdhi_set_ios_common(host, mmc); -} - -static int sh_sdhi_initialize(struct mmc *mmc) -{ - struct sh_sdhi_host *host = mmc_priv(mmc); - - return sh_sdhi_initialize_common(host); -} - -static const struct mmc_ops sh_sdhi_ops = { - .send_cmd = sh_sdhi_send_cmd, - .set_ios = sh_sdhi_set_ios, - .init = sh_sdhi_initialize, -}; - -#ifdef CONFIG_RCAR_GEN3 -static struct mmc_config sh_sdhi_cfg = { - .name = DRIVER_NAME, - .ops = &sh_sdhi_ops, - .f_min = CLKDEV_INIT, - .f_max = CLKDEV_HS_DATA, - .voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34, - .host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HS | - MMC_MODE_HS_52MHz, - .part_type = PART_TYPE_DOS, - .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, -}; -#else -static struct mmc_config sh_sdhi_cfg = { - .name = DRIVER_NAME, - .ops = &sh_sdhi_ops, - .f_min = CLKDEV_INIT, - .f_max = CLKDEV_HS_DATA, - .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .host_caps = MMC_MODE_4BIT | MMC_MODE_HS, - .part_type = PART_TYPE_DOS, - .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, -}; -#endif - -int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks) -{ - int ret = 0; - struct mmc *mmc; - struct sh_sdhi_host *host = NULL; - - if (ch >= CFG_SYS_SH_SDHI_NR_CHANNEL) - return -ENODEV; - - host = malloc(sizeof(struct sh_sdhi_host)); - if (!host) - return -ENOMEM; - - mmc = mmc_create(&sh_sdhi_cfg, host); - if (!mmc) { - ret = -1; - goto error; - } - - host->ch = ch; - host->addr = (void __iomem *)addr; - host->quirks = quirks; - - if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF) - host->bus_shift = 2; - else if (host->quirks & SH_SDHI_QUIRK_16BIT_BUF) - host->bus_shift = 1; - - return ret; -error: - free(host); - return ret; -} - -#else - -struct sh_sdhi_plat { - struct mmc_config cfg; - struct mmc mmc; -}; - -int sh_sdhi_dm_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, - struct mmc_data *data) -{ - struct sh_sdhi_host *host = dev_get_priv(dev); - - return sh_sdhi_send_cmd_common(host, cmd, data); -} - -int sh_sdhi_dm_set_ios(struct udevice *dev) -{ - struct sh_sdhi_host *host = dev_get_priv(dev); - struct mmc *mmc = mmc_get_mmc_dev(dev); - - return sh_sdhi_set_ios_common(host, mmc); -} - -static const struct dm_mmc_ops sh_sdhi_dm_ops = { - .send_cmd = sh_sdhi_dm_send_cmd, - .set_ios = sh_sdhi_dm_set_ios, -}; - -static int sh_sdhi_dm_bind(struct udevice *dev) -{ - struct sh_sdhi_plat *plat = dev_get_plat(dev); - - return mmc_bind(dev, &plat->mmc, &plat->cfg); -} - -static int sh_sdhi_dm_probe(struct udevice *dev) -{ - struct sh_sdhi_plat *plat = dev_get_plat(dev); - struct sh_sdhi_host *host = dev_get_priv(dev); - struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); - struct clk sh_sdhi_clk; - const u32 quirks = dev_get_driver_data(dev); - fdt_addr_t base; - int ret; - - base = dev_read_addr(dev); - if (base == FDT_ADDR_T_NONE) - return -EINVAL; - - host->addr = devm_ioremap(dev, base, SZ_2K); - if (!host->addr) - return -ENOMEM; - - ret = clk_get_by_index(dev, 0, &sh_sdhi_clk); - if (ret) { - debug("failed to get clock, ret=%d\n", ret); - return ret; - } - - ret = clk_enable(&sh_sdhi_clk); - if (ret) { - debug("failed to enable clock, ret=%d\n", ret); - return ret; - } - - host->quirks = quirks; - - if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF) - host->bus_shift = 2; - else if (host->quirks & SH_SDHI_QUIRK_16BIT_BUF) - host->bus_shift = 1; - - plat->cfg.name = dev->name; - plat->cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS; - - switch (fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "bus-width", - 1)) { - case 8: - plat->cfg.host_caps |= MMC_MODE_8BIT; - break; - case 4: - plat->cfg.host_caps |= MMC_MODE_4BIT; - break; - case 1: - break; - default: - dev_err(dev, "Invalid \"bus-width\" value\n"); - return -EINVAL; - } - - sh_sdhi_initialize_common(host); - - plat->cfg.voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34; - plat->cfg.f_min = CLKDEV_INIT; - plat->cfg.f_max = CLKDEV_HS_DATA; - plat->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; - - upriv->mmc = &plat->mmc; - - return 0; -} - -static const struct udevice_id sh_sdhi_sd_match[] = { - { .compatible = "renesas,sdhi-r8a7795", .data = SH_SDHI_QUIRK_64BIT_BUF }, - { .compatible = "renesas,sdhi-r8a7796", .data = SH_SDHI_QUIRK_64BIT_BUF }, - { /* sentinel */ } -}; - -U_BOOT_DRIVER(sh_sdhi_mmc) = { - .name = "sh-sdhi-mmc", - .id = UCLASS_MMC, - .of_match = sh_sdhi_sd_match, - .bind = sh_sdhi_dm_bind, - .probe = sh_sdhi_dm_probe, - .priv_auto = sizeof(struct sh_sdhi_host), - .plat_auto = sizeof(struct sh_sdhi_plat), - .ops = &sh_sdhi_dm_ops, -}; -#endif diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c index d1e2681599..890c496b53 100644 --- a/drivers/mmc/tmio-common.c +++ b/drivers/mmc/tmio-common.c @@ -122,7 +122,10 @@ static int tmio_sd_wait_for_irq(struct udevice *dev, struct mmc_cmd *cmd, long wait = 1000000; int ret; - while (!(tmio_sd_readl(priv, reg) & flag)) { + while (true) { + if (tmio_sd_readl(priv, reg) & flag) + return tmio_sd_check_error(dev, cmd); + if (wait-- < 0) { dev_err(dev, "timeout\n"); return -ETIMEDOUT; @@ -756,7 +759,8 @@ int tmio_sd_probe(struct udevice *dev, u32 quirks) dev_dbg(dev, "version %x\n", priv->version); if (priv->version >= 0x10) { priv->caps |= TMIO_SD_CAP_DMA_INTERNAL; - priv->caps |= TMIO_SD_CAP_DIV1024; + if (!(priv->caps & TMIO_SD_CAP_RCAR)) + priv->caps |= TMIO_SD_CAP_DIV1024; } if (fdt_get_property(gd->fdt_blob, dev_of_offset(dev), "non-removable", diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 72547f00fb..a13e6f59cb 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -614,7 +614,6 @@ config ROCKCHIP_NAND config ROCKCHIP_NAND_SKIP_BBTSCAN bool "Skip the automatic BBT scan with Rockchip NAND controllers" depends on ROCKCHIP_NAND - default n help Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN option when data content is not in MTD format or diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index a9617c6c58..2b2efc8531 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -82,6 +82,7 @@ if SPI_FLASH config BOOTDEV_SPI_FLASH bool "SPI Flash bootdev support" + depends on BOOTSTD help Enable a boot device for SPI flash. This allows reading a script from SPI flash so that it can be used to boot an Operating System. @@ -107,7 +108,6 @@ config SPI_FLASH_SMART_HWCAPS config SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT bool "Command extension type is INVERT for Software Reset on boot" - default n help Because of SFDP information can not be get before boot. So define command extension type is INVERT when Software Reset on boot only. diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index 7976e3b3ed..ff49819b58 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -329,6 +329,7 @@ struct group_info { static const struct group_info npcm8xx_groups[] = { FUNC_LIST + {FN_gpio, "GPIO", NULL, 0, 0, 0} }; /* Pin flags */ diff --git a/drivers/sm/Kconfig b/drivers/sm/Kconfig index f0987275d2..926af28633 100644 --- a/drivers/sm/Kconfig +++ b/drivers/sm/Kconfig @@ -4,6 +4,5 @@ config SM config MESON_SM bool "Amlogic Secure Monitor driver" select SM - default n help Say y here to enable the Amlogic secure monitor driver. diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 854b8b88da..69b184b0d9 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -251,6 +251,15 @@ config MICROCHIP_COREQSPI Enable the QSPI driver for Microchip FPGA QSPI controllers. This driver can be used on Polarfire SoC. +config MESON_SPIFC_A1 + bool "Amlogic Meson A1 SPI Flash Controller driver" + depends on ARCH_MESON + help + Enable the Amlogic A1 SPI Flash Controller (SPIFC) driver. + This driver can be used to access the SPI NOR/NAND flash chips + with STR mode frequency up to 98MHz. Dual and quad modes are + supported by controller. + config MPC8XX_SPI bool "MPC8XX SPI Driver" depends on MPC8xx @@ -451,7 +460,6 @@ config SANDBOX_SPI_MAX_CS config SPI_ASPEED_SMC bool "ASPEED SPI flash controller driver" depends on DM_SPI && SPI_MEM - default n help Enable ASPEED SPI flash controller driver for AST2500 and AST2600 SoCs. diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index c27b3327c3..14bdb97f18 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -41,6 +41,7 @@ obj-$(CONFIG_ICH_SPI) += ich.o obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o +obj-$(CONFIG_MESON_SPIFC_A1) += meson_spifc_a1.o obj-$(CONFIG_MICROCHIP_COREQSPI) += microchip_coreqspi.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o diff --git a/drivers/spi/meson_spifc_a1.c b/drivers/spi/meson_spifc_a1.c new file mode 100644 index 0000000000..099c4c037d --- /dev/null +++ b/drivers/spi/meson_spifc_a1.c @@ -0,0 +1,383 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for Amlogic A1 SPI flash controller (SPIFC) + * + * Copyright (c) 2023, SberDevices. All Rights Reserved. + * + * Author: Martin Kurbanov <mmkurbanov@sberdevices.ru> + * + * Ported to u-boot: + * Author: Igor Prusov <ivprusov@sberdevices.ru> + */ + +#include <clk.h> +#include <dm.h> +#include <spi.h> +#include <spi-mem.h> +#include <asm/io.h> +#include <linux/log2.h> +#include <linux/iopoll.h> +#include <linux/bitfield.h> + +#define SPIFC_A1_AHB_CTRL_REG 0x0 +#define SPIFC_A1_AHB_BUS_EN BIT(31) + +#define SPIFC_A1_USER_CTRL0_REG 0x200 +#define SPIFC_A1_USER_REQUEST_ENABLE BIT(31) +#define SPIFC_A1_USER_REQUEST_FINISH BIT(30) +#define SPIFC_A1_USER_DATA_UPDATED BIT(0) + +#define SPIFC_A1_USER_CTRL1_REG 0x204 +#define SPIFC_A1_USER_CMD_ENABLE BIT(30) +#define SPIFC_A1_USER_CMD_MODE GENMASK(29, 28) +#define SPIFC_A1_USER_CMD_CODE GENMASK(27, 20) +#define SPIFC_A1_USER_ADDR_ENABLE BIT(19) +#define SPIFC_A1_USER_ADDR_MODE GENMASK(18, 17) +#define SPIFC_A1_USER_ADDR_BYTES GENMASK(16, 15) +#define SPIFC_A1_USER_DOUT_ENABLE BIT(14) +#define SPIFC_A1_USER_DOUT_MODE GENMASK(11, 10) +#define SPIFC_A1_USER_DOUT_BYTES GENMASK(9, 0) + +#define SPIFC_A1_USER_CTRL2_REG 0x208 +#define SPIFC_A1_USER_DUMMY_ENABLE BIT(31) +#define SPIFC_A1_USER_DUMMY_MODE GENMASK(30, 29) +#define SPIFC_A1_USER_DUMMY_CLK_SYCLES GENMASK(28, 23) + +#define SPIFC_A1_USER_CTRL3_REG 0x20c +#define SPIFC_A1_USER_DIN_ENABLE BIT(31) +#define SPIFC_A1_USER_DIN_MODE GENMASK(28, 27) +#define SPIFC_A1_USER_DIN_BYTES GENMASK(25, 16) + +#define SPIFC_A1_USER_ADDR_REG 0x210 + +#define SPIFC_A1_AHB_REQ_CTRL_REG 0x214 +#define SPIFC_A1_AHB_REQ_ENABLE BIT(31) + +#define SPIFC_A1_ACTIMING0_REG (0x0088 << 2) +#define SPIFC_A1_TSLCH GENMASK(31, 30) +#define SPIFC_A1_TCLSH GENMASK(29, 28) +#define SPIFC_A1_TSHWL GENMASK(20, 16) +#define SPIFC_A1_TSHSL2 GENMASK(15, 12) +#define SPIFC_A1_TSHSL1 GENMASK(11, 8) +#define SPIFC_A1_TWHSL GENMASK(7, 0) + +#define SPIFC_A1_DBUF_CTRL_REG 0x240 +#define SPIFC_A1_DBUF_DIR BIT(31) +#define SPIFC_A1_DBUF_AUTO_UPDATE_ADDR BIT(30) +#define SPIFC_A1_DBUF_ADDR GENMASK(7, 0) + +#define SPIFC_A1_DBUF_DATA_REG 0x244 + +#define SPIFC_A1_USER_DBUF_ADDR_REG 0x248 + +#define SPIFC_A1_BUFFER_SIZE 512U + +#define SPIFC_A1_MAX_HZ 200000000 +#define SPIFC_A1_MIN_HZ 1000000 + +#define SPIFC_A1_USER_CMD(op) ( \ + SPIFC_A1_USER_CMD_ENABLE | \ + FIELD_PREP(SPIFC_A1_USER_CMD_CODE, (op)->cmd.opcode) | \ + FIELD_PREP(SPIFC_A1_USER_CMD_MODE, ilog2((op)->cmd.buswidth))) + +#define SPIFC_A1_USER_ADDR(op) ( \ + SPIFC_A1_USER_ADDR_ENABLE | \ + FIELD_PREP(SPIFC_A1_USER_ADDR_MODE, ilog2((op)->addr.buswidth)) | \ + FIELD_PREP(SPIFC_A1_USER_ADDR_BYTES, (op)->addr.nbytes - 1)) + +#define SPIFC_A1_USER_DUMMY(op) ( \ + SPIFC_A1_USER_DUMMY_ENABLE | \ + FIELD_PREP(SPIFC_A1_USER_DUMMY_MODE, ilog2((op)->dummy.buswidth)) | \ + FIELD_PREP(SPIFC_A1_USER_DUMMY_CLK_SYCLES, (op)->dummy.nbytes << 3)) + +#define SPIFC_A1_TSLCH_VAL FIELD_PREP(SPIFC_A1_TSLCH, 1) +#define SPIFC_A1_TCLSH_VAL FIELD_PREP(SPIFC_A1_TCLSH, 1) +#define SPIFC_A1_TSHWL_VAL FIELD_PREP(SPIFC_A1_TSHWL, 7) +#define SPIFC_A1_TSHSL2_VAL FIELD_PREP(SPIFC_A1_TSHSL2, 7) +#define SPIFC_A1_TSHSL1_VAL FIELD_PREP(SPIFC_A1_TSHSL1, 7) +#define SPIFC_A1_TWHSL_VAL FIELD_PREP(SPIFC_A1_TWHSL, 2) +#define SPIFC_A1_ACTIMING0_VAL (SPIFC_A1_TSLCH_VAL | SPIFC_A1_TCLSH_VAL | \ + SPIFC_A1_TSHWL_VAL | SPIFC_A1_TSHSL2_VAL | \ + SPIFC_A1_TSHSL1_VAL | SPIFC_A1_TWHSL_VAL) + +struct amlogic_spifc_a1 { + struct clk clk; + void __iomem *base; + u32 curr_speed_hz; +}; + +static int amlogic_spifc_a1_request(struct amlogic_spifc_a1 *spifc, bool read) +{ + u32 mask = SPIFC_A1_USER_REQUEST_FINISH | + (read ? SPIFC_A1_USER_DATA_UPDATED : 0); + u32 val; + + writel(SPIFC_A1_USER_REQUEST_ENABLE, + spifc->base + SPIFC_A1_USER_CTRL0_REG); + + return readl_poll_timeout(spifc->base + SPIFC_A1_USER_CTRL0_REG, + val, (val & mask) == mask, + 200 * 1000); +} + +static void amlogic_spifc_a1_drain_buffer(struct amlogic_spifc_a1 *spifc, + char *buf, u32 len) +{ + u32 data; + const u32 count = len / sizeof(data); + const u32 pad = len % sizeof(data); + + writel(SPIFC_A1_DBUF_AUTO_UPDATE_ADDR, + spifc->base + SPIFC_A1_DBUF_CTRL_REG); + readsl(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count); + + if (pad) { + data = readl(spifc->base + SPIFC_A1_DBUF_DATA_REG); + memcpy(buf + len - pad, &data, pad); + } +} + +static void amlogic_spifc_a1_fill_buffer(struct amlogic_spifc_a1 *spifc, + const char *buf, u32 len) +{ + u32 data; + const u32 count = len / sizeof(data); + const u32 pad = len % sizeof(data); + + writel(SPIFC_A1_DBUF_DIR | SPIFC_A1_DBUF_AUTO_UPDATE_ADDR, + spifc->base + SPIFC_A1_DBUF_CTRL_REG); + writesl(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count); + + if (pad) { + memcpy(&data, buf + len - pad, pad); + writel(data, spifc->base + SPIFC_A1_DBUF_DATA_REG); + } +} + +static void amlogic_spifc_a1_user_init(struct amlogic_spifc_a1 *spifc) +{ + writel(0, spifc->base + SPIFC_A1_USER_CTRL0_REG); + writel(0, spifc->base + SPIFC_A1_USER_CTRL1_REG); + writel(0, spifc->base + SPIFC_A1_USER_CTRL2_REG); + writel(0, spifc->base + SPIFC_A1_USER_CTRL3_REG); +} + +static void amlogic_spifc_a1_set_cmd(struct amlogic_spifc_a1 *spifc, + u32 cmd_cfg) +{ + u32 val; + + val = readl(spifc->base + SPIFC_A1_USER_CTRL1_REG); + val &= ~(SPIFC_A1_USER_CMD_MODE | SPIFC_A1_USER_CMD_CODE); + val |= cmd_cfg; + writel(val, spifc->base + SPIFC_A1_USER_CTRL1_REG); +} + +static void amlogic_spifc_a1_set_addr(struct amlogic_spifc_a1 *spifc, u32 addr, + u32 addr_cfg) +{ + u32 val; + + writel(addr, spifc->base + SPIFC_A1_USER_ADDR_REG); + + val = readl(spifc->base + SPIFC_A1_USER_CTRL1_REG); + val &= ~(SPIFC_A1_USER_ADDR_MODE | SPIFC_A1_USER_ADDR_BYTES); + val |= addr_cfg; + writel(val, spifc->base + SPIFC_A1_USER_CTRL1_REG); +} + +static void amlogic_spifc_a1_set_dummy(struct amlogic_spifc_a1 *spifc, + u32 dummy_cfg) +{ + u32 val = readl(spifc->base + SPIFC_A1_USER_CTRL2_REG); + + val &= ~(SPIFC_A1_USER_DUMMY_MODE | SPIFC_A1_USER_DUMMY_CLK_SYCLES); + val |= dummy_cfg; + writel(val, spifc->base + SPIFC_A1_USER_CTRL2_REG); +} + +static int amlogic_spifc_a1_read(struct amlogic_spifc_a1 *spifc, void *buf, + u32 size, u32 mode) +{ + u32 val = readl(spifc->base + SPIFC_A1_USER_CTRL3_REG); + int ret; + + val &= ~(SPIFC_A1_USER_DIN_MODE | SPIFC_A1_USER_DIN_BYTES); + val |= SPIFC_A1_USER_DIN_ENABLE; + val |= FIELD_PREP(SPIFC_A1_USER_DIN_MODE, mode); + val |= FIELD_PREP(SPIFC_A1_USER_DIN_BYTES, size); + writel(val, spifc->base + SPIFC_A1_USER_CTRL3_REG); + + ret = amlogic_spifc_a1_request(spifc, true); + if (!ret) + amlogic_spifc_a1_drain_buffer(spifc, buf, size); + + return ret; +} + +static int amlogic_spifc_a1_write(struct amlogic_spifc_a1 *spifc, + const void *buf, u32 size, u32 mode) +{ + u32 val; + + amlogic_spifc_a1_fill_buffer(spifc, buf, size); + + val = readl(spifc->base + SPIFC_A1_USER_CTRL1_REG); + val &= ~(SPIFC_A1_USER_DOUT_MODE | SPIFC_A1_USER_DOUT_BYTES); + val |= FIELD_PREP(SPIFC_A1_USER_DOUT_MODE, mode); + val |= FIELD_PREP(SPIFC_A1_USER_DOUT_BYTES, size); + val |= SPIFC_A1_USER_DOUT_ENABLE; + writel(val, spifc->base + SPIFC_A1_USER_CTRL1_REG); + + return amlogic_spifc_a1_request(spifc, false); +} + +static int amlogic_spifc_a1_set_freq(struct amlogic_spifc_a1 *spifc, u32 freq) +{ + int ret; + + if (freq == spifc->curr_speed_hz) + return 0; + + ret = clk_set_rate(&spifc->clk, freq); + if (ret) + return ret; + + spifc->curr_speed_hz = freq; + return 0; +} + +static int amlogic_spifc_a1_exec_op(struct spi_slave *slave, + const struct spi_mem_op *op) +{ + struct amlogic_spifc_a1 *spifc = dev_get_priv(slave->dev->parent); + size_t data_size = op->data.nbytes; + int ret; + + ret = amlogic_spifc_a1_set_freq(spifc, slave->max_hz); + if (ret) + return ret; + + amlogic_spifc_a1_user_init(spifc); + amlogic_spifc_a1_set_cmd(spifc, SPIFC_A1_USER_CMD(op)); + + if (op->addr.nbytes) + amlogic_spifc_a1_set_addr(spifc, op->addr.val, + SPIFC_A1_USER_ADDR(op)); + + if (op->dummy.nbytes) + amlogic_spifc_a1_set_dummy(spifc, SPIFC_A1_USER_DUMMY(op)); + + if (data_size) { + u32 mode = ilog2(op->data.buswidth); + + writel(0, spifc->base + SPIFC_A1_USER_DBUF_ADDR_REG); + + if (op->data.dir == SPI_MEM_DATA_IN) + ret = amlogic_spifc_a1_read(spifc, op->data.buf.in, + data_size, mode); + else + ret = amlogic_spifc_a1_write(spifc, op->data.buf.out, + data_size, mode); + } else { + ret = amlogic_spifc_a1_request(spifc, false); + } + + return ret; +} + +static int amlogic_spifc_a1_adjust_op_size(struct spi_slave *slave, + struct spi_mem_op *op) +{ + op->data.nbytes = min(op->data.nbytes, SPIFC_A1_BUFFER_SIZE); + return 0; +} + +static void amlogic_spifc_a1_hw_init(struct amlogic_spifc_a1 *spifc) +{ + u32 regv; + + regv = readl(spifc->base + SPIFC_A1_AHB_REQ_CTRL_REG); + regv &= ~(SPIFC_A1_AHB_REQ_ENABLE); + writel(regv, spifc->base + SPIFC_A1_AHB_REQ_CTRL_REG); + + regv = readl(spifc->base + SPIFC_A1_AHB_CTRL_REG); + regv &= ~(SPIFC_A1_AHB_BUS_EN); + writel(regv, spifc->base + SPIFC_A1_AHB_CTRL_REG); + + writel(SPIFC_A1_ACTIMING0_VAL, spifc->base + SPIFC_A1_ACTIMING0_REG); + + writel(0, spifc->base + SPIFC_A1_USER_DBUF_ADDR_REG); +} + +static const struct spi_controller_mem_ops amlogic_spifc_a1_mem_ops = { + .exec_op = amlogic_spifc_a1_exec_op, + .adjust_op_size = amlogic_spifc_a1_adjust_op_size, +}; + +static int amlogic_spifc_a1_probe(struct udevice *dev) +{ + struct amlogic_spifc_a1 *spifc = dev_get_priv(dev); + int ret; + struct udevice *bus = dev; + + spifc->base = dev_read_addr_ptr(dev); + if (!spifc->base) + return -EINVAL; + + ret = clk_get_by_index(bus, 0, &spifc->clk); + if (ret) { + pr_err("can't get clk spifc_gate!\n"); + return ret; + } + + ret = clk_enable(&spifc->clk); + if (ret) { + pr_err("enable clk fail\n"); + return ret; + } + + amlogic_spifc_a1_hw_init(spifc); + + return 0; +} + +static int amlogic_spifc_a1_remove(struct udevice *dev) +{ + struct amlogic_spifc_a1 *spifc = dev_get_priv(dev); + + clk_free(&spifc->clk); + + return 0; +} + +static const struct udevice_id meson_spifc_ids[] = { + { .compatible = "amlogic,a1-spifc", }, + { } +}; + +int amlogic_spifc_a1_set_speed(struct udevice *bus, uint hz) +{ + return 0; +} + +int amlogic_spifc_a1_set_mode(struct udevice *bus, uint mode) +{ + return 0; +} + +static const struct dm_spi_ops amlogic_spifc_a1_ops = { + .mem_ops = &amlogic_spifc_a1_mem_ops, + .set_speed = amlogic_spifc_a1_set_speed, + .set_mode = amlogic_spifc_a1_set_mode, +}; + +U_BOOT_DRIVER(meson_spifc_a1) = { + .name = "meson_spifc_a1", + .id = UCLASS_SPI, + .of_match = meson_spifc_ids, + .ops = &amlogic_spifc_a1_ops, + .probe = amlogic_spifc_a1_probe, + .remove = amlogic_spifc_a1_remove, + .priv_auto = sizeof(struct amlogic_spifc_a1), +}; diff --git a/drivers/tpm/tpm2_tis_sandbox.c b/drivers/tpm/tpm2_tis_sandbox.c index e4004cfcca..d15a28d9fc 100644 --- a/drivers/tpm/tpm2_tis_sandbox.c +++ b/drivers/tpm/tpm2_tis_sandbox.c @@ -22,11 +22,6 @@ enum tpm2_hierarchy { TPM2_HIERARCHY_NB, }; -/* Subset of supported capabilities */ -enum tpm2_capability { - TPM_CAP_TPM_PROPERTIES = 0x6, -}; - /* Subset of supported properties */ #define TPM2_PROPERTIES_OFFSET 0x0000020E @@ -38,7 +33,8 @@ enum tpm2_cap_tpm_property { TPM2_PROPERTY_NB, }; -#define SANDBOX_TPM_PCR_NB 1 +#define SANDBOX_TPM_PCR_NB TPM2_MAX_PCRS +#define SANDBOX_TPM_PCR_SELECT_MAX ((SANDBOX_TPM_PCR_NB + 7) / 8) /* * Information about our TPM emulation. This is preserved in the sandbox @@ -433,7 +429,7 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, int i, j; /* TPM2_GetProperty */ - u32 capability, property, property_count; + u32 capability, property, property_count, val; /* TPM2_PCR_Read/Extend variables */ int pcr_index = 0; @@ -542,19 +538,32 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, case TPM2_CC_GET_CAPABILITY: capability = get_unaligned_be32(sent); sent += sizeof(capability); - if (capability != TPM_CAP_TPM_PROPERTIES) { - printf("Sandbox TPM only support TPM_CAPABILITIES\n"); - return TPM2_RC_HANDLE; - } - property = get_unaligned_be32(sent); sent += sizeof(property); - property -= TPM2_PROPERTIES_OFFSET; - property_count = get_unaligned_be32(sent); sent += sizeof(property_count); - if (!property_count || - property + property_count > TPM2_PROPERTY_NB) { + + switch (capability) { + case TPM2_CAP_PCRS: + break; + case TPM2_CAP_TPM_PROPERTIES: + if (!property_count) { + rc = TPM2_RC_HANDLE; + return sandbox_tpm2_fill_buf(recv, recv_len, + tag, rc); + } + + if (property >= TPM2_PROPERTIES_OFFSET && + ((property - TPM2_PROPERTIES_OFFSET) + + property_count > TPM2_PROPERTY_NB)) { + rc = TPM2_RC_HANDLE; + return sandbox_tpm2_fill_buf(recv, recv_len, + tag, rc); + } + break; + default: + printf("Sandbox TPM2 only supports TPM2_CAP_PCRS or " + "TPM2_CAP_TPM_PROPERTIES\n"); rc = TPM2_RC_HANDLE; return sandbox_tpm2_fill_buf(recv, recv_len, tag, rc); } @@ -578,18 +587,53 @@ static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, put_unaligned_be32(capability, recv); recv += sizeof(capability); - /* Give the number of properties that follow */ - put_unaligned_be32(property_count, recv); - recv += sizeof(property_count); - - /* Fill with the properties */ - for (i = 0; i < property_count; i++) { - put_unaligned_be32(TPM2_PROPERTIES_OFFSET + property + - i, recv); - recv += sizeof(property); - put_unaligned_be32(tpm->properties[property + i], - recv); - recv += sizeof(property); + switch (capability) { + case TPM2_CAP_PCRS: + /* Give the number of algorithms supported - just SHA256 */ + put_unaligned_be32(1, recv); + recv += sizeof(u32); + + /* Give SHA256 algorithm */ + put_unaligned_be16(TPM2_ALG_SHA256, recv); + recv += sizeof(u16); + + /* Select the PCRs supported */ + *recv = SANDBOX_TPM_PCR_SELECT_MAX; + recv++; + + /* Activate all the PCR bits */ + for (i = 0; i < SANDBOX_TPM_PCR_SELECT_MAX; ++i) { + *recv = 0xff; + recv++; + } + break; + case TPM2_CAP_TPM_PROPERTIES: + /* Give the number of properties that follow */ + put_unaligned_be32(property_count, recv); + recv += sizeof(property_count); + + /* Fill with the properties */ + for (i = 0; i < property_count; i++) { + put_unaligned_be32(property + i, recv); + recv += sizeof(property); + if (property >= TPM2_PROPERTIES_OFFSET) { + val = tpm->properties[(property - + TPM2_PROPERTIES_OFFSET) + i]; + } else { + switch (property) { + case TPM2_PT_PCR_COUNT: + val = SANDBOX_TPM_PCR_NB; + break; + default: + val = 0xffffffff; + break; + } + } + + put_unaligned_be32(val, recv); + recv += sizeof(property); + } + break; } /* Add trailing \0 */ diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 1a883babf4..b501ea514b 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -231,7 +231,6 @@ config USB_EHCI_MXS config USB_EHCI_NPCM bool "Support for Nuvoton NPCM on-chip EHCI USB controller" depends on ARCH_NPCM - default n ---help--- Enables support for the on-chip EHCI controller on Nuvoton NPCM chips. @@ -368,7 +367,6 @@ config USB_OHCI_DA8XX config USB_OHCI_NPCM bool "Support for Nuvoton NPCM on-chip OHCI USB controller" depends on ARCH_NPCM - default n ---help--- Enables support for the on-chip OHCI controller on Nuvoton NPCM chips. diff --git a/fs/ubifs/Kconfig b/fs/ubifs/Kconfig index 949b288411..690e77ef8d 100644 --- a/fs/ubifs/Kconfig +++ b/fs/ubifs/Kconfig @@ -8,7 +8,6 @@ config UBIFS_SILENCE_MSG config UBIFS_SILENCE_DEBUG_DUMP bool "UBIFS silence debug dumps" default y if UBIFS_SILENCE_MSG - default n help Make the debug dumps from UBIFS stop printing. This decreases size of U-Boot binary. diff --git a/include/bootm.h b/include/bootm.h index c3c7336207..10a1bd65a7 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -56,6 +56,17 @@ ulong bootm_disable_interrupts(void); int bootm_find_images(int flag, int argc, char *const argv[], ulong start, ulong size); +/* + * Measure the boot images. Measurement is the process of hashing some binary + * data and storing it into secure memory, i.e. TPM PCRs. In addition, each + * measurement is logged into the platform event log such that the operating + * system can access it and perform attestation of the boot. + * + * @images: The structure containing the various images to boot (linux, + * initrd, dts, etc.) + */ +int bootm_measure(struct bootm_headers *images); + int do_bootm_states(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[], int states, struct bootm_headers *images, int boot_progress); diff --git a/include/configs/arbel.h b/include/configs/arbel.h index 891257bc93..576ee37ee4 100644 --- a/include/configs/arbel.h +++ b/include/configs/arbel.h @@ -7,11 +7,15 @@ #define __CONFIG_ARBEL_H #define CFG_SYS_SDRAM_BASE 0x0 -#define CFG_SYS_BOOTMAPSZ (30 << 20) +#define CFG_SYS_BOOTMAPSZ (128 << 20) #define CFG_SYS_BOOTM_LEN (20 << 20) #define CFG_SYS_INIT_RAM_ADDR CFG_SYS_SDRAM_BASE #define CFG_SYS_INIT_RAM_SIZE 0x8000 +#define CFG_SYS_BAUDRATE_TABLE \ + { 9600, 14400, 19200, 38400, 57600, 115200, 230400, 380400, 460800, 921600 } + + /* Default environemnt variables */ #define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80400000\0" \ "stdin=serial\0" \ diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h index 3347c11792..3ada21cbba 100644 --- a/include/configs/corstone1000.h +++ b/include/configs/corstone1000.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * (C) Copyright 2022 ARM Limited + * Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com> * (C) Copyright 2022 Linaro * Rui Miguel Silva <rui.silva@linaro.org> * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> @@ -29,5 +29,6 @@ #include <config_distro_bootcmd.h> +#define CFG_EXTRA_ENV_SETTINGS BOOTENV #endif diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h index 4968722d18..94a9c76788 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -15,6 +15,15 @@ #include <configs/ti_armv7_common.h> +/* allow up to 3 USB storage devices */ +#ifdef CONFIG_CMD_USB +#undef BOOT_TARGET_USB +#define BOOT_TARGET_USB(func) \ + func(USB, usb, 0) \ + func(USB, usb, 1) \ + func(USB, usb, 2) +#endif + /* * This defines all MMC devices, even if the basic variant has no mmc1. * The non-supported device will be removed from the boot targets during diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 801cdae470..efab9a624d 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -53,6 +53,30 @@ #define BOOTENV_DEV_NAME_ROMUSB(devtypeu, devtypel, instance) \ "romusb " +/* + * Fallback to "USB DFU" boot if script is not at scriptaddr + * + * DFU will expose the kernel_addr_r memory range as DFU entry, + * then with `dfu-util --detach`, booting the uploaded image + * will be attempted: + * $ dfu-util -a 0 -D fitImage + * $ dfu-util -a 0 -e + */ +#if CONFIG_IS_ENABLED(USB_GADGET) && CONFIG_IS_ENABLED(DFU_RAM) + #define BOOTENV_DEV_USB_DFU(devtypeu, devtypel, instance) \ + "bootcmd_usbdfu=" \ + "if test \"${boot_source}\" = \"usb\"; then " \ + "dfu 0 ram 0 60;" \ + "bootm ${kernel_addr_r};" \ + "fi\0" + + #define BOOTENV_DEV_NAME_USB_DFU(devtypeu, devtypel, instance) \ + "usbdfu " +#else + #define BOOTENV_DEV_USB_DFU(devtypeu, devtypel, instance) + #define BOOTENV_DEV_NAME_USB_DFU(devtypeu, devtypel, instance) +#endif + #ifdef CONFIG_CMD_USB #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) #else @@ -74,6 +98,7 @@ #ifndef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ func(ROMUSB, romusb, na) \ + func(USB_DFU, usbdfu, na) \ func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ @@ -84,6 +109,15 @@ func(DHCP, dhcp, na) #endif +#define BOOTM_SIZE __stringify(0x1700000) +#define KERNEL_ADDR_R __stringify(0x08080000) +#define KERNEL_COMP_ADDR_R __stringify(0x0d080000) +#define FDT_ADDR_R __stringify(0x08008000) +#define SCRIPT_ADDR_R __stringify(0x08000000) +#define PXEFILE_ADDR_R __stringify(0x01080000) +#define FDTOVERLAY_ADDR_R __stringify(0x01000000) +#define RAMDISK_ADDR_R __stringify(0x13000000) + #include <config_distro_bootcmd.h> #ifndef CFG_EXTRA_ENV_SETTINGS @@ -91,15 +125,16 @@ "stdin=" STDIN_CFG "\0" \ "stdout=" STDOUT_CFG "\0" \ "stderr=" STDOUT_CFG "\0" \ - "kernel_comp_addr_r=0x0d080000\0" \ + "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \ "kernel_comp_size=0x2000000\0" \ - "fdt_addr_r=0x08008000\0" \ - "scriptaddr=0x08000000\0" \ - "kernel_addr_r=0x08080000\0" \ - "pxefile_addr_r=0x01080000\0" \ - "fdtoverlay_addr_r=0x01000000\0" \ - "ramdisk_addr_r=0x13000000\0" \ + "fdt_addr_r=" FDT_ADDR_R "\0" \ + "scriptaddr=" SCRIPT_ADDR_R "\0" \ + "kernel_addr_r=" KERNEL_ADDR_R "\0" \ + "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \ + "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \ + "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \ "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "dfu_alt_info=fitimage ram " KERNEL_ADDR_R " 0x4000000 \0" \ BOOTENV #endif diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index fa029a176b..8c4d03553d 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2015, 2021-2022 Tony Dinh <mibodhi@gmail.com> + * Copyright (C) 2015, 2021-2023 Tony Dinh <mibodhi@gmail.com> * Copyright (C) 2015 * Gerald Kerma <dreagle@doukki.net> * Luka Perkov <luka.perkov@sartura.hr> @@ -15,14 +15,6 @@ */ #include "mv-common.h" -/* Include the common distro boot environment */ -#ifndef CONFIG_SPL_BUILD - -#define BOOT_TARGET_DEVICES(func) \ - func(USB, usb, 0) \ - func(SATA, sata, 0) \ - func(DHCP, dhcp, na) - #define KERNEL_ADDR_R __stringify(0x800000) #define FDT_ADDR_R __stringify(0x2c00000) #define RAMDISK_ADDR_R __stringify(0x01100000) @@ -34,16 +26,11 @@ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \ "scriptaddr=" SCRIPT_ADDR_R "\0" -#include <config_distro_bootcmd.h> - #define CFG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "kernel=/boot/zImage\0" \ "fdt=/boot/nsa310s.dtb\0" \ "bootargs_root=ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs rw\0" \ - LOAD_ADDRESS_ENV_SETTINGS \ - BOOTENV - -#endif /* CONFIG_SPL_BUILD */ + LOAD_ADDRESS_ENV_SETTINGS #endif /* _CONFIG_NSA310S_H */ diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h index 3371579023..d5003538da 100644 --- a/include/configs/pogo_v4.h +++ b/include/configs/pogo_v4.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2014-2022 Tony Dinh <mibodhi@gmail.com> + * Copyright (C) 2014-2023 Tony Dinh <mibodhi@gmail.com> * * Based on * Copyright (C) 2012 @@ -21,33 +21,6 @@ */ #include "mv-common.h" -/* Include the common distro boot environment */ -#ifndef CONFIG_SPL_BUILD - -#ifdef CONFIG_MMC -#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) -#else -#define BOOT_TARGET_DEVICES_MMC(func) -#endif - -#ifdef CONFIG_SATA -#define BOOT_TARGET_DEVICES_SATA(func) func(SATA, sata, 0) -#else -#define BOOT_TARGET_DEVICES_SATA(func) -#endif - -#ifdef CONFIG_USB_STORAGE -#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) -#else -#define BOOT_TARGET_DEVICES_USB(func) -#endif - -#define BOOT_TARGET_DEVICES(func) \ - BOOT_TARGET_DEVICES_MMC(func) \ - BOOT_TARGET_DEVICES_USB(func) \ - BOOT_TARGET_DEVICES_SATA(func) \ - func(DHCP, dhcp, na) - #define KERNEL_ADDR_R __stringify(0x800000) #define FDT_ADDR_R __stringify(0x2c00000) #define RAMDISK_ADDR_R __stringify(0x01100000) @@ -59,14 +32,10 @@ "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \ "scriptaddr=" SCRIPT_ADDR_R "\0" -#include <config_distro_bootcmd.h> - #define CFG_EXTRA_ENV_SETTINGS \ LOAD_ADDRESS_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ - "console=ttyS0,115200\0" \ - BOOTENV -#endif /* CONFIG_SPL_BUILD */ + "console=ttyS0,115200\0" #endif /* _CONFIG_POGO_V4_H */ diff --git a/include/configs/poleg.h b/include/configs/poleg.h index 1e96e838be..2a2d85c8ec 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -13,6 +13,8 @@ #define CFG_SYS_BOOTMAPSZ (0x30 << 20) #define CFG_SYS_SDRAM_BASE 0x0 +#define CFG_SYS_BAUDRATE_TABLE { 57600, 115200, 230400, 460800 } + /* Default environemnt variables */ #define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80200000\0" \ "stdin=serial\0" \ diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index cd7359c2f8..e36e63e81e 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -41,20 +41,6 @@ /* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */ #ifdef CONFIG_FWU_MULTI_BANK_UPDATE -#define DEFAULT_DFU_ALT_INFO -#else -#define DEFAULT_DFU_ALT_INFO "dfu_alt_info=" \ - "mtd nor1=u-boot.bin raw 200000 100000;" \ - "fip.bin raw 180000 78000;" \ - "optee.bin raw 500000 100000\0" -#endif - -/* GUIDs for capsule updatable firmware images */ -#define DEVELOPERBOX_UBOOT_IMAGE_GUID \ - EFI_GUID(0x53a92e83, 0x4ef4, 0x473a, 0x8b, 0x0d, \ - 0xb5, 0xd8, 0xc7, 0xb2, 0xd6, 0x00) - -#ifdef CONFIG_FWU_MULTI_BANK_UPDATE #define DEVELOPERBOX_FIP_IMAGE_GUID \ EFI_GUID(0x7d6dc310, 0x52ca, 0x43b8, 0xb7, 0xb9, \ 0xf9, 0xd6, 0xc5, 0x01, 0xd1, 0x08) @@ -64,10 +50,6 @@ 0x33, 0xe0, 0xb9, 0x16, 0xf3, 0x98) #endif -#define DEVELOPERBOX_OPTEE_IMAGE_GUID \ - EFI_GUID(0xc1b629f1, 0xce0e, 0x4894, 0x82, 0xbf, \ - 0xf0, 0xa3, 0x83, 0x87, 0xe6, 0x30) - /* Distro boot settings */ #ifdef CONFIG_CMD_USB #define BOOT_TARGET_DEVICE_USB(func) func(USB, usb, 0) @@ -107,7 +89,6 @@ "ramdisk_addr_r=0xa0000000\0" \ "scriptaddr=0x88000000\0" \ "pxefile_addr_r=0x88100000\0" \ - DEFAULT_DFU_ALT_INFO \ BOOTENV #endif /* __CONFIG_H */ diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 43f7e454d8..24d8ca0866 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -148,6 +148,12 @@ #define FUNC_VIRTIO(func) #endif +#ifdef CONFIG_CMD_MMC +#define FUNC_MMC(func) func(MMC, mmc, 0) +#else +#define FUNC_MMC(func) +#endif + /* * Boot by loading an Android image, or kernel, initrd and FDT through * semihosting into DRAM. @@ -204,6 +210,7 @@ func(SMH, smh, na) \ func(MEM, mem, na) \ FUNC_VIRTIO(func) \ + FUNC_MMC(func) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) diff --git a/include/efi_tcg2.h b/include/efi_tcg2.h index b1c3abd097..b21c5cb3dd 100644 --- a/include/efi_tcg2.h +++ b/include/efi_tcg2.h @@ -129,50 +129,6 @@ struct efi_tcg2_boot_service_capability { #define BOOT_SERVICE_CAPABILITY_MIN \ offsetof(struct efi_tcg2_boot_service_capability, number_of_pcr_banks) -#define TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03 "Spec ID Event03" -#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MAJOR_TPM2 2 -#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MINOR_TPM2 0 -#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_ERRATA_TPM2 2 - -/** - * struct TCG_EfiSpecIdEventAlgorithmSize - hashing algorithm information - * - * @algorithm_id: algorithm defined in enum tpm2_algorithms - * @digest_size: size of the algorithm - */ -struct tcg_efi_spec_id_event_algorithm_size { - u16 algorithm_id; - u16 digest_size; -} __packed; - -/** - * struct TCG_EfiSpecIDEventStruct - content of the event log header - * - * @signature: signature, set to Spec ID Event03 - * @platform_class: class defined in TCG ACPI Specification - * Client Common Header. - * @spec_version_minor: minor version - * @spec_version_major: major version - * @spec_version_errata: major version - * @uintn_size: size of the efi_uintn_t fields used in various - * data structures used in this specification. - * 0x01 indicates u32 and 0x02 indicates u64 - * @number_of_algorithms: hashing algorithms used in this event log - * @digest_sizes: array of number_of_algorithms pairs - * 1st member defines the algorithm id - * 2nd member defines the algorithm size - */ -struct tcg_efi_spec_id_event { - u8 signature[16]; - u32 platform_class; - u8 spec_version_minor; - u8 spec_version_major; - u8 spec_errata; - u8 uintn_size; - u32 number_of_algorithms; - struct tcg_efi_spec_id_event_algorithm_size digest_sizes[]; -} __packed; - /** * struct tdEFI_TCG2_FINAL_EVENTS_TABLE - log entries after Get Event Log * @version: version number for this structure diff --git a/include/image.h b/include/image.h index 5f85bf84a2..2e3cf839ee 100644 --- a/include/image.h +++ b/include/image.h @@ -409,6 +409,7 @@ struct bootm_headers { #define BOOTM_STATE_OS_FAKE_GO 0x00000200 /* 'Almost' run the OS */ #define BOOTM_STATE_OS_GO 0x00000400 #define BOOTM_STATE_PRE_LOAD 0x00000800 +#define BOOTM_STATE_MEASURE 0x00001000 int state; #if defined(CONFIG_LMB) && !defined(USE_HOSTCC) diff --git a/include/sdhci.h b/include/sdhci.h index 70fefca2a9..a1b74e3bd7 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -57,6 +57,7 @@ #define SDHCI_PRESENT_STATE 0x24 #define SDHCI_CMD_INHIBIT BIT(0) #define SDHCI_DATA_INHIBIT BIT(1) +#define SDHCI_DAT_ACTIVE BIT(2) #define SDHCI_DOING_WRITE BIT(8) #define SDHCI_DOING_READ BIT(9) #define SDHCI_SPACE_AVAILABLE BIT(10) diff --git a/include/test/suites.h b/include/test/suites.h index 51acbe47b2..ad4fc926f4 100644 --- a/include/test/suites.h +++ b/include/test/suites.h @@ -46,6 +46,7 @@ int do_ut_lib(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); int do_ut_loadm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); int do_ut_log(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]); int do_ut_mbr(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); +int do_ut_measurement(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]); int do_ut_mem(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); int do_ut_overlay(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/include/tpm-v2.h b/include/tpm-v2.h index 2b6980e441..33dd103767 100644 --- a/include/tpm-v2.h +++ b/include/tpm-v2.h @@ -169,7 +169,7 @@ struct tcg_pcr_event { /** * Definition of TPMU_HA Union */ -union tmpu_ha { +union tpmu_ha { u8 sha1[TPM2_SHA1_DIGEST_SIZE]; u8 sha256[TPM2_SHA256_DIGEST_SIZE]; u8 sm3_256[TPM2_SM3_256_DIGEST_SIZE]; @@ -185,7 +185,7 @@ union tmpu_ha { */ struct tpmt_ha { u16 hash_alg; - union tmpu_ha digest; + union tpmu_ha digest; } __packed; /** @@ -217,6 +217,50 @@ struct tcg_pcr_event2 { } __packed; /** + * struct TCG_EfiSpecIdEventAlgorithmSize - hashing algorithm information + * + * @algorithm_id: algorithm defined in enum tpm2_algorithms + * @digest_size: size of the algorithm + */ +struct tcg_efi_spec_id_event_algorithm_size { + u16 algorithm_id; + u16 digest_size; +} __packed; + +#define TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03 "Spec ID Event03" +#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MAJOR_TPM2 2 +#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MINOR_TPM2 0 +#define TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_ERRATA_TPM2 2 + +/** + * struct TCG_EfiSpecIDEventStruct - content of the event log header + * + * @signature: signature, set to Spec ID Event03 + * @platform_class: class defined in TCG ACPI Specification + * Client Common Header. + * @spec_version_minor: minor version + * @spec_version_major: major version + * @spec_version_errata: major version + * @uintn_size: size of the efi_uintn_t fields used in various + * data structures used in this specification. + * 0x01 indicates u32 and 0x02 indicates u64 + * @number_of_algorithms: hashing algorithms used in this event log + * @digest_sizes: array of number_of_algorithms pairs + * 1st member defines the algorithm id + * 2nd member defines the algorithm size + */ +struct tcg_efi_spec_id_event { + u8 signature[16]; + u32 platform_class; + u8 spec_version_minor; + u8 spec_version_major; + u8 spec_errata; + u8 uintn_size; + u32 number_of_algorithms; + struct tcg_efi_spec_id_event_algorithm_size digest_sizes[]; +} __packed; + +/** * TPM2 Structure Tags for command/response buffers. * * @TPM2_ST_NO_SESSIONS: the command does not need an authentication. @@ -342,6 +386,26 @@ enum tpm2_algorithms { TPM2_ALG_SM3_256 = 0x12, }; +extern const enum tpm2_algorithms tpm2_supported_algorithms[4]; + +static inline u16 tpm2_algorithm_to_len(enum tpm2_algorithms a) +{ + switch (a) { + case TPM2_ALG_SHA1: + return TPM2_SHA1_DIGEST_SIZE; + case TPM2_ALG_SHA256: + return TPM2_SHA256_DIGEST_SIZE; + case TPM2_ALG_SHA384: + return TPM2_SHA384_DIGEST_SIZE; + case TPM2_ALG_SHA512: + return TPM2_SHA512_DIGEST_SIZE; + default: + return 0; + } +} + +#define tpm2_algorithm_to_mask(a) (1 << (a)) + /* NV index attributes */ enum tpm_index_attrs { TPMA_NV_PPWRITE = 1UL << 0, @@ -422,6 +486,188 @@ enum { }; /** + * struct tcg2_event_log - Container for managing the platform event log + * + * @log: Address of the log + * @log_position: Current entry position + * @log_size: Log space available + * @found: Boolean indicating if an existing log was discovered + */ +struct tcg2_event_log { + u8 *log; + u32 log_position; + u32 log_size; + bool found; +}; + +/** + * Create a list of digests of the supported PCR banks for a given input data + * + * @dev TPM device + * @input Data + * @length Length of the data to calculate the digest + * @digest_list List of digests to fill in + * + * Return: zero on success, negative errno otherwise + */ +int tcg2_create_digest(struct udevice *dev, const u8 *input, u32 length, + struct tpml_digest_values *digest_list); + +/** + * Get the event size of the specified digests + * + * @digest_list List of digests for the event + * + * Return: Size in bytes of the event + */ +u32 tcg2_event_get_size(struct tpml_digest_values *digest_list); + +/** + * tcg2_get_active_pcr_banks + * + * @dev TPM device + * @active_pcr_banks Bitmask of PCR algorithms supported + * + * Return: zero on success, negative errno otherwise + */ +int tcg2_get_active_pcr_banks(struct udevice *dev, u32 *active_pcr_banks); + +/** + * tcg2_log_append - Append an event to an event log + * + * @pcr_index Index of the PCR + * @event_type Type of event + * @digest_list List of digests to add + * @size Size of event + * @event Event data + * @log Log buffer to append the event to + */ +void tcg2_log_append(u32 pcr_index, u32 event_type, + struct tpml_digest_values *digest_list, u32 size, + const u8 *event, u8 *log); + +/** + * Extend the PCR with specified digests + * + * @dev TPM device + * @pcr_index Index of the PCR + * @digest_list List of digests to extend + * + * Return: zero on success, negative errno otherwise + */ +int tcg2_pcr_extend(struct udevice *dev, u32 pcr_index, + struct tpml_digest_values *digest_list); + +/** + * Read the PCR into a list of digests + * + * @dev TPM device + * @pcr_index Index of the PCR + * @digest_list List of digests to extend + * + * Return: zero on success, negative errno otherwise + */ +int tcg2_pcr_read(struct udevice *dev, u32 pcr_index, + struct tpml_digest_values *digest_list); + +/** + * Measure data into the TPM PCRs and the platform event log. + * + * @dev TPM device + * @log Platform event log + * @pcr_index Index of the PCR + * @size Size of the data or 0 for event only + * @data Pointer to the data or NULL for event only + * @event_type Event log type + * @event_size Size of the event + * @event Pointer to the event + * + * Return: zero on success, negative errno otherwise + */ +int tcg2_measure_data(struct udevice *dev, struct tcg2_event_log *elog, + u32 pcr_index, u32 size, const u8 *data, u32 event_type, + u32 event_size, const u8 *event); + +#define tcg2_measure_event(dev, elog, pcr_index, event_type, size, event) \ + tcg2_measure_data(dev, elog, pcr_index, 0, NULL, event_type, size, \ + event) + +/** + * Prepare the event log buffer. This function tries to discover an existing + * event log in memory from a previous bootloader stage. If such a log exists + * and the PCRs are not extended, the log is "replayed" to extend the PCRs. + * If no log is discovered, create the log header. + * + * @dev TPM device + * @elog Platform event log. The log pointer and log_size + * members must be initialized to either 0 or to a valid + * memory region, in which case any existing log + * discovered will be copied to the specified memory + * region. + * @ignore_existing_log Boolean to indicate whether or not to ignore an + * existing platform log in memory + * + * Return: zero on success, negative errno otherwise + */ +int tcg2_log_prepare_buffer(struct udevice *dev, struct tcg2_event_log *elog, + bool ignore_existing_log); + +/** + * Begin measurements. + * + * @dev TPM device + * @elog Platform event log. The log pointer and log_size + * members must be initialized to either 0 or to a valid + * memory region, in which case any existing log + * discovered will be copied to the specified memory + * region. + * @ignore_existing_log Boolean to indicate whether or not to ignore an + * existing platform log in memory + * + * Return: zero on success, negative errno otherwise + */ +int tcg2_measurement_init(struct udevice **dev, struct tcg2_event_log *elog, + bool ignore_existing_log); + +/** + * Stop measurements and record separator events. + * + * @dev TPM device + * @elog Platform event log + * @error Boolean to indicate whether an error ocurred or not + */ +void tcg2_measurement_term(struct udevice *dev, struct tcg2_event_log *elog, + bool error); + +/** + * Get the platform event log address and size. + * + * @dev TPM device + * @addr Address of the log + * @size Size of the log + * + * Return: zero on success, negative errno otherwise + */ +int tcg2_platform_get_log(struct udevice *dev, void **addr, u32 *size); + +/** + * Get the first TPM2 device found. + * + * @dev TPM device + * + * Return: zero on success, negative errno otherwise + */ +int tcg2_platform_get_tpm2(struct udevice **dev); + +/** + * Platform-specific function for handling TPM startup errors + * + * @dev TPM device + * @rc The TPM response code + */ +void tcg2_platform_startup_error(struct udevice *dev, int rc); + +/** * Issue a TPM2_Startup command. * * @dev TPM device @@ -541,6 +787,19 @@ u32 tpm2_get_capability(struct udevice *dev, u32 capability, u32 property, void *buf, size_t prop_count); /** + * tpm2_get_pcr_info() - get the supported, active PCRs and number of banks + * + * @dev: TPM device + * @supported_pcr: bitmask with the algorithms supported + * @active_pcr: bitmask with the active algorithms + * @pcr_banks: number of PCR banks + * + * @return 0 on success, code of operation or negative errno on failure + */ +int tpm2_get_pcr_info(struct udevice *dev, u32 *supported_pcr, u32 *active_pcr, + u32 *pcr_banks); + +/** * Issue a TPM2_DictionaryAttackLockReset command. * * @dev TPM device diff --git a/lib/Kconfig b/lib/Kconfig index f6ca559897..19649517a3 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -431,6 +431,10 @@ config TPM bool "Trusted Platform Module (TPM) Support" depends on DM imply DM_RNG + select SHA1 + select SHA256 + select SHA384 + select SHA512 help This enables support for TPMs which can be used to provide security features for your board. The TPM can be connected via LPC or I2C diff --git a/lib/addr_map.c b/lib/addr_map.c index 9b3e0a544e..86e932e4b5 100644 --- a/lib/addr_map.c +++ b/lib/addr_map.c @@ -59,7 +59,7 @@ void *addrmap_phys_to_virt(phys_addr_t paddr) void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr, phys_size_t size, int idx) { - if (idx > CONFIG_SYS_NUM_ADDR_MAP) + if (idx >= CONFIG_SYS_NUM_ADDR_MAP) return; address_map[idx].vaddr = vaddr; diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index d20aaab6db..4ccd26f94a 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -379,8 +379,6 @@ config EFI_TCG2_PROTOCOL bool "EFI_TCG2_PROTOCOL support" default y depends on TPM_V2 - # Sandbox TPM currently fails on GetCapabilities needed for TCG2 - depends on !SANDBOX select SHA1 select SHA256 select SHA384 diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c index 7b7926a0d4..2eaa12b83b 100644 --- a/lib/efi_loader/efi_tcg2.c +++ b/lib/efi_loader/efi_tcg2.c @@ -66,35 +66,6 @@ static bool tcg2_efi_app_invoked; static const efi_guid_t efi_guid_tcg2_protocol = EFI_TCG2_PROTOCOL_GUID; static const efi_guid_t efi_guid_final_events = EFI_TCG2_FINAL_EVENTS_TABLE_GUID; -struct digest_info { - u16 hash_alg; - u32 hash_mask; - u16 hash_len; -}; - -static const struct digest_info hash_algo_list[] = { - { - TPM2_ALG_SHA1, - EFI_TCG2_BOOT_HASH_ALG_SHA1, - TPM2_SHA1_DIGEST_SIZE, - }, - { - TPM2_ALG_SHA256, - EFI_TCG2_BOOT_HASH_ALG_SHA256, - TPM2_SHA256_DIGEST_SIZE, - }, - { - TPM2_ALG_SHA384, - EFI_TCG2_BOOT_HASH_ALG_SHA384, - TPM2_SHA384_DIGEST_SIZE, - }, - { - TPM2_ALG_SHA512, - EFI_TCG2_BOOT_HASH_ALG_SHA512, - TPM2_SHA512_DIGEST_SIZE, - }, -}; - struct variable_info { const u16 *name; bool accept_empty; @@ -113,46 +84,6 @@ static struct variable_info secure_variables[] = { {u"AuditMode", false, 1}, }; -#define MAX_HASH_COUNT ARRAY_SIZE(hash_algo_list) - -/** - * alg_to_mask - Get a TCG hash mask for algorithms - * - * @hash_alg: TCG defined algorithm - * - * @Return: TCG hashing algorithm bitmaps, 0 if the algorithm is not supported - */ -static u32 alg_to_mask(u16 hash_alg) -{ - size_t i; - - for (i = 0; i < MAX_HASH_COUNT; i++) { - if (hash_algo_list[i].hash_alg == hash_alg) - return hash_algo_list[i].hash_mask; - } - - return 0; -} - -/** - * alg_to_len - Get a TCG hash len for algorithms - * - * @hash_alg: TCG defined algorithm - * - * @Return: len of chosen algorithm, 0 if the algorithm is not supported - */ -static u16 alg_to_len(u16 hash_alg) -{ - size_t i; - - for (i = 0; i < MAX_HASH_COUNT; i++) { - if (hash_algo_list[i].hash_alg == hash_alg) - return hash_algo_list[i].hash_len; - } - - return 0; -} - static bool is_tcg2_protocol_installed(void) { struct efi_handler *handler; @@ -162,145 +93,6 @@ static bool is_tcg2_protocol_installed(void) return ret == EFI_SUCCESS; } -static u32 tcg_event_final_size(struct tpml_digest_values *digest_list) -{ - u32 len; - size_t i; - - len = offsetof(struct tcg_pcr_event2, digests); - len += offsetof(struct tpml_digest_values, digests); - for (i = 0; i < digest_list->count; i++) { - u16 hash_alg = digest_list->digests[i].hash_alg; - - len += offsetof(struct tpmt_ha, digest); - len += alg_to_len(hash_alg); - } - len += sizeof(u32); /* tcg_pcr_event2 event_size*/ - - return len; -} - -/* tcg2_pcr_extend - Extend PCRs for a TPM2 device for a given tpml_digest_values - * - * @dev: device - * @digest_list: list of digest algorithms to extend - * - * @Return: status code - */ -static efi_status_t tcg2_pcr_extend(struct udevice *dev, u32 pcr_index, - struct tpml_digest_values *digest_list) -{ - u32 rc; - size_t i; - - for (i = 0; i < digest_list->count; i++) { - u32 alg = digest_list->digests[i].hash_alg; - - rc = tpm2_pcr_extend(dev, pcr_index, alg, - (u8 *)&digest_list->digests[i].digest, - alg_to_len(alg)); - if (rc) { - EFI_PRINT("Failed to extend PCR\n"); - return EFI_DEVICE_ERROR; - } - } - - return EFI_SUCCESS; -} - -/* tcg2_pcr_read - Read PCRs for a TPM2 device for a given tpml_digest_values - * - * @dev: device - * @pcr_index: PCR index - * @digest_list: list of digest algorithms to extend - * - * @Return: status code - */ -static efi_status_t tcg2_pcr_read(struct udevice *dev, u32 pcr_index, - struct tpml_digest_values *digest_list) -{ - struct tpm_chip_priv *priv; - unsigned int updates, pcr_select_min; - u32 rc; - size_t i; - - priv = dev_get_uclass_priv(dev); - if (!priv) - return EFI_DEVICE_ERROR; - - pcr_select_min = priv->pcr_select_min; - - for (i = 0; i < digest_list->count; i++) { - u16 hash_alg = digest_list->digests[i].hash_alg; - u8 *digest = (u8 *)&digest_list->digests[i].digest; - - rc = tpm2_pcr_read(dev, pcr_index, pcr_select_min, - hash_alg, digest, alg_to_len(hash_alg), - &updates); - if (rc) { - EFI_PRINT("Failed to read PCR\n"); - return EFI_DEVICE_ERROR; - } - } - - return EFI_SUCCESS; -} - -/* put_event - Append an agile event to an eventlog - * - * @pcr_index: PCR index - * @event_type: type of event added - * @digest_list: list of digest algorithms to add - * @size: size of event - * @event: event to add - * @log: log buffer to append the event - * - */ -static void put_event(u32 pcr_index, u32 event_type, - struct tpml_digest_values *digest_list, u32 size, - u8 event[], void *log) -{ - size_t pos; - size_t i; - u32 event_size; - - /* - * size refers to the length of event[] only, we need to check against - * the final tcg_pcr_event2 size - */ - event_size = size + tcg_event_final_size(digest_list); - - put_unaligned_le32(pcr_index, log); - pos = offsetof(struct tcg_pcr_event2, event_type); - put_unaligned_le32(event_type, (void *)((uintptr_t)log + pos)); - pos = offsetof(struct tcg_pcr_event2, digests); /* count */ - put_unaligned_le32(digest_list->count, (void *)((uintptr_t)log + pos)); - - pos += offsetof(struct tpml_digest_values, digests); - for (i = 0; i < digest_list->count; i++) { - u16 hash_alg = digest_list->digests[i].hash_alg; - u8 *digest = (u8 *)&digest_list->digests[i].digest; - - put_unaligned_le16(hash_alg, (void *)((uintptr_t)log + pos)); - pos += offsetof(struct tpmt_ha, digest); - memcpy((void *)((uintptr_t)log + pos), digest, alg_to_len(hash_alg)); - pos += alg_to_len(hash_alg); - } - - put_unaligned_le32(size, (void *)((uintptr_t)log + pos)); - pos += sizeof(u32); /* tcg_pcr_event2 event_size*/ - memcpy((void *)((uintptr_t)log + pos), event, size); - pos += size; - - /* - * make sure the calculated buffer is what we checked against - * This check should never fail. It checks the code above is - * calculating the right length for the event we are adding - */ - if (pos != event_size) - log_err("Appending to the EventLog failed\n"); -} - /* tcg2_agile_log_append - Append an agile event to an eventlog * * @pcr_index: PCR index @@ -317,7 +109,7 @@ static efi_status_t tcg2_agile_log_append(u32 pcr_index, u32 event_type, u32 size, u8 event[]) { void *log = (void *)((uintptr_t)event_log.buffer + event_log.pos); - u32 event_size = size + tcg_event_final_size(digest_list); + u32 event_size = size + tcg2_event_get_size(digest_list); struct efi_tcg2_final_events_table *final_event; efi_status_t ret = EFI_SUCCESS; @@ -328,7 +120,7 @@ static efi_status_t tcg2_agile_log_append(u32 pcr_index, u32 event_type, event_log.truncated = true; return EFI_VOLUME_FULL; } - put_event(pcr_index, event_type, digest_list, size, event, log); + tcg2_log_append(pcr_index, event_type, digest_list, size, event, log); event_log.pos += event_size; event_log.last_event_size = event_size; } @@ -341,7 +133,7 @@ static efi_status_t tcg2_agile_log_append(u32 pcr_index, u32 event_type, return EFI_VOLUME_FULL; log = (void *)((uintptr_t)event_log.final_buffer + event_log.final_pos); - put_event(pcr_index, event_type, digest_list, size, event, log); + tcg2_log_append(pcr_index, event_type, digest_list, size, event, log); final_event = event_log.final_buffer; final_event->number_of_events++; @@ -351,66 +143,6 @@ static efi_status_t tcg2_agile_log_append(u32 pcr_index, u32 event_type, } /** - * platform_get_tpm_device() - retrieve TPM device - * - * This function retrieves the udevice implementing a TPM - * - * This function may be overridden if special initialization is needed. - * - * @dev: udevice - * Return: status code - */ -__weak efi_status_t platform_get_tpm2_device(struct udevice **dev) -{ - for_each_tpm_device(*dev) { - /* Only support TPMv2 devices */ - if (tpm_get_version(*dev) == TPM_V2) - return EFI_SUCCESS; - } - - return EFI_NOT_FOUND; -} - -/** - * platform_get_eventlog() - retrieve the eventlog address and size - * - * This function retrieves the eventlog address and size if the underlying - * firmware has done some measurements and passed them. - * - * This function may be overridden based on platform specific method of - * passing the eventlog address and size. - * - * @dev: udevice - * @addr: eventlog address - * @sz: eventlog size - * Return: status code - */ -__weak efi_status_t platform_get_eventlog(struct udevice *dev, u64 *addr, - u32 *sz) -{ - const u64 *basep; - const u32 *sizep; - - basep = dev_read_prop(dev, "tpm_event_log_addr", NULL); - if (!basep) - return EFI_NOT_FOUND; - - *addr = be64_to_cpup((__force __be64 *)basep); - - sizep = dev_read_prop(dev, "tpm_event_log_size", NULL); - if (!sizep) - return EFI_NOT_FOUND; - - *sz = be32_to_cpup((__force __be32 *)sizep); - if (*sz == 0) { - log_debug("event log empty\n"); - return EFI_NOT_FOUND; - } - - return EFI_SUCCESS; -} - -/** * tpm2_get_max_command_size() - get the supported max command size * * @dev: TPM device @@ -486,238 +218,6 @@ static int tpm2_get_manufacturer_id(struct udevice *dev, u32 *manufacturer_id) } /** - * tpm2_get_num_pcr() - get the number of PCRs - * - * @dev: TPM device - * @manufacturer_id: output buffer for the number - * - * Return: 0 on success, -1 on error - */ -static int tpm2_get_num_pcr(struct udevice *dev, u32 *num_pcr) -{ - u8 response[TPM2_RESPONSE_BUFFER_SIZE]; - u32 ret; - - memset(response, 0, sizeof(response)); - ret = tpm2_get_capability(dev, TPM2_CAP_TPM_PROPERTIES, - TPM2_PT_PCR_COUNT, response, 1); - if (ret) - return -1; - - *num_pcr = get_unaligned_be32(response + properties_offset); - if (*num_pcr > TPM2_MAX_PCRS) - return -1; - - return 0; -} - -/** - * is_active_pcr() - Check if a supported algorithm is active - * - * @dev: TPM device - * @selection: struct of PCR information - * - * Return: true if PCR is active - */ -static bool is_active_pcr(struct tpms_pcr_selection *selection) -{ - int i; - /* - * check the pcr_select. If at least one of the PCRs supports the - * algorithm add it on the active ones - */ - for (i = 0; i < selection->size_of_select; i++) { - if (selection->pcr_select[i]) - return true; - } - - return false; -} - -/** - * tpm2_get_pcr_info() - get the supported, active PCRs and number of banks - * - * @dev: TPM device - * @supported_pcr: bitmask with the algorithms supported - * @active_pcr: bitmask with the active algorithms - * @pcr_banks: number of PCR banks - * - * Return: 0 on success, -1 on error - */ -static int tpm2_get_pcr_info(struct udevice *dev, u32 *supported_pcr, - u32 *active_pcr, u32 *pcr_banks) -{ - u8 response[TPM2_RESPONSE_BUFFER_SIZE]; - struct tpml_pcr_selection pcrs; - u32 ret, num_pcr; - size_t i; - int tpm_ret; - - *supported_pcr = 0; - *active_pcr = 0; - *pcr_banks = 0; - memset(response, 0, sizeof(response)); - ret = tpm2_get_capability(dev, TPM2_CAP_PCRS, 0, response, 1); - if (ret) - goto out; - - pcrs.count = get_unaligned_be32(response); - /* - * We only support 5 algorithms for now so check against that - * instead of TPM2_NUM_PCR_BANKS - */ - if (pcrs.count > MAX_HASH_COUNT || pcrs.count < 1) - goto out; - - tpm_ret = tpm2_get_num_pcr(dev, &num_pcr); - if (tpm_ret) - goto out; - - for (i = 0; i < pcrs.count; i++) { - /* - * Definition of TPMS_PCR_SELECTION Structure - * hash: u16 - * size_of_select: u8 - * pcr_select: u8 array - * - * The offsets depend on the number of the device PCRs - * so we have to calculate them based on that - */ - u32 hash_offset = offsetof(struct tpml_pcr_selection, selection) + - i * offsetof(struct tpms_pcr_selection, pcr_select) + - i * ((num_pcr + 7) / 8); - u32 size_select_offset = - hash_offset + offsetof(struct tpms_pcr_selection, - size_of_select); - u32 pcr_select_offset = - hash_offset + offsetof(struct tpms_pcr_selection, - pcr_select); - - pcrs.selection[i].hash = - get_unaligned_be16(response + hash_offset); - pcrs.selection[i].size_of_select = - __get_unaligned_be(response + size_select_offset); - if (pcrs.selection[i].size_of_select > TPM2_PCR_SELECT_MAX) - goto out; - /* copy the array of pcr_select */ - memcpy(pcrs.selection[i].pcr_select, response + pcr_select_offset, - pcrs.selection[i].size_of_select); - } - - for (i = 0; i < pcrs.count; i++) { - u32 hash_mask = alg_to_mask(pcrs.selection[i].hash); - - if (hash_mask) { - *supported_pcr |= hash_mask; - if (is_active_pcr(&pcrs.selection[i])) - *active_pcr |= hash_mask; - } else { - EFI_PRINT("Unknown algorithm %x\n", pcrs.selection[i].hash); - } - } - - *pcr_banks = pcrs.count; - - return 0; -out: - return -1; -} - -/** - * __get_active_pcr_banks() - returns the currently active PCR banks - * - * @active_pcr_banks: pointer for receiving the bitmap of currently - * active PCR banks - * - * Return: status code - */ -static efi_status_t __get_active_pcr_banks(u32 *active_pcr_banks) -{ - struct udevice *dev; - u32 active = 0, supported = 0, pcr_banks = 0; - efi_status_t ret; - int err; - - ret = platform_get_tpm2_device(&dev); - if (ret != EFI_SUCCESS) - goto out; - - err = tpm2_get_pcr_info(dev, &supported, &active, &pcr_banks); - if (err) { - ret = EFI_DEVICE_ERROR; - goto out; - } - - *active_pcr_banks = active; - -out: - return ret; -} - -/* tcg2_create_digest - create a list of digests of the supported PCR banks - * for a given memory range - * - * @input: input memory - * @length: length of buffer to calculate the digest - * @digest_list: list of digests to fill in - * - * Return: status code - */ -static efi_status_t tcg2_create_digest(const u8 *input, u32 length, - struct tpml_digest_values *digest_list) -{ - sha1_context ctx; - sha256_context ctx_256; - sha512_context ctx_512; - u8 final[TPM2_SHA512_DIGEST_SIZE]; - efi_status_t ret; - u32 active; - size_t i; - - ret = __get_active_pcr_banks(&active); - if (ret != EFI_SUCCESS) - return ret; - - digest_list->count = 0; - for (i = 0; i < MAX_HASH_COUNT; i++) { - u16 hash_alg = hash_algo_list[i].hash_alg; - - if (!(active & alg_to_mask(hash_alg))) - continue; - switch (hash_alg) { - case TPM2_ALG_SHA1: - sha1_starts(&ctx); - sha1_update(&ctx, input, length); - sha1_finish(&ctx, final); - break; - case TPM2_ALG_SHA256: - sha256_starts(&ctx_256); - sha256_update(&ctx_256, input, length); - sha256_finish(&ctx_256, final); - break; - case TPM2_ALG_SHA384: - sha384_starts(&ctx_512); - sha384_update(&ctx_512, input, length); - sha384_finish(&ctx_512, final); - break; - case TPM2_ALG_SHA512: - sha512_starts(&ctx_512); - sha512_update(&ctx_512, input, length); - sha512_finish(&ctx_512, final); - break; - default: - continue; - } - digest_list->digests[digest_list->count].hash_alg = hash_alg; - memcpy(&digest_list->digests[digest_list->count].digest, final, - (u32)alg_to_len(hash_alg)); - digest_list->count++; - } - - return EFI_SUCCESS; -} - -/** * efi_tcg2_get_capability() - protocol capability information and state information * * @this: TCG2 protocol instance @@ -758,7 +258,7 @@ efi_tcg2_get_capability(struct efi_tcg2_protocol *this, capability->protocol_version.major = 1; capability->protocol_version.minor = 1; - efi_ret = platform_get_tpm2_device(&dev); + efi_ret = tcg2_platform_get_tpm2(&dev); if (efi_ret != EFI_SUCCESS) { capability->supported_event_logs = 0; capability->hash_algorithm_bitmap = 0; @@ -854,7 +354,7 @@ efi_tcg2_get_eventlog(struct efi_tcg2_protocol *this, goto out; } - ret = platform_get_tpm2_device(&dev); + ret = tcg2_platform_get_tpm2(&dev); if (ret != EFI_SUCCESS) { event_log_location = NULL; event_log_last_entry = NULL; @@ -889,6 +389,7 @@ static efi_status_t tcg2_hash_pe_image(void *efi, u64 efi_size, struct efi_image_regions *regs = NULL; void *new_efi = NULL; u8 hash[TPM2_SHA512_DIGEST_SIZE]; + struct udevice *dev; efi_status_t ret; u32 active; int i; @@ -904,16 +405,20 @@ static efi_status_t tcg2_hash_pe_image(void *efi, u64 efi_size, goto out; } - ret = __get_active_pcr_banks(&active); + ret = tcg2_platform_get_tpm2(&dev); + if (ret != EFI_SUCCESS) + goto out; + + ret = tcg2_get_active_pcr_banks(dev, &active); if (ret != EFI_SUCCESS) { goto out; } digest_list->count = 0; - for (i = 0; i < MAX_HASH_COUNT; i++) { - u16 hash_alg = hash_algo_list[i].hash_alg; + for (i = 0; i < ARRAY_SIZE(tpm2_supported_algorithms); i++) { + u16 hash_alg = tpm2_supported_algorithms[i]; - if (!(active & alg_to_mask(hash_alg))) + if (!(active & tpm2_algorithm_to_mask(hash_alg))) continue; switch (hash_alg) { case TPM2_ALG_SHA1: @@ -933,7 +438,7 @@ static efi_status_t tcg2_hash_pe_image(void *efi, u64 efi_size, } digest_list->digests[digest_list->count].hash_alg = hash_alg; memcpy(&digest_list->digests[digest_list->count].digest, hash, - (u32)alg_to_len(hash_alg)); + (u32)tpm2_algorithm_to_len(hash_alg)); digest_list->count++; } @@ -973,7 +478,7 @@ efi_status_t tcg2_measure_pe_image(void *efi, u64 efi_size, if (!is_tcg2_protocol_installed()) return EFI_SUCCESS; - ret = platform_get_tpm2_device(&dev); + ret = tcg2_platform_get_tpm2(&dev); if (ret != EFI_SUCCESS) return EFI_SECURITY_VIOLATION; @@ -1082,7 +587,7 @@ efi_tcg2_hash_log_extend_event(struct efi_tcg2_protocol *this, u64 flags, goto out; } - ret = platform_get_tpm2_device(&dev); + ret = tcg2_platform_get_tpm2(&dev); if (ret != EFI_SUCCESS) goto out; @@ -1117,7 +622,7 @@ efi_tcg2_hash_log_extend_event(struct efi_tcg2_protocol *this, u64 flags, ret = tcg2_hash_pe_image((void *)(uintptr_t)data_to_hash, data_to_hash_len, &digest_list); } else { - ret = tcg2_create_digest((u8 *)(uintptr_t)data_to_hash, + ret = tcg2_create_digest(dev, (u8 *)(uintptr_t)data_to_hash, data_to_hash_len, &digest_list); } @@ -1180,7 +685,7 @@ efi_tcg2_submit_command(struct efi_tcg2_protocol *this, goto out; } - ret = platform_get_tpm2_device(&dev); + ret = tcg2_platform_get_tpm2(&dev); if (ret != EFI_SUCCESS) goto out; @@ -1209,15 +714,20 @@ static efi_status_t EFIAPI efi_tcg2_get_active_pcr_banks(struct efi_tcg2_protocol *this, u32 *active_pcr_banks) { + struct udevice *dev; efi_status_t ret; + EFI_ENTRY("%p, %p", this, active_pcr_banks); + if (!this || !active_pcr_banks) { ret = EFI_INVALID_PARAMETER; goto out; } + ret = tcg2_platform_get_tpm2(&dev); + if (ret != EFI_SUCCESS) + goto out; - EFI_ENTRY("%p, %p", this, active_pcr_banks); - ret = __get_active_pcr_banks(active_pcr_banks); + ret = tcg2_get_active_pcr_banks(dev, active_pcr_banks); out: return EFI_EXIT(ret); @@ -1269,397 +779,6 @@ static const struct efi_tcg2_protocol efi_tcg2_protocol = { }; /** - * parse_event_log_header() - Parse and verify the event log header fields - * - * @buffer: Pointer to the start of the eventlog - * @size: Size of the eventlog - * @pos: Return offset of the next event in buffer right - * after the event header i.e specID - * - * Return: status code - */ -static efi_status_t parse_event_log_header(void *buffer, u32 size, u32 *pos) -{ - struct tcg_pcr_event *event_header = (struct tcg_pcr_event *)buffer; - int i = 0; - - if (size < sizeof(*event_header)) - return EFI_COMPROMISED_DATA; - - if (get_unaligned_le32(&event_header->pcr_index) != 0 || - get_unaligned_le32(&event_header->event_type) != EV_NO_ACTION) - return EFI_COMPROMISED_DATA; - - for (i = 0; i < sizeof(event_header->digest); i++) { - if (event_header->digest[i]) - return EFI_COMPROMISED_DATA; - } - - *pos += sizeof(*event_header); - - return EFI_SUCCESS; -} - -/** - * parse_specid_event() - Parse and verify the specID Event in the eventlog - * - * @dev: udevice - * @buffer: Pointer to the start of the eventlog - * @log_size: Size of the eventlog - * @pos: [in] Offset of specID event in the eventlog buffer - * [out] Return offset of the next event in the buffer - * after the specID - * @digest_list: list of digests in the event - * - * Return: status code - * @pos Offset in the eventlog where the specID event ends - * @digest_list: list of digests in the event - */ -static efi_status_t parse_specid_event(struct udevice *dev, void *buffer, - u32 log_size, u32 *pos, - struct tpml_digest_values *digest_list) -{ - struct tcg_efi_spec_id_event *spec_event; - struct tcg_pcr_event *event_header = (struct tcg_pcr_event *)buffer; - size_t spec_event_size; - u32 active = 0, supported = 0, pcr_count = 0, alg_count = 0; - u32 spec_active = 0; - u16 hash_alg; - u8 vendor_sz; - int err, i; - - if (*pos >= log_size || (*pos + sizeof(*spec_event)) > log_size) - return EFI_COMPROMISED_DATA; - - /* Check specID event data */ - spec_event = (struct tcg_efi_spec_id_event *)((uintptr_t)buffer + *pos); - /* Check for signature */ - if (memcmp(spec_event->signature, TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03, - sizeof(TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03))) { - log_err("specID Event: Signature mismatch\n"); - return EFI_COMPROMISED_DATA; - } - - if (spec_event->spec_version_minor != - TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MINOR_TPM2 || - spec_event->spec_version_major != - TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MAJOR_TPM2) - return EFI_COMPROMISED_DATA; - - if (spec_event->number_of_algorithms > MAX_HASH_COUNT || - spec_event->number_of_algorithms < 1) { - log_err("specID Event: Number of algorithms incorrect\n"); - return EFI_COMPROMISED_DATA; - } - - alg_count = spec_event->number_of_algorithms; - - err = tpm2_get_pcr_info(dev, &supported, &active, &pcr_count); - if (err) - return EFI_DEVICE_ERROR; - - digest_list->count = 0; - /* - * We have to take care that the sequence of algorithms that we record - * in digest_list matches the sequence in eventlog. - */ - for (i = 0; i < alg_count; i++) { - hash_alg = - get_unaligned_le16(&spec_event->digest_sizes[i].algorithm_id); - - if (!(supported & alg_to_mask(hash_alg))) { - log_err("specID Event: Unsupported algorithm\n"); - return EFI_COMPROMISED_DATA; - } - digest_list->digests[digest_list->count++].hash_alg = hash_alg; - - spec_active |= alg_to_mask(hash_alg); - } - - /* - * TCG specification expects the event log to have hashes for all - * active PCR's - */ - if (spec_active != active) { - /* - * Previous stage bootloader should know all the active PCR's - * and use them in the Eventlog. - */ - log_err("specID Event: All active hash alg not present\n"); - return EFI_COMPROMISED_DATA; - } - - /* - * the size of the spec event and placement of vendor_info_size - * depends on supported algoriths - */ - spec_event_size = - offsetof(struct tcg_efi_spec_id_event, digest_sizes) + - alg_count * sizeof(spec_event->digest_sizes[0]); - - if (*pos + spec_event_size >= log_size) - return EFI_COMPROMISED_DATA; - - vendor_sz = *(uint8_t *)((uintptr_t)buffer + *pos + spec_event_size); - - spec_event_size += sizeof(vendor_sz) + vendor_sz; - *pos += spec_event_size; - - if (get_unaligned_le32(&event_header->event_size) != spec_event_size) { - log_err("specID event: header event size mismatch\n"); - /* Right way to handle this can be to call SetActive PCR's */ - return EFI_COMPROMISED_DATA; - } - - return EFI_SUCCESS; -} - -/** - * tcg2_parse_event() - Parse the event in the eventlog - * - * @dev: udevice - * @buffer: Pointer to the start of the eventlog - * @log_size: Size of the eventlog - * @offset: [in] Offset of the event in the eventlog buffer - * [out] Return offset of the next event in the buffer - * @digest_list: list of digests in the event - * @pcr Index of the PCR in the event - * - * Return: status code - */ -static efi_status_t tcg2_parse_event(struct udevice *dev, void *buffer, - u32 log_size, u32 *offset, - struct tpml_digest_values *digest_list, - u32 *pcr) -{ - struct tcg_pcr_event2 *event = NULL; - u32 count, size, event_size; - size_t pos; - - event_size = tcg_event_final_size(digest_list); - if (*offset >= log_size || *offset + event_size > log_size) { - log_err("Event exceeds log size\n"); - return EFI_COMPROMISED_DATA; - } - - event = (struct tcg_pcr_event2 *)((uintptr_t)buffer + *offset); - *pcr = get_unaligned_le32(&event->pcr_index); - - /* get the count */ - count = get_unaligned_le32(&event->digests.count); - if (count != digest_list->count) - return EFI_COMPROMISED_DATA; - - pos = offsetof(struct tcg_pcr_event2, digests); - pos += offsetof(struct tpml_digest_values, digests); - - for (int i = 0; i < digest_list->count; i++) { - u16 alg; - u16 hash_alg = digest_list->digests[i].hash_alg; - u8 *digest = (u8 *)&digest_list->digests[i].digest; - - alg = get_unaligned_le16((void *)((uintptr_t)event + pos)); - - if (alg != hash_alg) - return EFI_COMPROMISED_DATA; - - pos += offsetof(struct tpmt_ha, digest); - memcpy(digest, (void *)((uintptr_t)event + pos), alg_to_len(hash_alg)); - pos += alg_to_len(hash_alg); - } - - size = get_unaligned_le32((void *)((uintptr_t)event + pos)); - event_size += size; - pos += sizeof(u32); /* tcg_pcr_event2 event_size*/ - pos += size; - - /* make sure the calculated buffer is what we checked against */ - if (pos != event_size) - return EFI_COMPROMISED_DATA; - - if (pos > log_size) - return EFI_COMPROMISED_DATA; - - *offset += pos; - - return EFI_SUCCESS; -} - -/** - * tcg2_get_fw_eventlog() - Get the eventlog address and size - * - * If the previous firmware has passed some eventlog, this function get it's - * location and check for it's validity. - * - * @dev: udevice - * @log_buffer: eventlog address - * @log_sz: eventlog size - * - * Return: status code - */ -static efi_status_t tcg2_get_fw_eventlog(struct udevice *dev, void *log_buffer, - size_t *log_sz) -{ - struct tpml_digest_values digest_list; - void *buffer; - efi_status_t ret; - u32 pcr, pos; - u64 base; - u32 sz; - bool extend_pcr = false; - int i; - - ret = platform_get_eventlog(dev, &base, &sz); - if (ret != EFI_SUCCESS) - return ret; - - if (sz > TPM2_EVENT_LOG_SIZE) - return EFI_VOLUME_FULL; - - buffer = (void *)(uintptr_t)base; - pos = 0; - /* Parse the eventlog to check for its validity */ - ret = parse_event_log_header(buffer, sz, &pos); - if (ret) - return ret; - - ret = parse_specid_event(dev, buffer, sz, &pos, &digest_list); - if (ret) { - log_err("Error parsing SPEC ID Event\n"); - return ret; - } - - ret = tcg2_pcr_read(dev, 0, &digest_list); - if (ret) { - log_err("Error reading PCR 0\n"); - return ret; - } - - /* - * If PCR0 is 0, previous firmware didn't have the capability - * to extend the PCR. In this scenario, extend the PCR as - * the eventlog is parsed. - */ - for (i = 0; i < digest_list.count; i++) { - u8 hash_buf[TPM2_SHA512_DIGEST_SIZE] = { 0 }; - u16 hash_alg = digest_list.digests[i].hash_alg; - - if (!memcmp((u8 *)&digest_list.digests[i].digest, hash_buf, - alg_to_len(hash_alg))) - extend_pcr = true; - } - - while (pos < sz) { - ret = tcg2_parse_event(dev, buffer, sz, &pos, &digest_list, - &pcr); - if (ret) { - log_err("Error parsing event\n"); - return ret; - } - if (extend_pcr) { - ret = tcg2_pcr_extend(dev, pcr, &digest_list); - if (ret != EFI_SUCCESS) { - log_err("Error in extending PCR\n"); - return ret; - } - - /* Clear the digest for next event */ - for (i = 0; i < digest_list.count; i++) { - u16 hash_alg = digest_list.digests[i].hash_alg; - u8 *digest = - (u8 *)&digest_list.digests[i].digest; - - memset(digest, 0, alg_to_len(hash_alg)); - } - } - } - - memcpy(log_buffer, buffer, sz); - *log_sz = sz; - - return ret; -} - -/** - * create_specid_event() - Create the first event in the eventlog - * - * @dev: tpm device - * @event_header: Pointer to the final event header - * @event_size: final spec event size - * - * Return: status code - */ -static efi_status_t create_specid_event(struct udevice *dev, void *buffer, - size_t *event_size) -{ - struct tcg_efi_spec_id_event *spec_event; - size_t spec_event_size; - efi_status_t ret = EFI_DEVICE_ERROR; - u32 active = 0, supported = 0, pcr_count = 0, alg_count = 0; - int err; - size_t i; - - /* - * Create Spec event. This needs to be the first event in the log - * according to the TCG EFI protocol spec - */ - - /* Setup specID event data */ - spec_event = (struct tcg_efi_spec_id_event *)buffer; - memcpy(spec_event->signature, TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03, - sizeof(spec_event->signature)); - put_unaligned_le32(0, &spec_event->platform_class); /* type client */ - spec_event->spec_version_minor = - TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MINOR_TPM2; - spec_event->spec_version_major = - TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MAJOR_TPM2; - spec_event->spec_errata = - TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_ERRATA_TPM2; - spec_event->uintn_size = sizeof(efi_uintn_t) / sizeof(u32); - - err = tpm2_get_pcr_info(dev, &supported, &active, &pcr_count); - - if (err) - goto out; - - for (i = 0; i < pcr_count; i++) { - u16 hash_alg = hash_algo_list[i].hash_alg; - u16 hash_len = hash_algo_list[i].hash_len; - - if (active & alg_to_mask(hash_alg)) { - put_unaligned_le16(hash_alg, - &spec_event->digest_sizes[alg_count].algorithm_id); - put_unaligned_le16(hash_len, - &spec_event->digest_sizes[alg_count].digest_size); - alg_count++; - } - } - - spec_event->number_of_algorithms = alg_count; - if (spec_event->number_of_algorithms > MAX_HASH_COUNT || - spec_event->number_of_algorithms < 1) - goto out; - - /* - * the size of the spec event and placement of vendor_info_size - * depends on supported algoriths - */ - spec_event_size = - offsetof(struct tcg_efi_spec_id_event, digest_sizes) + - spec_event->number_of_algorithms * sizeof(spec_event->digest_sizes[0]); - /* no vendor info for us */ - memset(buffer + spec_event_size, 0, 1); - /* add a byte for vendor_info_size in the spec event */ - spec_event_size += 1; - *event_size = spec_event_size; - - return EFI_SUCCESS; - -out: - return ret; -} - -/** * tcg2_uninit - remove the final event table and free efi memory on failures */ void tcg2_uninit(void) @@ -1720,7 +839,7 @@ out: } /** - * tcg2_measure_event() - common function to add event log and extend PCR + * measure_event() - common function to add event log and extend PCR * * @dev: TPM device * @pcr_index: PCR index @@ -1730,14 +849,13 @@ out: * * Return: status code */ -static efi_status_t -tcg2_measure_event(struct udevice *dev, u32 pcr_index, u32 event_type, - u32 size, u8 event[]) +static efi_status_t measure_event(struct udevice *dev, u32 pcr_index, + u32 event_type, u32 size, u8 event[]) { struct tpml_digest_values digest_list; efi_status_t ret; - ret = tcg2_create_digest(event, size, &digest_list); + ret = tcg2_create_digest(dev, event, size, &digest_list); if (ret != EFI_SUCCESS) goto out; @@ -1764,9 +882,8 @@ static efi_status_t efi_append_scrtm_version(struct udevice *dev) { efi_status_t ret; - ret = tcg2_measure_event(dev, 0, EV_S_CRTM_VERSION, - strlen(version_string) + 1, - (u8 *)version_string); + ret = measure_event(dev, 0, EV_S_CRTM_VERSION, + strlen(version_string) + 1, (u8 *)version_string); return ret; } @@ -1782,12 +899,11 @@ static efi_status_t efi_init_event_log(void) * vendor_info_size is currently set to 0, we need to change the length * and allocate the flexible array member if this changes */ - struct tcg_pcr_event *event_header = NULL; + struct tcg2_event_log elog; struct udevice *dev; - size_t spec_event_size; efi_status_t ret; - ret = platform_get_tpm2_device(&dev); + ret = tcg2_platform_get_tpm2(&dev); if (ret != EFI_SUCCESS) return ret; @@ -1806,7 +922,6 @@ static efi_status_t efi_init_event_log(void) * The log header is defined to be in SHA1 event log entry format. * Setup event header */ - event_header = (struct tcg_pcr_event *)event_log.buffer; event_log.pos = 0; event_log.last_event_size = 0; event_log.get_event_called = false; @@ -1817,34 +932,20 @@ static efi_status_t efi_init_event_log(void) * Check if earlier firmware have passed any eventlog. Different * platforms can use different ways to do so. */ - ret = tcg2_get_fw_eventlog(dev, event_log.buffer, &event_log.pos); + elog.log = event_log.buffer; + elog.log_size = TPM2_EVENT_LOG_SIZE; + ret = tcg2_log_prepare_buffer(dev, &elog, false); + if (ret != EFI_SUCCESS) + goto free_pool; + + event_log.pos = elog.log_position; + /* - * If earlier firmware hasn't passed any eventlog, go ahead and - * create the eventlog header. + * Add SCRTM version to the log if previous firmmware + * doesn't pass an eventlog. */ - if (ret == EFI_NOT_FOUND) { - put_unaligned_le32(0, &event_header->pcr_index); - put_unaligned_le32(EV_NO_ACTION, &event_header->event_type); - memset(&event_header->digest, 0, sizeof(event_header->digest)); - ret = create_specid_event(dev, - (void *)((uintptr_t)event_log.buffer + - sizeof(*event_header)), - &spec_event_size); - if (ret != EFI_SUCCESS) - goto free_pool; - put_unaligned_le32(spec_event_size, &event_header->event_size); - event_log.pos = spec_event_size + sizeof(*event_header); - event_log.last_event_size = event_log.pos; - - /* - * Add SCRTM version to the log if previous firmmware - * doesn't pass an eventlog. - */ + if (!elog.found) ret = efi_append_scrtm_version(dev); - } - - if (ret != EFI_SUCCESS) - goto free_pool; ret = create_final_event(); if (ret != EFI_SUCCESS) @@ -1897,8 +998,8 @@ static efi_status_t tcg2_measure_variable(struct udevice *dev, u32 pcr_index, memcpy((u16 *)event->unicode_name + event->unicode_name_length, data, data_size); } - ret = tcg2_measure_event(dev, pcr_index, event_type, event_size, - (u8 *)event); + ret = measure_event(dev, pcr_index, event_type, event_size, + (u8 *)event); free(event); return ret; } @@ -2009,8 +1110,8 @@ tcg2_measure_smbios(struct udevice *dev, smbios_prepare_measurement(entry, smbios_copy); - ret = tcg2_measure_event(dev, 1, EV_EFI_HANDOFF_TABLES2, event_size, - (u8 *)event); + ret = measure_event(dev, 1, EV_EFI_HANDOFF_TABLES2, event_size, + (u8 *)event); if (ret != EFI_SUCCESS) goto out; @@ -2161,7 +1262,7 @@ tcg2_measure_gpt_data(struct udevice *dev, gpt_e = (gpt_entry *)((u8 *)gpt_e + gpt_h->sizeof_partition_entry); } - ret = tcg2_measure_event(dev, 5, EV_EFI_GPT_EVENT, event_size, (u8 *)event); + ret = measure_event(dev, 5, EV_EFI_GPT_EVENT, event_size, (u8 *)event); out2: free(gpt_h); @@ -2215,7 +1316,7 @@ efi_status_t efi_tcg2_measure_dtb(void *dtb) if (!is_tcg2_protocol_installed()) return EFI_SUCCESS; - ret = platform_get_tpm2_device(&dev); + ret = tcg2_platform_get_tpm2(&dev); if (ret != EFI_SUCCESS) return EFI_SECURITY_VIOLATION; @@ -2240,7 +1341,7 @@ efi_status_t efi_tcg2_measure_dtb(void *dtb) sha256_update(&hash_ctx, (u8 *)dtb + fdt_off_mem_rsvmap(dtb), rsvmap_size); sha256_finish(&hash_ctx, blob->data + blob->blob_description_size); - ret = tcg2_measure_event(dev, 0, EV_POST_CODE, event_size, (u8 *)blob); + ret = measure_event(dev, 0, EV_POST_CODE, event_size, (u8 *)blob); free(blob); return ret; @@ -2265,7 +1366,7 @@ efi_status_t efi_tcg2_measure_efi_app_invocation(struct efi_loaded_image_obj *ha if (tcg2_efi_app_invoked) return EFI_SUCCESS; - ret = platform_get_tpm2_device(&dev); + ret = tcg2_platform_get_tpm2(&dev); if (ret != EFI_SUCCESS) return EFI_SECURITY_VIOLATION; @@ -2273,9 +1374,9 @@ efi_status_t efi_tcg2_measure_efi_app_invocation(struct efi_loaded_image_obj *ha if (ret != EFI_SUCCESS) goto out; - ret = tcg2_measure_event(dev, 4, EV_EFI_ACTION, - strlen(EFI_CALLING_EFI_APPLICATION), - (u8 *)EFI_CALLING_EFI_APPLICATION); + ret = measure_event(dev, 4, EV_EFI_ACTION, + strlen(EFI_CALLING_EFI_APPLICATION), + (u8 *)EFI_CALLING_EFI_APPLICATION); if (ret != EFI_SUCCESS) goto out; @@ -2291,8 +1392,8 @@ efi_status_t efi_tcg2_measure_efi_app_invocation(struct efi_loaded_image_obj *ha goto out; for (pcr_index = 0; pcr_index <= 7; pcr_index++) { - ret = tcg2_measure_event(dev, pcr_index, EV_SEPARATOR, - sizeof(event), (u8 *)&event); + ret = measure_event(dev, pcr_index, EV_SEPARATOR, + sizeof(event), (u8 *)&event); if (ret != EFI_SUCCESS) goto out; } @@ -2315,13 +1416,13 @@ efi_status_t efi_tcg2_measure_efi_app_exit(void) if (!is_tcg2_protocol_installed()) return EFI_SUCCESS; - ret = platform_get_tpm2_device(&dev); + ret = tcg2_platform_get_tpm2(&dev); if (ret != EFI_SUCCESS) return ret; - ret = tcg2_measure_event(dev, 4, EV_EFI_ACTION, - strlen(EFI_RETURNING_FROM_EFI_APPLICATION), - (u8 *)EFI_RETURNING_FROM_EFI_APPLICATION); + ret = measure_event(dev, 4, EV_EFI_ACTION, + strlen(EFI_RETURNING_FROM_EFI_APPLICATION), + (u8 *)EFI_RETURNING_FROM_EFI_APPLICATION); return ret; } @@ -2346,19 +1447,19 @@ efi_tcg2_notify_exit_boot_services(struct efi_event *event, void *context) goto out; } - ret = platform_get_tpm2_device(&dev); + ret = tcg2_platform_get_tpm2(&dev); if (ret != EFI_SUCCESS) goto out; - ret = tcg2_measure_event(dev, 5, EV_EFI_ACTION, - strlen(EFI_EXIT_BOOT_SERVICES_INVOCATION), - (u8 *)EFI_EXIT_BOOT_SERVICES_INVOCATION); + ret = measure_event(dev, 5, EV_EFI_ACTION, + strlen(EFI_EXIT_BOOT_SERVICES_INVOCATION), + (u8 *)EFI_EXIT_BOOT_SERVICES_INVOCATION); if (ret != EFI_SUCCESS) goto out; - ret = tcg2_measure_event(dev, 5, EV_EFI_ACTION, - strlen(EFI_EXIT_BOOT_SERVICES_SUCCEEDED), - (u8 *)EFI_EXIT_BOOT_SERVICES_SUCCEEDED); + ret = measure_event(dev, 5, EV_EFI_ACTION, + strlen(EFI_EXIT_BOOT_SERVICES_SUCCEEDED), + (u8 *)EFI_EXIT_BOOT_SERVICES_SUCCEEDED); out: EFI_EXIT(ret); @@ -2378,19 +1479,19 @@ efi_status_t efi_tcg2_notify_exit_boot_services_failed(void) if (!is_tcg2_protocol_installed()) return EFI_SUCCESS; - ret = platform_get_tpm2_device(&dev); + ret = tcg2_platform_get_tpm2(&dev); if (ret != EFI_SUCCESS) goto out; - ret = tcg2_measure_event(dev, 5, EV_EFI_ACTION, - strlen(EFI_EXIT_BOOT_SERVICES_INVOCATION), - (u8 *)EFI_EXIT_BOOT_SERVICES_INVOCATION); + ret = measure_event(dev, 5, EV_EFI_ACTION, + strlen(EFI_EXIT_BOOT_SERVICES_INVOCATION), + (u8 *)EFI_EXIT_BOOT_SERVICES_INVOCATION); if (ret != EFI_SUCCESS) goto out; - ret = tcg2_measure_event(dev, 5, EV_EFI_ACTION, - strlen(EFI_EXIT_BOOT_SERVICES_FAILED), - (u8 *)EFI_EXIT_BOOT_SERVICES_FAILED); + ret = measure_event(dev, 5, EV_EFI_ACTION, + strlen(EFI_EXIT_BOOT_SERVICES_FAILED), + (u8 *)EFI_EXIT_BOOT_SERVICES_FAILED); out: return ret; @@ -2460,7 +1561,7 @@ efi_status_t efi_tcg2_do_initial_measurement(void) if (!is_tcg2_protocol_installed()) return EFI_SUCCESS; - ret = platform_get_tpm2_device(&dev); + ret = tcg2_platform_get_tpm2(&dev); if (ret != EFI_SUCCESS) return EFI_SECURITY_VIOLATION; @@ -2486,7 +1587,7 @@ efi_status_t efi_tcg2_register(void) struct efi_event *event; u32 err; - ret = platform_get_tpm2_device(&dev); + ret = tcg2_platform_get_tpm2(&dev); if (ret != EFI_SUCCESS) { log_warning("Missing TPMv2 device for EFI_TCG_PROTOCOL\n"); return EFI_SUCCESS; diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c index 9ab5b46df1..bd0fb078dc 100644 --- a/lib/tpm-v2.c +++ b/lib/tpm-v2.c @@ -1,16 +1,705 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * Copyright (c) 2023 Linaro Limited * Copyright (c) 2018 Bootlin * Author: Miquel Raynal <miquel.raynal@bootlin.com> */ #include <common.h> #include <dm.h> +#include <dm/of_access.h> +#include <tpm_api.h> #include <tpm-common.h> #include <tpm-v2.h> +#include <u-boot/sha1.h> +#include <u-boot/sha256.h> +#include <u-boot/sha512.h> +#include <version_string.h> +#include <asm/io.h> #include <linux/bitops.h> +#include <linux/unaligned/be_byteshift.h> +#include <linux/unaligned/generic.h> +#include <linux/unaligned/le_byteshift.h> + #include "tpm-utils.h" +const enum tpm2_algorithms tpm2_supported_algorithms[4] = { + TPM2_ALG_SHA1, + TPM2_ALG_SHA256, + TPM2_ALG_SHA384, + TPM2_ALG_SHA512, +}; + +int tcg2_get_active_pcr_banks(struct udevice *dev, u32 *active_pcr_banks) +{ + u32 supported = 0; + u32 pcr_banks = 0; + u32 active = 0; + int rc; + + rc = tpm2_get_pcr_info(dev, &supported, &active, &pcr_banks); + if (rc) + return rc; + + *active_pcr_banks = active; + + return 0; +} + +u32 tcg2_event_get_size(struct tpml_digest_values *digest_list) +{ + u32 len; + size_t i; + + len = offsetof(struct tcg_pcr_event2, digests); + len += offsetof(struct tpml_digest_values, digests); + for (i = 0; i < digest_list->count; ++i) { + u16 l = tpm2_algorithm_to_len(digest_list->digests[i].hash_alg); + + if (!l) + continue; + + len += l + offsetof(struct tpmt_ha, digest); + } + len += sizeof(u32); + + return len; +} + +int tcg2_create_digest(struct udevice *dev, const u8 *input, u32 length, + struct tpml_digest_values *digest_list) +{ + u8 final[sizeof(union tpmu_ha)]; + sha256_context ctx_256; + sha512_context ctx_512; + sha1_context ctx; + u32 active; + size_t i; + u32 len; + int rc; + + rc = tcg2_get_active_pcr_banks(dev, &active); + if (rc) + return rc; + + digest_list->count = 0; + for (i = 0; i < ARRAY_SIZE(tpm2_supported_algorithms); ++i) { + u32 mask = + tpm2_algorithm_to_mask(tpm2_supported_algorithms[i]); + + if (!(active & mask)) + continue; + + switch (tpm2_supported_algorithms[i]) { + case TPM2_ALG_SHA1: + sha1_starts(&ctx); + sha1_update(&ctx, input, length); + sha1_finish(&ctx, final); + len = TPM2_SHA1_DIGEST_SIZE; + break; + case TPM2_ALG_SHA256: + sha256_starts(&ctx_256); + sha256_update(&ctx_256, input, length); + sha256_finish(&ctx_256, final); + len = TPM2_SHA256_DIGEST_SIZE; + break; + case TPM2_ALG_SHA384: + sha384_starts(&ctx_512); + sha384_update(&ctx_512, input, length); + sha384_finish(&ctx_512, final); + len = TPM2_SHA384_DIGEST_SIZE; + break; + case TPM2_ALG_SHA512: + sha512_starts(&ctx_512); + sha512_update(&ctx_512, input, length); + sha512_finish(&ctx_512, final); + len = TPM2_SHA512_DIGEST_SIZE; + break; + default: + printf("%s: unsupported algorithm %x\n", __func__, + tpm2_supported_algorithms[i]); + continue; + } + + digest_list->digests[digest_list->count].hash_alg = + tpm2_supported_algorithms[i]; + memcpy(&digest_list->digests[digest_list->count].digest, final, + len); + digest_list->count++; + } + + return 0; +} + +void tcg2_log_append(u32 pcr_index, u32 event_type, + struct tpml_digest_values *digest_list, u32 size, + const u8 *event, u8 *log) +{ + size_t len; + size_t pos; + u32 i; + + pos = offsetof(struct tcg_pcr_event2, pcr_index); + put_unaligned_le32(pcr_index, log); + pos = offsetof(struct tcg_pcr_event2, event_type); + put_unaligned_le32(event_type, log + pos); + pos = offsetof(struct tcg_pcr_event2, digests) + + offsetof(struct tpml_digest_values, count); + put_unaligned_le32(digest_list->count, log + pos); + + pos = offsetof(struct tcg_pcr_event2, digests) + + offsetof(struct tpml_digest_values, digests); + for (i = 0; i < digest_list->count; ++i) { + u16 hash_alg = digest_list->digests[i].hash_alg; + + len = tpm2_algorithm_to_len(hash_alg); + if (!len) + continue; + + pos += offsetof(struct tpmt_ha, hash_alg); + put_unaligned_le16(hash_alg, log + pos); + pos += offsetof(struct tpmt_ha, digest); + memcpy(log + pos, (u8 *)&digest_list->digests[i].digest, len); + pos += len; + } + + put_unaligned_le32(size, log + pos); + pos += sizeof(u32); + memcpy(log + pos, event, size); +} + +static int tcg2_log_append_check(struct tcg2_event_log *elog, u32 pcr_index, + u32 event_type, + struct tpml_digest_values *digest_list, + u32 size, const u8 *event) +{ + u32 event_size; + u8 *log; + + event_size = size + tcg2_event_get_size(digest_list); + if (elog->log_position + event_size > elog->log_size) { + printf("%s: log too large: %u + %u > %u\n", __func__, + elog->log_position, event_size, elog->log_size); + return -ENOBUFS; + } + + log = elog->log + elog->log_position; + elog->log_position += event_size; + + tcg2_log_append(pcr_index, event_type, digest_list, size, event, log); + + return 0; +} + +static int tcg2_log_init(struct udevice *dev, struct tcg2_event_log *elog) +{ + struct tcg_efi_spec_id_event *ev; + struct tcg_pcr_event *log; + u32 event_size; + u32 count = 0; + u32 log_size; + u32 active; + u32 mask; + size_t i; + u16 len; + int rc; + + rc = tcg2_get_active_pcr_banks(dev, &active); + if (rc) + return rc; + + event_size = offsetof(struct tcg_efi_spec_id_event, digest_sizes); + for (i = 0; i < ARRAY_SIZE(tpm2_supported_algorithms); ++i) { + mask = tpm2_algorithm_to_mask(tpm2_supported_algorithms[i]); + + if (!(active & mask)) + continue; + + switch (tpm2_supported_algorithms[i]) { + case TPM2_ALG_SHA1: + case TPM2_ALG_SHA256: + case TPM2_ALG_SHA384: + case TPM2_ALG_SHA512: + count++; + break; + default: + continue; + } + } + + event_size += 1 + + (sizeof(struct tcg_efi_spec_id_event_algorithm_size) * count); + log_size = offsetof(struct tcg_pcr_event, event) + event_size; + + if (log_size > elog->log_size) { + printf("%s: log too large: %u > %u\n", __func__, log_size, + elog->log_size); + return -ENOBUFS; + } + + log = (struct tcg_pcr_event *)elog->log; + put_unaligned_le32(0, &log->pcr_index); + put_unaligned_le32(EV_NO_ACTION, &log->event_type); + memset(&log->digest, 0, sizeof(log->digest)); + put_unaligned_le32(event_size, &log->event_size); + + ev = (struct tcg_efi_spec_id_event *)log->event; + strlcpy((char *)ev->signature, TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03, + sizeof(ev->signature)); + put_unaligned_le32(0, &ev->platform_class); + ev->spec_version_minor = TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MINOR_TPM2; + ev->spec_version_major = TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MAJOR_TPM2; + ev->spec_errata = TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_ERRATA_TPM2; + ev->uintn_size = sizeof(size_t) / sizeof(u32); + put_unaligned_le32(count, &ev->number_of_algorithms); + + count = 0; + for (i = 0; i < ARRAY_SIZE(tpm2_supported_algorithms); ++i) { + mask = tpm2_algorithm_to_mask(tpm2_supported_algorithms[i]); + + if (!(active & mask)) + continue; + + len = tpm2_algorithm_to_len(tpm2_supported_algorithms[i]); + if (!len) + continue; + + put_unaligned_le16(tpm2_supported_algorithms[i], + &ev->digest_sizes[count].algorithm_id); + put_unaligned_le16(len, &ev->digest_sizes[count].digest_size); + count++; + } + + *((u8 *)ev + (event_size - 1)) = 0; + elog->log_position = log_size; + + return 0; +} + +static int tcg2_replay_eventlog(struct tcg2_event_log *elog, + struct udevice *dev, + struct tpml_digest_values *digest_list, + u32 log_position) +{ + const u32 offset = offsetof(struct tcg_pcr_event2, digests) + + offsetof(struct tpml_digest_values, digests); + u32 event_size; + u32 count; + u16 algo; + u32 pcr; + u32 pos; + u16 len; + u8 *log; + int rc; + u32 i; + + while (log_position + offset < elog->log_size) { + log = elog->log + log_position; + + pos = offsetof(struct tcg_pcr_event2, pcr_index); + pcr = get_unaligned_le32(log + pos); + pos = offsetof(struct tcg_pcr_event2, event_type); + if (!get_unaligned_le32(log + pos)) + return 0; + + pos = offsetof(struct tcg_pcr_event2, digests) + + offsetof(struct tpml_digest_values, count); + count = get_unaligned_le32(log + pos); + if (count > ARRAY_SIZE(tpm2_supported_algorithms) || + (digest_list->count && digest_list->count != count)) + return 0; + + pos = offsetof(struct tcg_pcr_event2, digests) + + offsetof(struct tpml_digest_values, digests); + for (i = 0; i < count; ++i) { + pos += offsetof(struct tpmt_ha, hash_alg); + if (log_position + pos + sizeof(u16) >= elog->log_size) + return 0; + + algo = get_unaligned_le16(log + pos); + pos += offsetof(struct tpmt_ha, digest); + switch (algo) { + case TPM2_ALG_SHA1: + case TPM2_ALG_SHA256: + case TPM2_ALG_SHA384: + case TPM2_ALG_SHA512: + len = tpm2_algorithm_to_len(algo); + break; + default: + return 0; + } + + if (digest_list->count) { + if (algo != digest_list->digests[i].hash_alg || + log_position + pos + len >= elog->log_size) + return 0; + + memcpy(digest_list->digests[i].digest.sha512, + log + pos, len); + } + + pos += len; + } + + if (log_position + pos + sizeof(u32) >= elog->log_size) + return 0; + + event_size = get_unaligned_le32(log + pos); + pos += event_size + sizeof(u32); + if (log_position + pos > elog->log_size) + return 0; + + if (digest_list->count) { + rc = tcg2_pcr_extend(dev, pcr, digest_list); + if (rc) + return rc; + } + + log_position += pos; + } + + elog->log_position = log_position; + elog->found = true; + return 0; +} + +static int tcg2_log_parse(struct udevice *dev, struct tcg2_event_log *elog) +{ + struct tpml_digest_values digest_list; + struct tcg_efi_spec_id_event *event; + struct tcg_pcr_event *log; + u32 log_active; + u32 calc_size; + u32 active; + u32 count; + u32 evsz; + u32 mask; + u16 algo; + u16 len; + int rc; + u32 i; + u16 j; + + if (elog->log_size <= offsetof(struct tcg_pcr_event, event)) + return 0; + + log = (struct tcg_pcr_event *)elog->log; + if (get_unaligned_le32(&log->pcr_index) != 0 || + get_unaligned_le32(&log->event_type) != EV_NO_ACTION) + return 0; + + for (i = 0; i < sizeof(log->digest); i++) { + if (log->digest[i]) + return 0; + } + + evsz = get_unaligned_le32(&log->event_size); + if (evsz < offsetof(struct tcg_efi_spec_id_event, digest_sizes) || + evsz + offsetof(struct tcg_pcr_event, event) > elog->log_size) + return 0; + + event = (struct tcg_efi_spec_id_event *)log->event; + if (memcmp(event->signature, TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03, + sizeof(TCG_EFI_SPEC_ID_EVENT_SIGNATURE_03))) + return 0; + + if (event->spec_version_minor != TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MINOR_TPM2 || + event->spec_version_major != TCG_EFI_SPEC_ID_EVENT_SPEC_VERSION_MAJOR_TPM2) + return 0; + + count = get_unaligned_le32(&event->number_of_algorithms); + if (count > ARRAY_SIZE(tpm2_supported_algorithms)) + return 0; + + calc_size = offsetof(struct tcg_efi_spec_id_event, digest_sizes) + + (sizeof(struct tcg_efi_spec_id_event_algorithm_size) * count) + + 1; + if (evsz != calc_size) + return 0; + + rc = tcg2_get_active_pcr_banks(dev, &active); + if (rc) + return rc; + + digest_list.count = 0; + log_active = 0; + + for (i = 0; i < count; ++i) { + algo = get_unaligned_le16(&event->digest_sizes[i].algorithm_id); + mask = tpm2_algorithm_to_mask(algo); + + if (!(active & mask)) + return 0; + + switch (algo) { + case TPM2_ALG_SHA1: + case TPM2_ALG_SHA256: + case TPM2_ALG_SHA384: + case TPM2_ALG_SHA512: + len = get_unaligned_le16(&event->digest_sizes[i].digest_size); + if (tpm2_algorithm_to_len(algo) != len) + return 0; + digest_list.digests[digest_list.count++].hash_alg = algo; + break; + default: + return 0; + } + + log_active |= mask; + } + + /* Ensure the previous firmware extended all the PCRs. */ + if (log_active != active) + return 0; + + /* Read PCR0 to check if previous firmware extended the PCRs or not. */ + rc = tcg2_pcr_read(dev, 0, &digest_list); + if (rc) + return rc; + + for (i = 0; i < digest_list.count; ++i) { + len = tpm2_algorithm_to_len(digest_list.digests[i].hash_alg); + for (j = 0; j < len; ++j) { + if (digest_list.digests[i].digest.sha512[j]) + break; + } + + /* PCR is non-zero; it has been extended, so skip extending. */ + if (j != len) { + digest_list.count = 0; + break; + } + } + + return tcg2_replay_eventlog(elog, dev, &digest_list, + offsetof(struct tcg_pcr_event, event) + + evsz); +} + +int tcg2_pcr_extend(struct udevice *dev, u32 pcr_index, + struct tpml_digest_values *digest_list) +{ + u32 rc; + u32 i; + + for (i = 0; i < digest_list->count; i++) { + u32 alg = digest_list->digests[i].hash_alg; + + rc = tpm2_pcr_extend(dev, pcr_index, alg, + (u8 *)&digest_list->digests[i].digest, + tpm2_algorithm_to_len(alg)); + if (rc) { + printf("%s: error pcr:%u alg:%08x\n", __func__, + pcr_index, alg); + return rc; + } + } + + return 0; +} + +int tcg2_pcr_read(struct udevice *dev, u32 pcr_index, + struct tpml_digest_values *digest_list) +{ + struct tpm_chip_priv *priv; + u32 rc; + u32 i; + + priv = dev_get_uclass_priv(dev); + if (!priv) + return -ENODEV; + + for (i = 0; i < digest_list->count; i++) { + u32 alg = digest_list->digests[i].hash_alg; + u8 *digest = (u8 *)&digest_list->digests[i].digest; + + rc = tpm2_pcr_read(dev, pcr_index, priv->pcr_select_min, alg, + digest, tpm2_algorithm_to_len(alg), NULL); + if (rc) { + printf("%s: error pcr:%u alg:%08x\n", __func__, + pcr_index, alg); + return rc; + } + } + + return 0; +} + +int tcg2_measure_data(struct udevice *dev, struct tcg2_event_log *elog, + u32 pcr_index, u32 size, const u8 *data, u32 event_type, + u32 event_size, const u8 *event) +{ + struct tpml_digest_values digest_list; + int rc; + + if (data) + rc = tcg2_create_digest(dev, data, size, &digest_list); + else + rc = tcg2_create_digest(dev, event, event_size, &digest_list); + if (rc) + return rc; + + rc = tcg2_pcr_extend(dev, pcr_index, &digest_list); + if (rc) + return rc; + + return tcg2_log_append_check(elog, pcr_index, event_type, &digest_list, + event_size, event); +} + +int tcg2_log_prepare_buffer(struct udevice *dev, struct tcg2_event_log *elog, + bool ignore_existing_log) +{ + struct tcg2_event_log log; + int rc; + + elog->log_position = 0; + elog->found = false; + + rc = tcg2_platform_get_log(dev, (void **)&log.log, &log.log_size); + if (!rc) { + log.log_position = 0; + log.found = false; + + if (!ignore_existing_log) { + rc = tcg2_log_parse(dev, &log); + if (rc) + return rc; + } + + if (elog->log_size) { + if (log.found) { + if (elog->log_size < log.log_position) + return -ENOSPC; + + /* + * Copy the discovered log into the user buffer + * if there's enough space. + */ + memcpy(elog->log, log.log, log.log_position); + } + + unmap_physmem(log.log, MAP_NOCACHE); + } else { + elog->log = log.log; + elog->log_size = log.log_size; + } + + elog->log_position = log.log_position; + elog->found = log.found; + } + + /* + * Initialize the log buffer if no log was discovered and the buffer is + * valid. User's can pass in their own buffer as a fallback if no + * memory region is found. + */ + if (!elog->found && elog->log_size) + rc = tcg2_log_init(dev, elog); + + return rc; +} + +int tcg2_measurement_init(struct udevice **dev, struct tcg2_event_log *elog, + bool ignore_existing_log) +{ + int rc; + + rc = tcg2_platform_get_tpm2(dev); + if (rc) + return rc; + + rc = tpm_auto_start(*dev); + if (rc) + return rc; + + rc = tcg2_log_prepare_buffer(*dev, elog, ignore_existing_log); + if (rc) { + tcg2_measurement_term(*dev, elog, true); + return rc; + } + + rc = tcg2_measure_event(*dev, elog, 0, EV_S_CRTM_VERSION, + strlen(version_string) + 1, + (u8 *)version_string); + if (rc) { + tcg2_measurement_term(*dev, elog, true); + return rc; + } + + return 0; +} + +void tcg2_measurement_term(struct udevice *dev, struct tcg2_event_log *elog, + bool error) +{ + u32 event = error ? 0x1 : 0xffffffff; + int i; + + for (i = 0; i < 8; ++i) + tcg2_measure_event(dev, elog, i, EV_SEPARATOR, sizeof(event), + (const u8 *)&event); + + if (elog->log) + unmap_physmem(elog->log, MAP_NOCACHE); +} + +__weak int tcg2_platform_get_log(struct udevice *dev, void **addr, u32 *size) +{ + const __be32 *addr_prop; + const __be32 *size_prop; + int asize; + int ssize; + + *addr = NULL; + *size = 0; + + addr_prop = dev_read_prop(dev, "tpm_event_log_addr", &asize); + if (!addr_prop) + addr_prop = dev_read_prop(dev, "linux,sml-base", &asize); + + size_prop = dev_read_prop(dev, "tpm_event_log_size", &ssize); + if (!size_prop) + size_prop = dev_read_prop(dev, "linux,sml-size", &ssize); + + if (addr_prop && size_prop) { + u64 a = of_read_number(addr_prop, asize / sizeof(__be32)); + u64 s = of_read_number(size_prop, ssize / sizeof(__be32)); + + *addr = map_physmem(a, s, MAP_NOCACHE); + *size = (u32)s; + } else { + struct ofnode_phandle_args args; + phys_addr_t a; + fdt_size_t s; + + if (dev_read_phandle_with_args(dev, "memory-region", NULL, 0, + 0, &args)) + return -ENODEV; + + a = ofnode_get_addr_size(args.node, "reg", &s); + if (a == FDT_ADDR_T_NONE) + return -ENOMEM; + + *addr = map_physmem(a, s, MAP_NOCACHE); + *size = (u32)s; + } + + return 0; +} + +__weak int tcg2_platform_get_tpm2(struct udevice **dev) +{ + for_each_tpm_device(*dev) { + if (tpm_get_version(*dev) == TPM_V2) + return 0; + } + + return -ENODEV; +} + +__weak void tcg2_platform_startup_error(struct udevice *dev, int rc) {} + u32 tpm2_startup(struct udevice *dev, enum tpm2_startup_types mode) { const u8 command_v2[12] = { @@ -359,6 +1048,131 @@ u32 tpm2_get_capability(struct udevice *dev, u32 capability, u32 property, return 0; } +static int tpm2_get_num_pcr(struct udevice *dev, u32 *num_pcr) +{ + u8 response[(sizeof(struct tpms_capability_data) - + offsetof(struct tpms_capability_data, data))]; + u32 properties_offset = + offsetof(struct tpml_tagged_tpm_property, tpm_property) + + offsetof(struct tpms_tagged_property, value); + u32 ret; + + memset(response, 0, sizeof(response)); + ret = tpm2_get_capability(dev, TPM2_CAP_TPM_PROPERTIES, + TPM2_PT_PCR_COUNT, response, 1); + if (ret) + return ret; + + *num_pcr = get_unaligned_be32(response + properties_offset); + if (*num_pcr > TPM2_MAX_PCRS) { + printf("%s: too many pcrs: %u\n", __func__, *num_pcr); + return -E2BIG; + } + + return 0; +} + +static bool tpm2_is_active_pcr(struct tpms_pcr_selection *selection) +{ + int i; + + /* + * check the pcr_select. If at least one of the PCRs supports the + * algorithm add it on the active ones + */ + for (i = 0; i < selection->size_of_select; i++) { + if (selection->pcr_select[i]) + return true; + } + + return false; +} + +int tpm2_get_pcr_info(struct udevice *dev, u32 *supported_pcr, u32 *active_pcr, + u32 *pcr_banks) +{ + u8 response[(sizeof(struct tpms_capability_data) - + offsetof(struct tpms_capability_data, data))]; + struct tpml_pcr_selection pcrs; + u32 num_pcr; + size_t i; + u32 ret; + + *supported_pcr = 0; + *active_pcr = 0; + *pcr_banks = 0; + memset(response, 0, sizeof(response)); + ret = tpm2_get_capability(dev, TPM2_CAP_PCRS, 0, response, 1); + if (ret) + return ret; + + pcrs.count = get_unaligned_be32(response); + /* + * We only support 5 algorithms for now so check against that + * instead of TPM2_NUM_PCR_BANKS + */ + if (pcrs.count > ARRAY_SIZE(tpm2_supported_algorithms) || + pcrs.count < 1) { + printf("%s: too many pcrs: %u\n", __func__, pcrs.count); + return -EMSGSIZE; + } + + ret = tpm2_get_num_pcr(dev, &num_pcr); + if (ret) + return ret; + + for (i = 0; i < pcrs.count; i++) { + /* + * Definition of TPMS_PCR_SELECTION Structure + * hash: u16 + * size_of_select: u8 + * pcr_select: u8 array + * + * The offsets depend on the number of the device PCRs + * so we have to calculate them based on that + */ + u32 hash_offset = offsetof(struct tpml_pcr_selection, selection) + + i * offsetof(struct tpms_pcr_selection, pcr_select) + + i * ((num_pcr + 7) / 8); + u32 size_select_offset = + hash_offset + offsetof(struct tpms_pcr_selection, + size_of_select); + u32 pcr_select_offset = + hash_offset + offsetof(struct tpms_pcr_selection, + pcr_select); + + pcrs.selection[i].hash = + get_unaligned_be16(response + hash_offset); + pcrs.selection[i].size_of_select = + __get_unaligned_be(response + size_select_offset); + if (pcrs.selection[i].size_of_select > TPM2_PCR_SELECT_MAX) { + printf("%s: pcrs selection too large: %u\n", __func__, + pcrs.selection[i].size_of_select); + return -ENOBUFS; + } + /* copy the array of pcr_select */ + memcpy(pcrs.selection[i].pcr_select, response + pcr_select_offset, + pcrs.selection[i].size_of_select); + } + + for (i = 0; i < pcrs.count; i++) { + u32 hash_mask = tpm2_algorithm_to_mask(pcrs.selection[i].hash); + + if (hash_mask) { + *supported_pcr |= hash_mask; + if (tpm2_is_active_pcr(&pcrs.selection[i])) + *active_pcr |= hash_mask; + } else { + printf("%s: unknown algorithm %x\n", __func__, + pcrs.selection[i].hash); + } + } + + *pcr_banks = pcrs.count; + + return 0; +} + u32 tpm2_dam_reset(struct udevice *dev, const char *pw, const ssize_t pw_sz) { u8 command_v2[COMMAND_BUFFER_SIZE] = { diff --git a/scripts/get_maintainer.pl b/scripts/get_maintainer.pl index 81116e215e..6c58578e98 100755 --- a/scripts/get_maintainer.pl +++ b/scripts/get_maintainer.pl @@ -981,6 +981,7 @@ sub get_maintainers { } foreach my $email (@file_emails) { + $email = mailmap_email($email); my ($name, $address) = parse_email($email); my $tmp_email = format_email($name, $address, $email_usename); @@ -1718,7 +1719,7 @@ sub vcs_exists { %VCS_cmds = %VCS_cmds_hg; return 2 if eval $VCS_cmds{"available"}; %VCS_cmds = (); - if (!$printed_novcs) { + if (!$printed_novcs && $email_git) { warn("$P: No supported VCS found. Add --nogit to options?\n"); warn("Using a git repository produces better results.\n"); warn("Try Linus Torvalds' latest git repository using:\n"); diff --git a/test/boot/Makefile b/test/boot/Makefile index 52947580ae..068522cb9e 100644 --- a/test/boot/Makefile +++ b/test/boot/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_BOOTSTD) += bootdev.o bootstd_common.o bootflow.o bootmeth.o obj-$(CONFIG_FIT) += image.o +obj-$(CONFIG_MEASURED_BOOT) += measurement.o obj-$(CONFIG_EXPO) += expo.o obj-$(CONFIG_CEDIT) += cedit.o diff --git a/test/boot/bootflow.c b/test/boot/bootflow.c index f5b2059140..f640db8a24 100644 --- a/test/boot/bootflow.c +++ b/test/boot/bootflow.c @@ -973,6 +973,26 @@ static int bootflow_cmdline(struct unit_test_state *uts) } BOOTSTD_TEST(bootflow_cmdline, 0); +/* test a few special changes to a long command line */ +static int bootflow_cmdline_special(struct unit_test_state *uts) +{ + char buf[500]; + int pos; + + /* + * check handling of an argument which has an embedded '=', as well as + * handling of a argument which partially matches ("ro" and "root") + */ + ut_asserteq(32, cmdline_set_arg( + buf, sizeof(buf), + "loglevel=7 root=PARTUUID=d68352e3 rootwait ro noinitrd", + "root", NULL, &pos)); + ut_asserteq_str("loglevel=7 rootwait ro noinitrd", buf); + + return 0; +} +BOOTSTD_TEST(bootflow_cmdline_special, 0); + /* Test ChromiumOS bootmeth */ static int bootflow_cros(struct unit_test_state *uts) { diff --git a/test/boot/measurement.c b/test/boot/measurement.c new file mode 100644 index 0000000000..9db2ed324c --- /dev/null +++ b/test/boot/measurement.c @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Test for measured boot functions + * + * Copyright 2023 IBM Corp. + * Written by Eddie James <eajames@linux.ibm.com> + */ + +#include <common.h> +#include <bootm.h> +#include <malloc.h> +#include <test/suites.h> +#include <test/test.h> +#include <test/ut.h> +#include <asm/io.h> + +#define MEASUREMENT_TEST(_name, _flags) \ + UNIT_TEST(_name, _flags, measurement_test) + +static int measure(struct unit_test_state *uts) +{ + struct bootm_headers images; + const size_t size = 1024; + u8 *kernel; + u8 *initrd; + size_t i; + + kernel = malloc(size); + initrd = malloc(size); + + images.os.image_start = map_to_sysmem(kernel); + images.os.image_len = size; + + images.rd_start = map_to_sysmem(initrd); + images.rd_end = images.rd_start + size; + + images.ft_addr = malloc(size); + images.ft_len = size; + + env_set("bootargs", "measurement testing"); + + for (i = 0; i < size; ++i) { + kernel[i] = 0xf0 | (i & 0xf); + initrd[i] = (i & 0xf0) | 0xf; + images.ft_addr[i] = i & 0xff; + } + + ut_assertok(bootm_measure(&images)); + + free(images.ft_addr); + free(initrd); + free(kernel); + + return 0; +} +MEASUREMENT_TEST(measure, 0); + +int do_ut_measurement(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + struct unit_test *tests = UNIT_TEST_SUITE_START(measurement_test); + const int n_ents = UNIT_TEST_SUITE_COUNT(measurement_test); + + return cmd_ut_category("measurement", "measurement_test_", tests, + n_ents, argc, argv); +} diff --git a/test/cmd_ut.c b/test/cmd_ut.c index 0343d47217..2d5b80f992 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -103,6 +103,10 @@ static struct cmd_tbl cmd_ut_sub[] = { #if CONFIG_IS_ENABLED(UT_UNICODE) && !defined(API_BUILD) U_BOOT_CMD_MKENT(unicode, CONFIG_SYS_MAXARGS, 1, do_ut_unicode, "", ""), #endif +#ifdef CONFIG_MEASURED_BOOT + U_BOOT_CMD_MKENT(measurement, CONFIG_SYS_MAXARGS, 1, do_ut_measurement, + "", ""), +#endif #ifdef CONFIG_SANDBOX U_BOOT_CMD_MKENT(compression, CONFIG_SYS_MAXARGS, 1, do_ut_compression, "", ""), diff --git a/test/py/tests/test_tpm2.py b/test/py/tests/test_tpm2.py index c2579fa02c..1d654cd4a2 100644 --- a/test/py/tests/test_tpm2.py +++ b/test/py/tests/test_tpm2.py @@ -61,7 +61,7 @@ def test_tpm2_init(u_boot_console): skip_test = u_boot_console.config.env.get('env__tpm_device_test_skip', False) if skip_test: pytest.skip('skip TPM device test') - u_boot_console.run_command('tpm2 init') + u_boot_console.run_command('tpm2 autostart') output = u_boot_console.run_command('echo $?') assert output.endswith('0') @@ -100,7 +100,7 @@ def test_tpm2_sandbox_self_test_full(u_boot_console): """ if is_sandbox(u_boot_console): u_boot_console.restart_uboot() - u_boot_console.run_command('tpm2 init') + u_boot_console.run_command('tpm2 autostart') output = u_boot_console.run_command('echo $?') assert output.endswith('0') @@ -239,7 +239,7 @@ def test_tpm2_dam_parameters(u_boot_console): def test_tpm2_pcr_read(u_boot_console): """Execute a TPM2_PCR_Read command. - Perform a PCR read of the 0th PCR. Must be zero. + Perform a PCR read of the 10th PCR. Must be zero. """ if is_sandbox(u_boot_console): tpm2_sandbox_init(u_boot_console) @@ -247,7 +247,7 @@ def test_tpm2_pcr_read(u_boot_console): force_init(u_boot_console) ram = u_boot_utils.find_ram_base(u_boot_console) - read_pcr = u_boot_console.run_command('tpm2 pcr_read 0 0x%x' % ram) + read_pcr = u_boot_console.run_command('tpm2 pcr_read 10 0x%x' % ram) output = u_boot_console.run_command('echo $?') assert output.endswith('0') @@ -257,7 +257,7 @@ def test_tpm2_pcr_read(u_boot_console): updates = int(re.findall(r'\d+', str)[0]) # Check the output value - assert 'PCR #0 content' in read_pcr + assert 'PCR #10 content' in read_pcr assert '00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00' in read_pcr @pytest.mark.buildconfigspec('cmd_tpm_v2') @@ -275,19 +275,19 @@ def test_tpm2_pcr_extend(u_boot_console): force_init(u_boot_console) ram = u_boot_utils.find_ram_base(u_boot_console) - read_pcr = u_boot_console.run_command('tpm2 pcr_read 0 0x%x' % (ram + 0x20)) + read_pcr = u_boot_console.run_command('tpm2 pcr_read 10 0x%x' % (ram + 0x20)) output = u_boot_console.run_command('echo $?') assert output.endswith('0') str = re.findall(r'\d+ known updates', read_pcr)[0] updates = int(re.findall(r'\d+', str)[0]) - u_boot_console.run_command('tpm2 pcr_extend 0 0x%x' % ram) + u_boot_console.run_command('tpm2 pcr_extend 10 0x%x' % ram) output = u_boot_console.run_command('echo $?') assert output.endswith('0') # Read the value back into a different place so we can still use 'ram' as # our zero bytes - read_pcr = u_boot_console.run_command('tpm2 pcr_read 0 0x%x' % (ram + 0x20)) + read_pcr = u_boot_console.run_command('tpm2 pcr_read 10 0x%x' % (ram + 0x20)) output = u_boot_console.run_command('echo $?') assert output.endswith('0') assert 'f5 a5 fd 42 d1 6a 20 30 27 98 ef 6e d3 09 97 9b' in read_pcr @@ -297,11 +297,11 @@ def test_tpm2_pcr_extend(u_boot_console): new_updates = int(re.findall(r'\d+', str)[0]) assert (updates + 1) == new_updates - u_boot_console.run_command('tpm2 pcr_extend 0 0x%x' % ram) + u_boot_console.run_command('tpm2 pcr_extend 10 0x%x' % ram) output = u_boot_console.run_command('echo $?') assert output.endswith('0') - read_pcr = u_boot_console.run_command('tpm2 pcr_read 0 0x%x' % (ram + 0x20)) + read_pcr = u_boot_console.run_command('tpm2 pcr_read 10 0x%x' % (ram + 0x20)) output = u_boot_console.run_command('echo $?') assert output.endswith('0') assert '7a 05 01 f5 95 7b df 9c b3 a8 ff 49 66 f0 22 65' in read_pcr diff --git a/tools/sfspl.c b/tools/sfspl.c index ec18a0a77e..c76420ce21 100644 --- a/tools/sfspl.c +++ b/tools/sfspl.c @@ -99,7 +99,7 @@ static int sfspl_image_extract_subimage(void *ptr, { struct spl_hdr *hdr = (void *)ptr; unsigned char *buf = ptr; - int fd; + int fd, ret = EXIT_SUCCESS; unsigned int hdr_size = le32_to_cpu(hdr->hdr_size); unsigned int file_size = le32_to_cpu(hdr->file_size); @@ -110,16 +110,16 @@ static int sfspl_image_extract_subimage(void *ptr, fd = open(params->outfile, O_WRONLY | O_CREAT | O_TRUNC, 0644); if (fd == -1) { - perror("Can write file"); + perror("Cannot open file"); return EXIT_FAILURE; } if (write(fd, &buf[hdr_size], file_size) != file_size) { perror("Cannot write file"); - return EXIT_FAILURE; + ret = EXIT_FAILURE; } close(fd); - return EXIT_SUCCESS; + return ret; } static int sfspl_check_image_type(uint8_t type) |