diff options
633 files changed, 1229 insertions, 5683 deletions
@@ -373,12 +373,6 @@ The following options need to be configured: such as ARM architectural timer initialization. - Linux Kernel Interface: - CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only] - - When transferring memsize parameter to Linux, some versions - expect it to be in bytes, others in MB. - Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes. - CONFIG_OF_LIBFDT New kernel versions are expecting firmware settings to be @@ -585,11 +579,6 @@ The following options need to be configured: Support for generic parallel port TPM devices. Only one device per system is supported at this time. - CONFIG_TPM_TIS_BASE_ADDRESS - Base address where the generic TPM device is mapped - to. Contemporary x86 systems usually map it at - 0xfed40000. - CONFIG_TPM Define this to enable the TPM support library which provides functional interfaces to some TPM commands. @@ -629,14 +618,6 @@ The following options need to be configured: variable usbtty to be cdc_acm should suffice. The following might be defined in YourBoardName.h - CONFIG_USBD_HS - Define this to enable the high speed support for usb - device and usbtty. If this feature is enabled, a routine - int is_usbd_high_speed(void) - also needs to be defined by the driver to dynamically poll - whether the enumeration has succeded at high speed or full - speed. - If you have a USB-IF assigned VendorID then you may wish to define your own vendor specific values either in BoardName.h or directly in usbd_vendor_info.h. If you don't define @@ -734,38 +715,6 @@ The following options need to be configured: Some PHY like Intel LXT971A need extra delay after command issued before MII status register can be read -- IP address: - CONFIG_IPADDR - - Define a default value for the IP address to use for - the default Ethernet interface, in case this is not - determined through e.g. bootp. - (Environment variable "ipaddr") - -- Server IP address: - CONFIG_SERVERIP - - Defines a default value for the IP address of a TFTP - server to contact when using the "tftboot" command. - (Environment variable "serverip") - -- Gateway IP address: - CONFIG_GATEWAYIP - - Defines a default value for the IP address of the - default router where packets to other networks are - sent to. - (Environment variable "gatewayip") - -- Subnet mask: - CONFIG_NETMASK - - Defines a default value for the subnet mask (or - routing prefix) which is used to determine if an IP - address belongs to the local subnet or needs to be - forwarded through a router. - (Environment variable "netmask") - - BOOTP Recovery Mode: CONFIG_BOOTP_RANDOM_DELAY @@ -1016,21 +965,13 @@ The following options need to be configured: CFG_SYS_I2C_NOPROBES This option specifies a list of I2C devices that will be skipped - when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS - is set, specify a list of bus-device pairs. Otherwise, specify - a 1D array of device addresses + when the 'i2c probe' command is issued. e.g. - #undef CONFIG_I2C_MULTI_BUS #define CFG_SYS_I2C_NOPROBES {0x50,0x68} will skip addresses 0x50 and 0x68 on a board with one I2C bus - #define CONFIG_I2C_MULTI_BUS - #define CFG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}} - - will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 - CFG_SYS_RTC_BUS_NUM If defined, then this indicates the I2C bus number for the RTC. @@ -1122,13 +1063,6 @@ The following options need to be configured: completely disabled. Anybody can change or delete these parameters. - Alternatively, if you define _both_ an ethaddr in the - default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default - Ethernet address is installed in the environment, - which can be changed exactly ONCE by the user. [The - serial# is unaffected by this, i. e. it remains - read-only.] - The same can be accomplished in a more flexible way for any variable by configuring the type of access to allow for those variables in the ".flags" variable @@ -1224,13 +1158,6 @@ The following options need to be configured: this is instead controlled by the value of /config/load-environment. - CONFIG_STANDALONE_LOAD_ADDR - - This option defines a board specific value for the - address where standalone program gets loaded, thus - overwriting the architecture dependent default - settings. - - Automatic software updates via TFTP server CONFIG_UPDATE_TFTP CONFIG_UPDATE_TFTP_CNT_MAX @@ -1477,24 +1404,6 @@ Configuration Settings: - CONFIG_SYS_FLASH_USE_BUFFER_WRITE Use buffered writes to flash. -- CONFIG_FLASH_SPANSION_S29WS_N - s29ws-n MirrorBit flash has non-standard addresses for buffered - write commands. - -- CONFIG_FLASH_SHOW_PROGRESS - If defined (must be an integer), print out countdown - digits and dots. Recommended value: 45 (9..1) for 80 - column displays, 15 (3..1) for 40 column displays. - -- CONFIG_FLASH_VERIFY - If defined, the content of the flash (destination) is compared - against the source after the write operation. An error message - will be printed when the contents are not identical. - Please note that this option is useless in nearly all cases, - since such flash programming errors usually are detected earlier - while unprotecting/erasing/programming. Please only enable - this option if you really know what you are doing. - - CONFIG_ENV_FLAGS_LIST_DEFAULT - CONFIG_ENV_FLAGS_LIST_STATIC Enable validation of the values given to environment variables when @@ -1542,11 +1451,6 @@ The following definitions that deal with the placement and management of environment data (variable area); in general, we support the following configurations: -- CONFIG_BUILD_ENVCRC: - - Builds up envcrc with the target environment so that external utils - may easily extract it and embed it in final U-Boot images. - BE CAREFUL! The first access to the environment happens quite early in U-Boot initialization (when we try to get the setting of for the console baudrate). You *MUST* have mapped your NVRAM area then, or diff --git a/api/Kconfig b/api/Kconfig index eb8d5d0596..d9362724e5 100644 --- a/api/Kconfig +++ b/api/Kconfig @@ -11,3 +11,22 @@ config SYS_MMC_MAX_DEVICE default 1 endmenu + +config STANDALONE_LOAD_ADDR + hex "Address in memory to link standalone applications to" + default 0xffffffff80200000 if MIPS && 64BIT + default 0x8c000000 if SH + default 0x82000000 if ARC + default 0x80f00000 if MICROBLAZE + default 0x80300000 if ARCH_OMAP2PLUS || FSL_LSCH2 || FSL_LSCH3 + default 0x80200000 if MIPS && 32BIT + default 0x0c100000 if ARM + default 0x02000000 if NIOS2 + default 0x00040000 if PPC || X86 + default 0x00020000 if M68K + default 0x0 if RISCV + default SYS_LOAD_ADDR + help + This option defines a board specific value for the address where + standalone program gets loaded, thus overwriting the architecture + dependent default settings. diff --git a/arch/Kconfig b/arch/Kconfig index 5ffbdc6a3f..5f2b72f535 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -380,6 +380,10 @@ config SYS_IMMR Address for the Internal Memory-Mapped Registers (IMMR) window used to configure the features of many Freescale / NXP SoCs. +config MONITOR_IS_IN_RAM + bool "U-Boot is loaded in to RAM by a pre-loader" + depends on M68K || NIOS2 + config SKIP_LOWLEVEL_INIT bool "Skip the calls to certain low level initialization functions" depends on ARM || MIPS || RISCV diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 805fe934a1..ad61dabb31 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -1,5 +1,10 @@ +config FSL_TRUST_ARCH_v1 + bool + config NXP_ESBC bool "NXP ESBC (secure boot) functionality" + select FSL_TRUST_ARCH_v1 if ARCH_P3041 || ARCH_P4080 || \ + ARCH_P5040 || ARCH_P2041 help Enable Freescale Secure Boot feature. Normally selected by defconfig. If unsure, do not change. @@ -10,6 +15,7 @@ menu "Chain of trust / secure boot options" config CHAIN_OF_TRUST select FSL_CAAM select ARCH_MISC_INIT + select FSL_ISBC_KEY_EXT if (ARM || FSL_CORENET) && !SYS_RAMBOOT select FSL_SEC_MON select SPL_BOARD_INIT if (ARM && SPL) select SPL_HASH if (ARM && SPL) @@ -41,6 +47,17 @@ config ESBC_ADDR_64BIT help For Layerscape based platforms, ESBC image Address in Header is 64bit. +config FSL_ISBC_KEY_EXT + bool + help + The key used for verification of next level images is picked up from + an Extension Table which has been verified by the ISBC (Internal + Secure boot Code) in boot ROM of the SoC. The feature is only + applicable in case of NOR boot and is not applicable in case of + RAMBOOT (NAND, SD, SPI). For Layerscape, this feature is available + for all device if IE Table is copied to XIP memory Also, for + Layerscape, ISBC doesn't verify this table. + config SYS_FSL_SFP_BE def_bool y depends on PPC || FSL_LSCH2 || ARCH_LS1021A diff --git a/arch/arc/config.mk b/arch/arc/config.mk index 2b70945ac3..b713fa3054 100644 --- a/arch/arc/config.mk +++ b/arch/arc/config.mk @@ -21,6 +21,3 @@ PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections -fno-common # Needed for relocation LDFLAGS_FINAL += -pie --gc-sections - -# Load address for standalone apps -CONFIG_STANDALONE_LOAD_ADDR ?= 0x82000000 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d3b11b8495..6e191e41d5 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -915,6 +915,7 @@ config ARCH_MX7 select CPU_V7A select GPIO_EXTRA_HEADER select MACH_IMX + select MXC_GPT_HCLK select SYS_FSL_HAS_SEC select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_LE @@ -928,6 +929,7 @@ config ARCH_MX6 select CPU_V7A select GPIO_EXTRA_HEADER select MACH_IMX + select MXC_GPT_HCLK select SYS_FSL_HAS_SEC select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_LE @@ -1597,6 +1599,7 @@ config TARGET_LS1021AQDS select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select LS1_DEEP_SLEEP + select PEN_ADDR_BIG_ENDIAN select SUPPORT_SPL select SYS_FSL_DDR select FSL_DDR_INTERACTIVE @@ -1615,6 +1618,7 @@ config TARGET_LS1021ATWR select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select LS1_DEEP_SLEEP + select PEN_ADDR_BIG_ENDIAN select SUPPORT_SPL select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI select GPIO_EXTRA_HEADER @@ -1679,6 +1683,7 @@ config TARGET_LS1021AIOT select CPU_V7A select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT + select PEN_ADDR_BIG_ENDIAN select SUPPORT_SPL select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI select GPIO_EXTRA_HEADER diff --git a/arch/arm/config.mk b/arch/arm/config.mk index 2065438d05..bf781f1026 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -3,14 +3,6 @@ # (C) Copyright 2000-2002 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -ifndef CONFIG_STANDALONE_LOAD_ADDR -ifneq ($(CONFIG_ARCH_OMAP2PLUS),) -CONFIG_STANDALONE_LOAD_ADDR = 0x80300000 -else -CONFIG_STANDALONE_LOAD_ADDR = 0xc100000 -endif -endif - CFLAGS_NON_EFI := -fno-pic -ffixed-r9 -ffunction-sections -fdata-sections \ -fstack-protector-strong CFLAGS_EFI := -fpic -fshort-wchar diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 7e138e0cc5..a83eb7e8fd 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -51,6 +51,9 @@ config MAX_CPUS cores, count the reserved ports. This will allocate enough memory in spin table to properly handle all cores. +config PEN_ADDR_BIG_ENDIAN + bool + config SYS_CCI400_OFFSET hex "Offset for CCI400 base" depends on SYS_FSL_HAS_CCI400 diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c index 25e4b49c70..c455969609 100644 --- a/arch/arm/cpu/armv7/ls102xa/cpu.c +++ b/arch/arm/cpu/armv7/ls102xa/cpu.c @@ -302,15 +302,6 @@ int cpu_mmc_init(struct bd_info *bis) } #endif -int cpu_eth_init(struct bd_info *bis) -{ -#if defined(CONFIG_TSEC_ENET) && !defined(CONFIG_DM_ETH) - tsec_standard_init(bis); -#endif - - return 0; -} - int arch_cpu_init(void) { void *epu_base = (void *)(CFG_SYS_DCSRBAR + EPU_BLOCK_OFFSET); diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 99413ef52e..2aeec7dea7 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -1058,9 +1058,6 @@ int cpu_eth_init(struct bd_info *bis) #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) error = fsl_mc_ldpaa_init(bis); #endif -#ifdef CONFIG_FMAN_ENET - fm_standard_init(bis); -#endif return error; } diff --git a/arch/arm/include/asm/arch-am33xx/clock.h b/arch/arm/include/asm/arch-am33xx/clock.h index 79e3b8c7d9..ad25b3e8aa 100644 --- a/arch/arm/include/asm/arch-am33xx/clock.h +++ b/arch/arm/include/asm/arch-am33xx/clock.h @@ -13,7 +13,7 @@ #include <asm/arch/clocks_am33xx.h> #include <asm/arch/hardware.h> -#if defined(CONFIG_TI816X) || defined(CONFIG_TI814X) +#if defined(CONFIG_TI816X) #include <asm/arch/clock_ti81xx.h> #endif diff --git a/arch/arm/include/asm/arch-am33xx/clock_ti81xx.h b/arch/arm/include/asm/arch-am33xx/clock_ti81xx.h index f0699229a3..d22d958706 100644 --- a/arch/arm/include/asm/arch-am33xx/clock_ti81xx.h +++ b/arch/arm/include/asm/arch-am33xx/clock_ti81xx.h @@ -44,9 +44,7 @@ struct cm_alwon { unsigned int mmu_clkstctrl; unsigned int mmucfg_clkstctrl; unsigned int ocmc0clkstctrl; -#if defined(CONFIG_TI814X) - unsigned int vcpclkstctrl; -#elif defined(CONFIG_TI816X) +#if defined(CONFIG_TI816X) unsigned int ocmc1clkstctrl; #endif unsigned int mpuclkstctrl; @@ -67,16 +65,7 @@ struct cm_alwon { unsigned int gpio1clkctrl; unsigned int i2c0clkctrl; unsigned int i2c1clkctrl; -#if defined(CONFIG_TI814X) - unsigned int mcasp345clkctrl; - unsigned int atlclkctrl; - unsigned int mlbclkctrl; - unsigned int pataclkctrl; - unsigned int resv1[1]; - unsigned int uart3clkctrl; - unsigned int uart4clkctrl; - unsigned int uart5clkctrl; -#elif defined(CONFIG_TI816X) +#if defined(CONFIG_TI816X) unsigned int resv1[1]; unsigned int timer1clkctrl; unsigned int timer2clkctrl; @@ -93,16 +82,12 @@ struct cm_alwon { unsigned int mmudataclkctrl; unsigned int resv2[2]; unsigned int mmucfgclkctrl; -#if defined(CONFIG_TI814X) - unsigned int resv3[2]; -#elif defined(CONFIG_TI816X) +#if defined(CONFIG_TI816X) unsigned int resv3[1]; unsigned int sdioclkctrl; #endif unsigned int ocmc0clkctrl; -#if defined(CONFIG_TI814X) - unsigned int vcpclkctrl; -#elif defined(CONFIG_TI816X) +#if defined(CONFIG_TI816X) unsigned int ocmc1clkctrl; #endif unsigned int resv4[2]; @@ -112,9 +97,7 @@ struct cm_alwon { unsigned int ethernet0clkctrl; unsigned int ethernet1clkctrl; unsigned int mpuclkctrl; -#if defined(CONFIG_TI814X) - unsigned int debugssclkctrl; -#elif defined(CONFIG_TI816X) +#if defined(CONFIG_TI816X) unsigned int resv6[1]; #endif unsigned int l3clkctrl; @@ -126,14 +109,7 @@ struct cm_alwon { unsigned int tptc1clkctrl; unsigned int tptc2clkctrl; unsigned int tptc3clkctrl; -#if defined(CONFIG_TI814X) - unsigned int resv6[4]; - unsigned int dcan01clkctrl; - unsigned int mmchs0clkctrl; - unsigned int mmchs1clkctrl; - unsigned int mmchs2clkctrl; - unsigned int custefuseclkctrl; -#elif defined(CONFIG_TI816X) +#if defined(CONFIG_TI816X) unsigned int sr0clkctrl; unsigned int sr1clkctrl; #endif diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h b/arch/arm/include/asm/arch-am33xx/hardware.h index 0508b8c912..2d7f9da365 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware.h +++ b/arch/arm/include/asm/arch-am33xx/hardware.h @@ -16,8 +16,6 @@ #include <asm/arch/hardware_am33xx.h> #elif defined(CONFIG_TI816X) #include <asm/arch/hardware_ti816x.h> -#elif defined(CONFIG_TI814X) -#include <asm/arch/hardware_ti814x.h> #elif defined(CONFIG_AM43XX) #include <asm/arch/hardware_am43xx.h> #endif diff --git a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h b/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h deleted file mode 100644 index b00d592bc3..0000000000 --- a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h +++ /dev/null @@ -1,60 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * hardware_ti814x.h - * - * TI814x hardware specific header - * - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ - */ - -#ifndef __AM33XX_HARDWARE_TI814X_H -#define __AM33XX_HARDWARE_TI814X_H - -/* Module base addresses */ - -/* UART Base Address */ -#define UART0_BASE 0x48020000 - -/* Watchdog Timer */ -#define WDT_BASE 0x481C7000 - -/* Control Module Base Address */ -#define CTRL_BASE 0x48140000 -#define CTRL_DEVICE_BASE 0x48140600 - -/* PRCM Base Address */ -#define PRCM_BASE 0x48180000 -#define CM_PER 0x44E00000 -#define CM_WKUP 0x44E00400 - -#define PRM_RSTCTRL (PRCM_BASE + 0x00A0) -#define PRM_RSTST (PRM_RSTCTRL + 8) - -/* PLL Subsystem Base Address */ -#define PLL_SUBSYS_BASE 0x481C5000 - -/* VTP Base address */ -#define VTP0_CTRL_ADDR 0x48140E0C -#define VTP1_CTRL_ADDR 0x48140E10 - -/* DDR Base address */ -#define DDR_PHY_CMD_ADDR 0x47C0C400 -#define DDR_PHY_DATA_ADDR 0x47C0C4C8 -#define DDR_PHY_CMD_ADDR2 0x47C0C800 -#define DDR_PHY_DATA_ADDR2 0x47C0C8C8 -#define DDR_DATA_REGS_NR 4 - -#define DDRPHY_0_CONFIG_BASE (CTRL_BASE + 0x1400) -#define DDRPHY_CONFIG_BASE DDRPHY_0_CONFIG_BASE - -/* CPSW Config space */ -#define CPSW_MDIO_BASE 0x4A100800 - -/* RTC base address */ -#define RTC_BASE 0x480C0000 - -/* OTG */ -#define USB0_OTG_BASE 0x47401000 -#define USB1_OTG_BASE 0x47401800 - -#endif /* __AM33XX_HARDWARE_TI814X_H */ diff --git a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h index 5a2ea8faef..ed15d15c5b 100644 --- a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h +++ b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h @@ -24,10 +24,7 @@ #define OMAP_HSMMC1_BASE 0x48060000 #define OMAP_HSMMC2_BASE 0x481D8000 -#if defined(CONFIG_TI814X) -#undef MMC_CLOCK_REFERENCE -#define MMC_CLOCK_REFERENCE 192 /* MHz */ -#elif defined(CONFIG_TI816X) +#if defined(CONFIG_TI816X) #undef MMC_CLOCK_REFERENCE #define MMC_CLOCK_REFERENCE 48 /* MHz */ #endif diff --git a/arch/arm/include/asm/arch-am33xx/mux.h b/arch/arm/include/asm/arch-am33xx/mux.h index b16b184733..7cf973710d 100644 --- a/arch/arm/include/asm/arch-am33xx/mux.h +++ b/arch/arm/include/asm/arch-am33xx/mux.h @@ -20,8 +20,6 @@ #ifdef CONFIG_AM33XX #include <asm/arch/mux_am33xx.h> -#elif defined(CONFIG_TI814X) -#include <asm/arch/mux_ti814x.h> #elif defined(CONFIG_TI816X) #include <asm/arch/mux_ti816x.h> #elif defined(CONFIG_AM43XX) diff --git a/arch/arm/include/asm/arch-am33xx/mux_ti814x.h b/arch/arm/include/asm/arch-am33xx/mux_ti814x.h deleted file mode 100644 index a26e5038f7..0000000000 --- a/arch/arm/include/asm/arch-am33xx/mux_ti814x.h +++ /dev/null @@ -1,311 +0,0 @@ -/* - * mux_ti814x.h - * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _MUX_TI814X_H_ -#define _MUX_TI814X_H_ - -/* PAD Control Fields */ -#define PINCNTL_RSV_MSK (0x3 << 18) /* Reserved bitmask */ -#define PULLUP_EN (0x1 << 17) /* Pull UP Selection */ -#define PULLUDEN (0x0 << 16) /* Pull up enabled */ -#define PULLUDDIS (0x1 << 16) /* Pull up disabled */ -#define MODE(val) val /* used for Readability */ - -#define MUX_CFG(value, offset) \ -{ \ - int tmp; \ - tmp = __raw_readl(CTRL_BASE + offset); \ - tmp &= PINCNTL_RSV_MSK; \ - __raw_writel(tmp | value, (CTRL_BASE + offset));\ -} - -/* - * PAD CONTROL OFFSETS - * Field names corresponds to the pad signal name - */ -struct pad_signals { - int pincntl1; - int pincntl2; - int pincntl3; - int pincntl4; - int pincntl5; - int pincntl6; - int pincntl7; - int pincntl8; - int pincntl9; - int pincntl10; - int pincntl11; - int pincntl12; - int pincntl13; - int pincntl14; - int pincntl15; - int pincntl16; - int pincntl17; - int pincntl18; - int pincntl19; - int pincntl20; - int pincntl21; - int pincntl22; - int pincntl23; - int pincntl24; - int pincntl25; - int pincntl26; - int pincntl27; - int pincntl28; - int pincntl29; - int pincntl30; - int pincntl31; - int pincntl32; - int pincntl33; - int pincntl34; - int pincntl35; - int pincntl36; - int pincntl37; - int pincntl38; - int pincntl39; - int pincntl40; - int pincntl41; - int pincntl42; - int pincntl43; - int pincntl44; - int pincntl45; - int pincntl46; - int pincntl47; - int pincntl48; - int pincntl49; - int pincntl50; - int pincntl51; - int pincntl52; - int pincntl53; - int pincntl54; - int pincntl55; - int pincntl56; - int pincntl57; - int pincntl58; - int pincntl59; - int pincntl60; - int pincntl61; - int pincntl62; - int pincntl63; - int pincntl64; - int pincntl65; - int pincntl66; - int pincntl67; - int pincntl68; - int pincntl69; - int pincntl70; - int pincntl71; - int pincntl72; - int pincntl73; - int pincntl74; - int pincntl75; - int pincntl76; - int pincntl77; - int pincntl78; - int pincntl79; - int pincntl80; - int pincntl81; - int pincntl82; - int pincntl83; - int pincntl84; - int pincntl85; - int pincntl86; - int pincntl87; - int pincntl88; - int pincntl89; - int pincntl90; - int pincntl91; - int pincntl92; - int pincntl93; - int pincntl94; - int pincntl95; - int pincntl96; - int pincntl97; - int pincntl98; - int pincntl99; - int pincntl100; - int pincntl101; - int pincntl102; - int pincntl103; - int pincntl104; - int pincntl105; - int pincntl106; - int pincntl107; - int pincntl108; - int pincntl109; - int pincntl110; - int pincntl111; - int pincntl112; - int pincntl113; - int pincntl114; - int pincntl115; - int pincntl116; - int pincntl117; - int pincntl118; - int pincntl119; - int pincntl120; - int pincntl121; - int pincntl122; - int pincntl123; - int pincntl124; - int pincntl125; - int pincntl126; - int pincntl127; - int pincntl128; - int pincntl129; - int pincntl130; - int pincntl131; - int pincntl132; - int pincntl133; - int pincntl134; - int pincntl135; - int pincntl136; - int pincntl137; - int pincntl138; - int pincntl139; - int pincntl140; - int pincntl141; - int pincntl142; - int pincntl143; - int pincntl144; - int pincntl145; - int pincntl146; - int pincntl147; - int pincntl148; - int pincntl149; - int pincntl150; - int pincntl151; - int pincntl152; - int pincntl153; - int pincntl154; - int pincntl155; - int pincntl156; - int pincntl157; - int pincntl158; - int pincntl159; - int pincntl160; - int pincntl161; - int pincntl162; - int pincntl163; - int pincntl164; - int pincntl165; - int pincntl166; - int pincntl167; - int pincntl168; - int pincntl169; - int pincntl170; - int pincntl171; - int pincntl172; - int pincntl173; - int pincntl174; - int pincntl175; - int pincntl176; - int pincntl177; - int pincntl178; - int pincntl179; - int pincntl180; - int pincntl181; - int pincntl182; - int pincntl183; - int pincntl184; - int pincntl185; - int pincntl186; - int pincntl187; - int pincntl188; - int pincntl189; - int pincntl190; - int pincntl191; - int pincntl192; - int pincntl193; - int pincntl194; - int pincntl195; - int pincntl196; - int pincntl197; - int pincntl198; - int pincntl199; - int pincntl200; - int pincntl201; - int pincntl202; - int pincntl203; - int pincntl204; - int pincntl205; - int pincntl206; - int pincntl207; - int pincntl208; - int pincntl209; - int pincntl210; - int pincntl211; - int pincntl212; - int pincntl213; - int pincntl214; - int pincntl215; - int pincntl216; - int pincntl217; - int pincntl218; - int pincntl219; - int pincntl220; - int pincntl221; - int pincntl222; - int pincntl223; - int pincntl224; - int pincntl225; - int pincntl226; - int pincntl227; - int pincntl228; - int pincntl229; - int pincntl230; - int pincntl231; - int pincntl232; - int pincntl233; - int pincntl234; - int pincntl235; - int pincntl236; - int pincntl237; - int pincntl238; - int pincntl239; - int pincntl240; - int pincntl241; - int pincntl242; - int pincntl243; - int pincntl244; - int pincntl245; - int pincntl246; - int pincntl247; - int pincntl248; - int pincntl249; - int pincntl250; - int pincntl251; - int pincntl252; - int pincntl253; - int pincntl254; - int pincntl255; - int pincntl256; - int pincntl257; - int pincntl258; - int pincntl259; - int pincntl260; - int pincntl261; - int pincntl262; - int pincntl263; - int pincntl264; - int pincntl265; - int pincntl266; - int pincntl267; - int pincntl268; - int pincntl269; - int pincntl270; -}; - -#endif /* endif _MUX_TI814X_H_ */ diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h index bc9f0a1146..4c71dbf3ab 100644 --- a/arch/arm/include/asm/arch-am33xx/omap.h +++ b/arch/arm/include/asm/arch-am33xx/omap.h @@ -20,7 +20,7 @@ #define NON_SECURE_SRAM_START 0x402F0400 #define NON_SECURE_SRAM_END 0x40310000 #define NON_SECURE_SRAM_IMG_END 0x4030B800 -#elif defined(CONFIG_TI816X) || defined(CONFIG_TI814X) +#elif defined(CONFIG_TI816X) #define NON_SECURE_SRAM_START 0x40300000 #define NON_SECURE_SRAM_END 0x40320000 #define NON_SECURE_SRAM_IMG_END 0x4031B800 diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h index f3910c2123..6bd3ca0d07 100644 --- a/arch/arm/include/asm/arch-am33xx/spl.h +++ b/arch/arm/include/asm/arch-am33xx/spl.h @@ -9,21 +9,7 @@ #define BOOT_DEVICE_NONE 0x00 #define BOOT_DEVICE_MMC2_2 0xFF -#if defined(CONFIG_TI814X) -#define BOOT_DEVICE_XIP 0x01 -#define BOOT_DEVICE_XIPWAIT 0x02 -#define BOOT_DEVICE_NAND 0x05 -#define BOOT_DEVICE_NAND_I2C 0x06 -#define BOOT_DEVICE_MMC2 0x08 /* ROM only supports 2nd instance. */ -#define BOOT_DEVICE_MMC1 0x09 -#define BOOT_DEVICE_SPI 0x15 -#define BOOT_DEVICE_UART 0x41 -#define BOOT_DEVICE_USBETH 0x44 -#define BOOT_DEVICE_CPGMAC 0x46 - -#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2 -#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1 -#elif defined(CONFIG_TI816X) +#if defined(CONFIG_TI816X) #define BOOT_DEVICE_XIP 0x01 #define BOOT_DEVICE_XIPWAIT 0x02 #define BOOT_DEVICE_NAND 0x03 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index c9c72e3271..57d92f6552 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -14,8 +14,6 @@ #include <linux/bitops.h> #endif -#define CONFIG_STANDALONE_LOAD_ADDR 0x80300000 - /* * Reserve secure memory * To be aligned with MMU block size diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 14f86df5ed..4a4d642441 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -70,7 +70,6 @@ /* SATA */ #define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x02200000) #ifdef CONFIG_DDR_SPD -#define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30) #endif diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index a4f4961fc8..6a9d198cb8 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -9,21 +9,6 @@ #ifdef CONFIG_CHAIN_OF_TRUST #ifndef CONFIG_SPL_BUILD -#ifndef CONFIG_SYS_RAMBOOT -/* The key used for verification of next level images - * is picked up from an Extension Table which has - * been verified by the ISBC (Internal Secure boot Code) - * in boot ROM of the SoC. - * The feature is only applicable in case of NOR boot and is - * not applicable in case of RAMBOOT (NAND, SD, SPI). - * For LS, this feature is available for all device if IE Table - * is copied to XIP memory - * Also, for LS, ISBC doesn't verify this table. - */ -#define CONFIG_FSL_ISBC_KEY_EXT - -#endif - #ifdef CONFIG_FSL_LS_PPA /* Define the key hash here if SRK used for signing PPA image is * different from SRK hash put in SFP used for U-Boot. diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 29e35e443c..8f3aee052c 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -4,6 +4,12 @@ config BOARD_COMMON def_bool y depends on !TARGET_SMDKV310 && !TARGET_ARNDALE +config SPI_BOOTING + bool + +config USB_BOOTING + bool + choice prompt "EXYNOS architecture type select" optional @@ -24,6 +30,8 @@ config ARCH_EXYNOS5 select BOARD_EARLY_INIT_F select CPU_V7A select SHA_HW_ACCEL + select SPI_BOOTING if EXYNOS5_DT + select USB_BOOTING imply CMD_HASH imply CRC32_VERIFY imply HASH_VERIFY diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index ee5f1996a8..3266545c26 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -18,6 +18,9 @@ config SYSCOUNTER_TIMER config GPT_TIMER bool +config MXC_GPT_HCLK + bool + config IMX_RDC bool "i.MX Resource domain controller driver" depends on ARCH_MX6 || ARCH_MX7 diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 2e06f2bdae..96a08104ff 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -30,13 +30,4 @@ /* Needed for SPI NOR booting in SPL */ #define CONFIG_DM_SEQ_ALIAS 1 -/* - * I2C related stuff - */ -#ifdef CONFIG_CMD_I2C -#ifndef CONFIG_SYS_I2C_SOFT -#define CONFIG_I2C_MVTWSI -#endif -#endif - #endif /* __MVEBU_CONFIG_H */ diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 3bf9720522..1db71df272 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -75,14 +75,6 @@ config OMAP54XX imply SPL_SERIAL imply SYS_I2C_OMAP24XX -config TI814X - bool "TI814X SoC" - select SPECIFY_CONSOLE_INDEX - help - Support for AM335x SOC from Texas Instruments. - The AM335x high performance SOC features a Cortex-A8 - ARM core and more. - config TI816X bool "TI816X SoC" select SPECIFY_CONSOLE_INDEX diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index b666e81110..1299aec055 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -8,16 +8,6 @@ config TARGET_TI816X_EVM endif -if TI814X - -config TARGET_TI814X_EVM - bool "Support ti814x_evm" - help - This option specifies support for the TI8148 - EVM development platform. - -endif - if AM33XX config AM33XX_CHILISOM diff --git a/arch/arm/mach-omap2/am33xx/Makefile b/arch/arm/mach-omap2/am33xx/Makefile index 4e4f98ea90..bf94d345da 100644 --- a/arch/arm/mach-omap2/am33xx/Makefile +++ b/arch/arm/mach-omap2/am33xx/Makefile @@ -3,7 +3,6 @@ # Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ obj-$(CONFIG_AM33XX) += clock_am33xx.o -obj-$(CONFIG_TI814X) += clock_ti814x.o obj-$(CONFIG_AM43XX) += clock_am43xx.o ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX),) diff --git a/arch/arm/mach-omap2/am33xx/clock_ti814x.c b/arch/arm/mach-omap2/am33xx/clock_ti814x.c deleted file mode 100644 index 27abaff48f..0000000000 --- a/arch/arm/mach-omap2/am33xx/clock_ti814x.c +++ /dev/null @@ -1,410 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * clock_ti814x.c - * - * Clocks for TI814X based boards - * - * Copyright (C) 2013, Texas Instruments, Incorporated - */ - -#include <common.h> -#include <asm/arch/cpu.h> -#include <asm/arch/clock.h> -#include <asm/arch/hardware.h> -#include <asm/io.h> -#include <linux/delay.h> - -/* PRCM */ -#define PRCM_MOD_EN 0x2 - -/* CLK_SRC */ -#define OSC_SRC0 0 -#define OSC_SRC1 1 - -#define L3_OSC_SRC OSC_SRC0 - -#define OSC_0_FREQ 20 - -#define DCO_HS2_MIN 500 -#define DCO_HS2_MAX 1000 -#define DCO_HS1_MIN 1000 -#define DCO_HS1_MAX 2000 - -#define SELFREQDCO_HS2 0x00000801 -#define SELFREQDCO_HS1 0x00001001 - -#define MPU_N 0x1 -#define MPU_M 0x3C -#define MPU_M2 1 -#define MPU_CLKCTRL 0x1 - -#define L3_N 19 -#define L3_M 880 -#define L3_M2 4 -#define L3_CLKCTRL 0x801 - -#define DDR_N 19 -#define DDR_M 666 -#define DDR_M2 2 -#define DDR_CLKCTRL 0x801 - -/* ADPLLJ register values */ -#define ADPLLJ_CLKCTRL_HS2 0x00000801 /* HS2 mode, TINT2 = 1 */ -#define ADPLLJ_CLKCTRL_HS1 0x00001001 /* HS1 mode, TINT2 = 1 */ -#define ADPLLJ_CLKCTRL_CLKDCOLDOEN (1 << 29) -#define ADPLLJ_CLKCTRL_IDLE (1 << 23) -#define ADPLLJ_CLKCTRL_CLKOUTEN (1 << 20) -#define ADPLLJ_CLKCTRL_CLKOUTLDOEN (1 << 19) -#define ADPLLJ_CLKCTRL_CLKDCOLDOPWDNZ (1 << 17) -#define ADPLLJ_CLKCTRL_LPMODE (1 << 12) -#define ADPLLJ_CLKCTRL_DRIFTGUARDIAN (1 << 11) -#define ADPLLJ_CLKCTRL_REGM4XEN (1 << 10) -#define ADPLLJ_CLKCTRL_TINITZ (1 << 0) -#define ADPLLJ_CLKCTRL_CLKDCO (ADPLLJ_CLKCTRL_CLKDCOLDOEN | \ - ADPLLJ_CLKCTRL_CLKOUTEN | \ - ADPLLJ_CLKCTRL_CLKOUTLDOEN | \ - ADPLLJ_CLKCTRL_CLKDCOLDOPWDNZ) - -#define ADPLLJ_STATUS_PHASELOCK (1 << 10) -#define ADPLLJ_STATUS_FREQLOCK (1 << 9) -#define ADPLLJ_STATUS_PHSFRQLOCK (ADPLLJ_STATUS_PHASELOCK | \ - ADPLLJ_STATUS_FREQLOCK) -#define ADPLLJ_STATUS_BYPASSACK (1 << 8) -#define ADPLLJ_STATUS_BYPASS (1 << 0) -#define ADPLLJ_STATUS_BYPASSANDACK (ADPLLJ_STATUS_BYPASSACK | \ - ADPLLJ_STATUS_BYPASS) - -#define ADPLLJ_TENABLE_ENB (1 << 0) -#define ADPLLJ_TENABLEDIV_ENB (1 << 0) - -#define ADPLLJ_M2NDIV_M2SHIFT 16 - -#define MPU_PLL_BASE (PLL_SUBSYS_BASE + 0x048) -#define L3_PLL_BASE (PLL_SUBSYS_BASE + 0x110) -#define DDR_PLL_BASE (PLL_SUBSYS_BASE + 0x290) - -struct ad_pll { - unsigned int pwrctrl; - unsigned int clkctrl; - unsigned int tenable; - unsigned int tenablediv; - unsigned int m2ndiv; - unsigned int mn2div; - unsigned int fracdiv; - unsigned int bwctrl; - unsigned int fracctrl; - unsigned int status; - unsigned int m3div; - unsigned int rampctrl; -}; - -#define OSC_SRC_CTRL (PLL_SUBSYS_BASE + 0x2C0) - -#define ENET_CLKCTRL_CMPL 0x30000 - -#define SATA_PLL_BASE (CTRL_BASE + 0x0720) - -struct sata_pll { - unsigned int pllcfg0; - unsigned int pllcfg1; - unsigned int pllcfg2; - unsigned int pllcfg3; - unsigned int pllcfg4; - unsigned int pllstatus; - unsigned int rxstatus; - unsigned int txstatus; - unsigned int testcfg; -}; - -#define SEL_IN_FREQ (0x1 << 31) -#define DIGCLRZ (0x1 << 30) -#define ENDIGLDO (0x1 << 4) -#define APLL_CP_CURR (0x1 << 3) -#define ENBGSC_REF (0x1 << 2) -#define ENPLLLDO (0x1 << 1) -#define ENPLL (0x1 << 0) - -#define SATA_PLLCFG0_1 (SEL_IN_FREQ | ENBGSC_REF) -#define SATA_PLLCFG0_2 (SEL_IN_FREQ | ENDIGLDO | ENBGSC_REF) -#define SATA_PLLCFG0_3 (SEL_IN_FREQ | ENDIGLDO | ENBGSC_REF | ENPLLLDO) -#define SATA_PLLCFG0_4 (SEL_IN_FREQ | DIGCLRZ | ENDIGLDO | ENBGSC_REF | \ - ENPLLLDO | ENPLL) - -#define PLL_LOCK (0x1 << 0) - -#define ENSATAMODE (0x1 << 31) -#define PLLREFSEL (0x1 << 30) -#define MDIVINT (0x4b << 18) -#define EN_CLKAUX (0x1 << 5) -#define EN_CLK125M (0x1 << 4) -#define EN_CLK100M (0x1 << 3) -#define EN_CLK50M (0x1 << 2) - -#define SATA_PLLCFG1 (ENSATAMODE | \ - PLLREFSEL | \ - MDIVINT | \ - EN_CLKAUX | \ - EN_CLK125M | \ - EN_CLK100M | \ - EN_CLK50M) - -#define DIGLDO_EN_CAPLESSMODE (0x1 << 22) -#define PLLDO_EN_LDO_STABLE (0x1 << 11) -#define PLLDO_EN_BUF_CUR (0x1 << 7) -#define PLLDO_EN_LP (0x1 << 6) -#define PLLDO_CTRL_TRIM_1_4V (0x10 << 1) - -#define SATA_PLLCFG3 (DIGLDO_EN_CAPLESSMODE | \ - PLLDO_EN_LDO_STABLE | \ - PLLDO_EN_BUF_CUR | \ - PLLDO_EN_LP | \ - PLLDO_CTRL_TRIM_1_4V) - -const struct cm_alwon *cmalwon = (struct cm_alwon *)CM_ALWON_BASE; -const struct cm_def *cmdef = (struct cm_def *)CM_DEFAULT_BASE; -const struct sata_pll *spll = (struct sata_pll *)SATA_PLL_BASE; - -/* - * Enable the peripheral clock for required peripherals - */ -static void enable_per_clocks(void) -{ - /* HSMMC1 */ - writel(PRCM_MOD_EN, &cmalwon->mmchs1clkctrl); - while (readl(&cmalwon->mmchs1clkctrl) != PRCM_MOD_EN) - ; - - /* Ethernet */ - writel(PRCM_MOD_EN, &cmalwon->ethclkstctrl); - writel(PRCM_MOD_EN, &cmalwon->ethernet0clkctrl); - while ((readl(&cmalwon->ethernet0clkctrl) & ENET_CLKCTRL_CMPL) != 0) - ; - writel(PRCM_MOD_EN, &cmalwon->ethernet1clkctrl); - while ((readl(&cmalwon->ethernet1clkctrl) & ENET_CLKCTRL_CMPL) != 0) - ; - - /* RTC clocks */ - writel(PRCM_MOD_EN, &cmalwon->rtcclkstctrl); - writel(PRCM_MOD_EN, &cmalwon->rtcclkctrl); - while (readl(&cmalwon->rtcclkctrl) != PRCM_MOD_EN) - ; -} - -/* - * select the HS1 or HS2 for DCO Freq - * return : CLKCTRL - */ -static u32 pll_dco_freq_sel(u32 clkout_dco) -{ - if (clkout_dco >= DCO_HS2_MIN && clkout_dco < DCO_HS2_MAX) - return SELFREQDCO_HS2; - else if (clkout_dco >= DCO_HS1_MIN && clkout_dco < DCO_HS1_MAX) - return SELFREQDCO_HS1; - else - return -1; -} - -/* - * select the sigma delta config - * return: sigma delta val - */ -static u32 pll_sigma_delta_val(u32 clkout_dco) -{ - u32 sig_val = 0; - - sig_val = (clkout_dco + 225) / 250; - sig_val = sig_val << 24; - - return sig_val; -} - -/* - * configure individual ADPLLJ - */ -static void pll_config(u32 base, u32 n, u32 m, u32 m2, - u32 clkctrl_val, int adpllj) -{ - const struct ad_pll *adpll = (struct ad_pll *)base; - u32 m2nval, mn2val, read_clkctrl = 0, clkout_dco = 0; - u32 sig_val = 0, hs_mod = 0; - - m2nval = (m2 << ADPLLJ_M2NDIV_M2SHIFT) | n; - mn2val = m; - - /* calculate clkout_dco */ - clkout_dco = ((OSC_0_FREQ / (n+1)) * m); - - /* sigma delta & Hs mode selection skip for ADPLLS*/ - if (adpllj) { - sig_val = pll_sigma_delta_val(clkout_dco); - hs_mod = pll_dco_freq_sel(clkout_dco); - } - - /* by-pass pll */ - read_clkctrl = readl(&adpll->clkctrl); - writel((read_clkctrl | ADPLLJ_CLKCTRL_IDLE), &adpll->clkctrl); - while ((readl(&adpll->status) & ADPLLJ_STATUS_BYPASSANDACK) - != ADPLLJ_STATUS_BYPASSANDACK) - ; - - /* clear TINITZ */ - read_clkctrl = readl(&adpll->clkctrl); - writel((read_clkctrl & ~ADPLLJ_CLKCTRL_TINITZ), &adpll->clkctrl); - - /* - * ref_clk = 20/(n + 1); - * clkout_dco = ref_clk * m; - * clk_out = clkout_dco/m2; - */ - read_clkctrl = readl(&adpll->clkctrl) & - ~(ADPLLJ_CLKCTRL_LPMODE | - ADPLLJ_CLKCTRL_DRIFTGUARDIAN | - ADPLLJ_CLKCTRL_REGM4XEN); - writel(m2nval, &adpll->m2ndiv); - writel(mn2val, &adpll->mn2div); - - /* Skip for modena(ADPLLS) */ - if (adpllj) { - writel(sig_val, &adpll->fracdiv); - writel((read_clkctrl | hs_mod), &adpll->clkctrl); - } - - /* Load M2, N2 dividers of ADPLL */ - writel(ADPLLJ_TENABLEDIV_ENB, &adpll->tenablediv); - writel(~ADPLLJ_TENABLEDIV_ENB, &adpll->tenablediv); - - /* Load M, N dividers of ADPLL */ - writel(ADPLLJ_TENABLE_ENB, &adpll->tenable); - writel(~ADPLLJ_TENABLE_ENB, &adpll->tenable); - - /* Configure CLKDCOLDOEN,CLKOUTLDOEN,CLKOUT Enable BITS */ - read_clkctrl = readl(&adpll->clkctrl) & ~ADPLLJ_CLKCTRL_CLKDCO; - if (adpllj) - writel((read_clkctrl | ADPLLJ_CLKCTRL_CLKDCO), - &adpll->clkctrl); - - /* Enable TINTZ and disable IDLE(PLL in Active & Locked Mode */ - read_clkctrl = readl(&adpll->clkctrl) & ~ADPLLJ_CLKCTRL_IDLE; - writel((read_clkctrl | ADPLLJ_CLKCTRL_TINITZ), &adpll->clkctrl); - - /* Wait for phase and freq lock */ - while ((readl(&adpll->status) & ADPLLJ_STATUS_PHSFRQLOCK) != - ADPLLJ_STATUS_PHSFRQLOCK) - ; -} - -static void unlock_pll_control_mmr(void) -{ - /* TRM 2.10.1.4 and 3.2.7-3.2.11 */ - writel(0x1EDA4C3D, 0x481C5040); - writel(0x2FF1AC2B, 0x48140060); - writel(0xF757FDC0, 0x48140064); - writel(0xE2BC3A6D, 0x48140068); - writel(0x1EBF131D, 0x4814006c); - writel(0x6F361E05, 0x48140070); -} - -static void mpu_pll_config(void) -{ - pll_config(MPU_PLL_BASE, MPU_N, MPU_M, MPU_M2, MPU_CLKCTRL, 0); -} - -static void l3_pll_config(void) -{ - u32 l3_osc_src, rd_osc_src = 0; - - l3_osc_src = L3_OSC_SRC; - rd_osc_src = readl(OSC_SRC_CTRL); - - if (OSC_SRC0 == l3_osc_src) - writel((rd_osc_src & 0xfffffffe)|0x0, OSC_SRC_CTRL); - else - writel((rd_osc_src & 0xfffffffe)|0x1, OSC_SRC_CTRL); - - pll_config(L3_PLL_BASE, L3_N, L3_M, L3_M2, L3_CLKCTRL, 1); -} - -void ddr_pll_config(unsigned int ddrpll_m) -{ - pll_config(DDR_PLL_BASE, DDR_N, DDR_M, DDR_M2, DDR_CLKCTRL, 1); -} - -void sata_pll_config(void) -{ - /* - * This sequence for configuring the SATA PLL - * resident in the control module is documented - * in TI8148 TRM section 21.3.1 - */ - writel(SATA_PLLCFG1, &spll->pllcfg1); - udelay(50); - - writel(SATA_PLLCFG3, &spll->pllcfg3); - udelay(50); - - writel(SATA_PLLCFG0_1, &spll->pllcfg0); - udelay(50); - - writel(SATA_PLLCFG0_2, &spll->pllcfg0); - udelay(50); - - writel(SATA_PLLCFG0_3, &spll->pllcfg0); - udelay(50); - - writel(SATA_PLLCFG0_4, &spll->pllcfg0); - udelay(50); - - while (((readl(&spll->pllstatus) & PLL_LOCK) == 0)) - ; -} - -void enable_dmm_clocks(void) -{ - writel(PRCM_MOD_EN, &cmdef->fwclkctrl); - writel(PRCM_MOD_EN, &cmdef->l3fastclkstctrl); - writel(PRCM_MOD_EN, &cmdef->emif0clkctrl); - while ((readl(&cmdef->emif0clkctrl)) != PRCM_MOD_EN) - ; - writel(PRCM_MOD_EN, &cmdef->emif1clkctrl); - while ((readl(&cmdef->emif1clkctrl)) != PRCM_MOD_EN) - ; - while ((readl(&cmdef->l3fastclkstctrl) & 0x300) != 0x300) - ; - writel(PRCM_MOD_EN, &cmdef->dmmclkctrl); - while ((readl(&cmdef->dmmclkctrl)) != PRCM_MOD_EN) - ; - writel(PRCM_MOD_EN, &cmalwon->l3slowclkstctrl); - while ((readl(&cmalwon->l3slowclkstctrl) & 0x2100) != 0x2100) - ; -} - -void setup_clocks_for_console(void) -{ - unlock_pll_control_mmr(); - /* UART0 */ - writel(PRCM_MOD_EN, &cmalwon->uart0clkctrl); - while (readl(&cmalwon->uart0clkctrl) != PRCM_MOD_EN) - ; -} - -void setup_early_clocks(void) -{ - setup_clocks_for_console(); -} - -/* - * Configure the PLL/PRCM for necessary peripherals - */ -void prcm_init(void) -{ - /* Enable the control module */ - writel(PRCM_MOD_EN, &cmalwon->controlclkctrl); - - /* Configure PLLs */ - mpu_pll_config(); - l3_pll_config(); - sata_pll_config(); - - /* Enable the required peripherals */ - enable_per_clocks(); -} diff --git a/arch/arm/mach-omap2/am33xx/emif4.c b/arch/arm/mach-omap2/am33xx/emif4.c index a5fdb0433d..bf3da43ed9 100644 --- a/arch/arm/mach-omap2/am33xx/emif4.c +++ b/arch/arm/mach-omap2/am33xx/emif4.c @@ -28,26 +28,6 @@ static struct cm_device_inst *cm_device = (struct cm_device_inst *)CM_DEVICE_INST; #endif -#ifdef CONFIG_TI814X -void config_dmm(const struct dmm_lisa_map_regs *regs) -{ - struct dmm_lisa_map_regs *hw_lisa_map_regs = - (struct dmm_lisa_map_regs *)DMM_BASE; - - enable_dmm_clocks(); - - writel(0, &hw_lisa_map_regs->dmm_lisa_map_3); - writel(0, &hw_lisa_map_regs->dmm_lisa_map_2); - writel(0, &hw_lisa_map_regs->dmm_lisa_map_1); - writel(0, &hw_lisa_map_regs->dmm_lisa_map_0); - - writel(regs->dmm_lisa_map_3, &hw_lisa_map_regs->dmm_lisa_map_3); - writel(regs->dmm_lisa_map_2, &hw_lisa_map_regs->dmm_lisa_map_2); - writel(regs->dmm_lisa_map_1, &hw_lisa_map_regs->dmm_lisa_map_1); - writel(regs->dmm_lisa_map_0, &hw_lisa_map_regs->dmm_lisa_map_0); -} -#endif - static void config_vtp(int nr) { writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_ENABLE, diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c index f955d49471..d104f23b3e 100644 --- a/arch/arm/mach-omap2/boot-common.c +++ b/arch/arm/mach-omap2/boot-common.c @@ -183,7 +183,7 @@ void save_omap_boot_params(void) gd->arch.omap_boot_mode = boot_mode; -#if !defined(CONFIG_TI814X) && !defined(CONFIG_TI816X) && \ +#if !defined(CONFIG_TI816X) && \ !defined(CONFIG_AM33XX) && !defined(CONFIG_AM43XX) /* CH flags */ diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index edcf967afd..1b575cc0f4 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -177,6 +177,29 @@ source "arch/arm/mach-tegra/tegra124/Kconfig" source "arch/arm/mach-tegra/tegra210/Kconfig" source "arch/arm/mach-tegra/tegra186/Kconfig" +config TEGRA_SPI + def_bool y + depends on TEGRA20_SFLASH || TEGRA20_SLINK || TEGRA114_SPI + +choice + prompt "UART to use for console" + depends on TEGRA_PINCTRL + default TEGRA_ENABLE_UARTA + +config TEGRA_ENABLE_UARTA + bool "Use UARTA" + +config TEGRA_ENABLE_UARTB + bool "Use UARTB" + +config TEGRA_ENABLE_UARTC + bool "Use UARTC" + +config TEGRA_ENABLE_UARTD + bool "Use UARTD" + +endchoice + config TEGRA_GPU bool "Enable setting up the GPU" depends on TEGRA124 || TEGRA210 diff --git a/arch/arm/mach-tegra/tegra20/Kconfig b/arch/arm/mach-tegra/tegra20/Kconfig index 345563fc78..955786c0c4 100644 --- a/arch/arm/mach-tegra/tegra20/Kconfig +++ b/arch/arm/mach-tegra/tegra20/Kconfig @@ -10,6 +10,12 @@ config TEGRA_PMU config TEGRA_CLOCK_SCALING bool +config TEGRA_UARTA_GPU + bool + +config TEGRA_UARTA_SDIO1 + bool + choice prompt "Tegra20 board select" optional @@ -43,6 +49,7 @@ config TARGET_TEC config TARGET_TRIMSLICE bool "Compulab TrimSlice board" select BOARD_LATE_INIT + select TEGRA_UARTA_GPU config TARGET_VENTANA bool "NVIDIA Tegra20 Ventana evaluation board" @@ -51,6 +58,7 @@ config TARGET_VENTANA config TARGET_COLIBRI_T20 bool "Toradex Colibri T20 board" select BOARD_LATE_INIT + select TEGRA_UARTA_SDIO1 endchoice diff --git a/arch/arm/mach-tegra/tegra30/Kconfig b/arch/arm/mach-tegra/tegra30/Kconfig index 85b8ce294f..5619d1cd42 100644 --- a/arch/arm/mach-tegra/tegra30/Kconfig +++ b/arch/arm/mach-tegra/tegra30/Kconfig @@ -1,5 +1,11 @@ if TEGRA30 +config TEGRA_VDD_CORE_TPS62361B_SET3 + bool + +config TEGRA_VDD_CORE_TPS62366A_SET1 + bool + choice prompt "Tegra30 board select" optional @@ -11,10 +17,12 @@ config TARGET_APALIS_T30 config TARGET_BEAVER bool "NVIDIA Tegra30 Beaver evaluation board" select BOARD_LATE_INIT + select TEGRA_VDD_CORE_TPS62366A_SET1 config TARGET_CARDHU bool "NVIDIA Tegra30 Cardhu evaluation board" select BOARD_LATE_INIT + select TEGRA_VDD_CORE_TPS62361B_SET3 config TARGET_COLIBRI_T30 bool "Toradex Colibri T30 board" diff --git a/arch/m68k/config.mk b/arch/m68k/config.mk index ed592334af..3ccbe49220 100644 --- a/arch/m68k/config.mk +++ b/arch/m68k/config.mk @@ -3,8 +3,6 @@ # (C) Copyright 2000-2002 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -CONFIG_STANDALONE_LOAD_ADDR ?= 0x20000 - PLATFORM_CPPFLAGS += -D__M68K__ KBUILD_LDFLAGS += -n PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections diff --git a/arch/microblaze/config.mk b/arch/microblaze/config.mk index d35b4f6db7..467c5ca1b1 100644 --- a/arch/microblaze/config.mk +++ b/arch/microblaze/config.mk @@ -6,8 +6,6 @@ # (C) Copyright 2004 Atmark Techno, Inc. # Yasushi SHOJI <yashi@atmark-techno.com> -CONFIG_STANDALONE_LOAD_ADDR ?= 0x80F00000 - PLATFORM_CPPFLAGS += -ffixed-r31 -D__microblaze__ PLATFORM_CPPFLAGS += -fdata-sections -ffunction-sections diff --git a/arch/mips/config.mk b/arch/mips/config.mk index 04f3627805..745f03190e 100644 --- a/arch/mips/config.mk +++ b/arch/mips/config.mk @@ -25,14 +25,12 @@ ifdef CONFIG_32BIT PLATFORM_CPPFLAGS += -mabi=32 KBUILD_LDFLAGS += -m $(32bit-emul) OBJCOPYFLAGS += -O $(32bit-bfd) -CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 endif ifdef CONFIG_64BIT PLATFORM_CPPFLAGS += -mabi=64 KBUILD_LDFLAGS += -m$(64bit-emul) OBJCOPYFLAGS += -O $(64bit-bfd) -CONFIG_STANDALONE_LOAD_ADDR ?= 0xffffffff80200000 endif PLATFORM_CPPFLAGS += -D__MIPS__ diff --git a/arch/nios2/config.mk b/arch/nios2/config.mk index 44260b1431..b18b9b78ab 100644 --- a/arch/nios2/config.mk +++ b/arch/nios2/config.mk @@ -4,8 +4,6 @@ # Psyent Corporation <www.psyent.com> # Scott McNutt <smcnutt@psyent.com> -CONFIG_STANDALONE_LOAD_ADDR ?= 0x02000000 - PLATFORM_CPPFLAGS += -D__NIOS2__ PLATFORM_CPPFLAGS += -G0 diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 0fc4ceda00..e0801c2594 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -68,4 +68,16 @@ source "arch/powerpc/cpu/mpc85xx/Kconfig" source "arch/powerpc/cpu/mpc8xx/Kconfig" source "arch/powerpc/lib/Kconfig" +config USE_UBOOTPATH + bool "Set a default 'uboot' value in the environment" + help + Many default environment scripts will check the "uboot" variable + to determine the name of the file to load via tftp that will then + be written to flash. + +config UBOOTPATH + string "Value of the default 'uboot' value in the environment" + depends on USE_UBOOTPATH + default "u-boot.bin" + endmenu diff --git a/arch/powerpc/config.mk b/arch/powerpc/config.mk index 307ca65745..725a4f48aa 100644 --- a/arch/powerpc/config.mk +++ b/arch/powerpc/config.mk @@ -3,7 +3,6 @@ # (C) Copyright 2000-2010 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -CONFIG_STANDALONE_LOAD_ADDR ?= 0x40000 LDFLAGS_FINAL += --gc-sections LDFLAGS_FINAL += --bss-plt PLATFORM_RELFLAGS += -fpic -mrelocatable -ffunction-sections \ diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c index 8d531898bd..a6c063556e 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu.c +++ b/arch/powerpc/cpu/mpc83xx/cpu.c @@ -180,24 +180,6 @@ void watchdog_reset (void) } #endif -#ifndef CONFIG_DM_ETH -/* - * Initializes on-chip ethernet controllers. - * to override, implement board_eth_init() - */ -int cpu_eth_init(struct bd_info *bis) -{ -#if defined(CONFIG_UEC_ETH) - uec_standard_init(bis); -#endif - -#if defined(CONFIG_TSEC_ENET) - tsec_standard_init(bis); -#endif - return 0; -} -#endif /* !CONFIG_DM_ETH */ - /* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init() diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index f2361560e9..3275d4fa9b 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1,6 +1,19 @@ menu "mpc85xx CPU" depends on MPC85xx +config PPC_SPINTABLE_COMPATIBLE + depends on MP + def_bool y + help + To comply with ePAPR 1.1, the spin table has been moved to + cache-enabled memory. Old OS may not work with this change. A patch + is waiting to be accepted for Linux kernel. Other OS needs similar + fix to spin table. For OSes with old spin table code, we can enable + this temporary fix by setting environmental variable + "spin_table_compat". For new OSes, set "spin_table_compat=no". After + Linux is fixed, we can remove this macro and related code. For now, + it is enabled by default. + config SYS_CPU default "mpc85xx" @@ -187,14 +200,6 @@ config TARGET_T1024RDB imply CMD_EEPROM imply PANIC_HANG -config TARGET_T1042RDB - bool "Support T1042RDB" - select ARCH_T1042 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select PHYS_64BIT - select SYS_L3_SIZE_256KB - config TARGET_T1042D4RDB bool "Support T1042D4RDB" select ARCH_T1042 @@ -204,15 +209,6 @@ config TARGET_T1042D4RDB select SYS_L3_SIZE_256KB imply PANIC_HANG -config TARGET_T1042RDB_PI - bool "Support T1042RDB_PI" - select ARCH_T1042 - select BOARD_LATE_INIT if CHAIN_OF_TRUST - select SUPPORT_SPL - select PHYS_64BIT - select SYS_L3_SIZE_256KB - imply PANIC_HANG - config TARGET_T2080QDS bool "Support T2080QDS" select ARCH_T2080 @@ -1297,6 +1293,9 @@ config SYS_NUM_TLBCAMS Number of TLB CAM entries for Book-E chips. 64 for E500MC, 16 for other E500 SoCs. +config L2_CACHE + bool "Enable L2 cache support" + if HETROGENOUS_CLUSTERS config SYS_MAPLE @@ -1324,6 +1323,11 @@ config SYS_ULB_CLK config SYS_ETVPE_CLK int default 1 + +config MAX_DSP_CPUS + int + default 12 if ARCH_B4860 + default 2 if ARCH_B4420 endif config SYS_L2_SIZE_256KB diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c index 7f20190922..73d28f2a4e 100644 --- a/arch/powerpc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -343,29 +343,3 @@ int fixup_cpu(void) #endif return 0; } - -#ifndef CONFIG_DM_ETH -/* - * Initializes on-chip ethernet controllers. - * to override, implement board_eth_init() - */ -int cpu_eth_init(struct bd_info *bis) -{ -#if defined(CONFIG_UEC_ETH) - uec_standard_init(bis); -#endif - -#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC) - tsec_standard_init(bis); -#endif - -#ifdef CONFIG_FMAN_ENET - fm_standard_init(bis); -#endif - -#ifdef CONFIG_VSC9953 - vsc9953_init(bis); -#endif - return 0; -} -#endif diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c index dc1bc0db42..c0b4a1217d 100644 --- a/arch/powerpc/cpu/mpc8xxx/srio.c +++ b/arch/powerpc/cpu/mpc8xxx/srio.c @@ -33,17 +33,17 @@ #define _DEVDISR_SRIO2 FSL_CORENET_DEVDISR_SRIO2 #endif #define _DEVDISR_RMU FSL_CORENET_DEVDISR_RMU - #define CONFIG_SYS_MPC8xxx_GUTS_ADDR CFG_SYS_MPC85xx_GUTS_ADDR + #define CFG_SYS_MPC8xxx_GUTS_ADDR CFG_SYS_MPC85xx_GUTS_ADDR #elif defined(CONFIG_MPC85xx) #define _DEVDISR_SRIO1 MPC85xx_DEVDISR_SRIO #define _DEVDISR_SRIO2 MPC85xx_DEVDISR_SRIO #define _DEVDISR_RMU MPC85xx_DEVDISR_RMSG - #define CONFIG_SYS_MPC8xxx_GUTS_ADDR CFG_SYS_MPC85xx_GUTS_ADDR + #define CFG_SYS_MPC8xxx_GUTS_ADDR CFG_SYS_MPC85xx_GUTS_ADDR #elif defined(CONFIG_MPC86xx) #define _DEVDISR_SRIO1 MPC86xx_DEVDISR_SRIO #define _DEVDISR_SRIO2 MPC86xx_DEVDISR_SRIO #define _DEVDISR_RMU MPC86xx_DEVDISR_RMSG - #define CONFIG_SYS_MPC8xxx_GUTS_ADDR \ + #define CFG_SYS_MPC8xxx_GUTS_ADDR \ (&((immap_t *)CONFIG_SYS_IMMR)->im_gur) #else #error "No defines for DEVDISR_SRIO" @@ -230,7 +230,7 @@ host_ok: void srio_init(void) { - ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC8xxx_GUTS_ADDR; + ccsr_gur_t *gur = (void *)CFG_SYS_MPC8xxx_GUTS_ADDR; int srio1_used = 0, srio2_used = 0; u32 *devdisr; diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 1b5b4947f1..246bcb9fe4 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -8,12 +8,6 @@ /* SoC specific defines for Freescale MPC85xx (PQ3) and QorIQ processors */ -/* - * This macro should be removed when we no longer care about backwards - * compatibility with older operating systems. - */ -#define CONFIG_PPC_SPINTABLE_COMPATIBLE - #include <fsl_ddrc_version.h> #if defined(CONFIG_ARCH_MPC8548) @@ -23,7 +17,6 @@ #define CFG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 #elif defined(CONFIG_ARCH_P1010) -#define CONFIG_FSL_SDHC_V2_3 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 4 #elif defined(CONFIG_ARCH_P1021) @@ -93,11 +86,9 @@ #define CFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000 #elif defined(CONFIG_ARCH_BSC9131) -#define CONFIG_FSL_SDHC_V2_3 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 3 #elif defined(CONFIG_ARCH_BSC9132) -#define CONFIG_FSL_SDHC_V2_3 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 3 #elif defined(CONFIG_ARCH_T4240) @@ -136,8 +127,6 @@ #define CFG_SYS_FM_MURAM_SIZE 0x60000 #ifdef CONFIG_ARCH_B4860 -#define CONFIG_MAX_DSP_CPUS 12 -#define CONFIG_NUM_DSP_CPUS 6 #define CFG_SYS_FSL_CLUSTER_CLOCKS { 1, 4, 4, 4 } #define CFG_SYS_NUM_FM1_DTSEC 6 #define CFG_SYS_NUM_FM1_10GEC 2 @@ -145,7 +134,6 @@ #define CFG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CFG_SYS_FSL_SRIO_IB_WIN_NUM 5 #else -#define CONFIG_MAX_DSP_CPUS 2 #define CFG_SYS_FSL_CLUSTER_CLOCKS { 1, 4 } #define CFG_SYS_NUM_FM1_DTSEC 4 #define CFG_SYS_NUM_FM1_10GEC 0 @@ -173,7 +161,6 @@ #define CFG_SYS_NUM_FMAN 1 #define CFG_SYS_NUM_FM1_DTSEC 4 #define CFG_SYS_NUM_FM1_10GEC 1 -#define CONFIG_FSL_FM_10GEC_REGULAR_NOTATION #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CFG_SYS_FM1_CLK 0 #define CONFIG_QBMAN_CLK_DIV 1 @@ -204,7 +191,6 @@ #elif defined(CONFIG_ARCH_C29X) -#define CONFIG_FSL_SDHC_V2_3 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CFG_SYS_FSL_SEC_IDX_OFFSET 0x20000 diff --git a/arch/powerpc/include/asm/fsl_dma.h b/arch/powerpc/include/asm/fsl_dma.h index 727f4a7e92..1459db74be 100644 --- a/arch/powerpc/include/asm/fsl_dma.h +++ b/arch/powerpc/include/asm/fsl_dma.h @@ -117,7 +117,7 @@ typedef struct fsl_dma { void dma_init(void); int dmacpy(phys_addr_t dest, phys_addr_t src, phys_size_t n); #if (defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)) -void dma_meminit(uint val, uint size); +void dma_meminit(uint size); #endif #endif diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index e8b2680206..236098e718 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -17,9 +17,7 @@ #if defined(CONFIG_TARGET_T2080QDS) || \ defined(CONFIG_TARGET_T2080RDB) || \ - defined(CONFIG_TARGET_T1042RDB) || \ defined(CONFIG_TARGET_T1042D4RDB) || \ - defined(CONFIG_TARGET_T1042RDB_PI) || \ defined(CONFIG_ARCH_T1024) #undef CFG_SYS_INIT_L3_ADDR #define CFG_SYS_INIT_L3_ADDR 0xbff00000 @@ -35,24 +33,6 @@ #define CFG_SYS_INIT_L3_ADDR 0xbff00000 #endif #endif - -#if defined(CONFIG_ARCH_P3041) || \ - defined(CONFIG_ARCH_P4080) || \ - defined(CONFIG_ARCH_P5040) || \ - defined(CONFIG_ARCH_P2041) - #define CONFIG_FSL_TRUST_ARCH_v1 -#endif - -#if defined(CONFIG_FSL_CORENET) && !defined(CONFIG_SYS_RAMBOOT) -/* The key used for verification of next level images - * is picked up from an Extension Table which has - * been verified by the ISBC (Internal Secure boot Code) - * in boot ROM of the SoC. - * The feature is only applicable in case of NOR boot and is - * not applicable in case of RAMBOOT (NAND, SD, SPI). - */ -#define CONFIG_FSL_ISBC_KEY_EXT -#endif #endif /* #ifdef CONFIG_NXP_ESBC */ #ifdef CONFIG_CHAIN_OF_TRUST diff --git a/arch/riscv/config.mk b/arch/riscv/config.mk index 1ebce5bd67..a8ed3faf28 100644 --- a/arch/riscv/config.mk +++ b/arch/riscv/config.mk @@ -23,8 +23,6 @@ KBUILD_LDFLAGS += -m $(64bit-emul) EFI_LDS := elf_riscv64_efi.lds endif -CONFIG_STANDALONE_LOAD_ADDR ?= 0x00000000 - PLATFORM_CPPFLAGS += -ffixed-gp -fpic PLATFORM_RELFLAGS += -fno-common -gdwarf-2 -ffunction-sections \ -fdata-sections diff --git a/arch/sandbox/include/asm/config.h b/arch/sandbox/include/asm/config.h index 50215b35d7..87b9d23b37 100644 --- a/arch/sandbox/include/asm/config.h +++ b/arch/sandbox/include/asm/config.h @@ -6,14 +6,4 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#define CONFIG_SANDBOX_ARCH - -/* Used by drivers/spi/sandbox_spi.c and arch/sandbox/include/asm/state.h */ -#ifndef CONFIG_SANDBOX_SPI_MAX_BUS -#define CONFIG_SANDBOX_SPI_MAX_BUS 1 -#endif -#ifndef CONFIG_SANDBOX_SPI_MAX_CS -#define CONFIG_SANDBOX_SPI_MAX_CS 10 -#endif - #endif diff --git a/arch/sh/config.mk b/arch/sh/config.mk index 78bb2660e1..a408264d4b 100644 --- a/arch/sh/config.mk +++ b/arch/sh/config.mk @@ -3,7 +3,6 @@ # (C) Copyright 2000-2002 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -CONFIG_STANDALONE_LOAD_ADDR ?= 0x8C000000 ifeq ($(CPU),sh2) LDFLAGS_STANDALONE += -EB endif diff --git a/arch/x86/config.mk b/arch/x86/config.mk index 889497b6bd..a4a694ddf3 100644 --- a/arch/x86/config.mk +++ b/arch/x86/config.mk @@ -3,8 +3,6 @@ # (C) Copyright 2000-2002 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -CONFIG_STANDALONE_LOAD_ADDR ?= 0x40000 - PLATFORM_CPPFLAGS += -fomit-frame-pointer PF_CPPFLAGS_X86 := $(call cc-option, -fno-toplevel-reorder, \ $(call cc-option, -fno-unit-at-a-time)) diff --git a/arch/xtensa/include/asm/config.h b/arch/xtensa/include/asm/config.h index a1096ab196..21b334b938 100644 --- a/arch/xtensa/include/asm/config.h +++ b/arch/xtensa/include/asm/config.h @@ -14,7 +14,6 @@ * restricting used physical memory to the first 128MB. */ #if XCHAL_HAVE_PTP_MMU -#define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED (128 << 20) #endif diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c index f44ac3315e..581e2e084d 100644 --- a/board/Marvell/openrd/openrd.c +++ b/board/Marvell/openrd/openrd.c @@ -140,7 +140,7 @@ void mv_phy_init(char *name) /* reset the phy */ miiphy_reset(name, devadr); - printf(PHY_NO" Initialized on %s\n", name); + printf("Initialized on %s\n", name); } void reset_phy(void) diff --git a/board/cobra5272/README b/board/cobra5272/README index ac62e557a0..11abcfacdb 100644 --- a/board/cobra5272/README +++ b/board/cobra5272/README @@ -77,21 +77,16 @@ in dir ./u-boot-x-x-x/ please first check: - in ./include/configs/cobra5272.h + in ./configs/cobra5272_defconfig - CONFIG_MONITOR_IS_IN_RAM has to be undefined, e. g. as follows: - - #if 0 - #define CONFIG_MONITOR_IS_IN_RAM - /* define if monitor is started from a pre-loader */ - #endif + CONFIG_MONITOR_IS_IN_RAM has to be not present in the file => u-boot as single bootloader starting from flash - in board/cobra5272/config.mk CONFIG_TEXT_BASE should be + in configs/cobra5272_defconfig CONFIG_TEXT_BASE should be - CONFIG_TEXT_BASE = 0xffe00000 + CONFIG_TEXT_BASE=0xffe00000 => linking address for u-boot as single bootloader stored in flash @@ -115,22 +110,18 @@ in dir ./u-boot-x-x-x/ host> make distclean please modify the settings: + in ./configs/cobra5272_defconfig - in ./include/configs/cobra5272.h - - CONFIG_MONITOR_IS_IN_RAM now has to be defined, e. g. as follows: + CONFIG_MONITOR_IS_IN_RAM now has to be enabled, e. g. as follows: - #if 1 - #define CONFIG_MONITOR_IS_IN_RAM - /*define if monitor is started from a pre-loader */ - #endif + CONFIG_MONITOR_IS_IN_RAM=y => u-boot as RAM version, chainloaded by another bootloader or using bdm cable - in board/cobra5272/config.mk CONFIG_TEXT_BASE should be + in configs/cobra5272_defconfig CONFIG_TEXT_BASE should be - CONFIG_TEXT_BASE = 0x00020000 + CONFIG_TEXT_BASE=0x00020000 => target linking address for RAM diff --git a/board/davinci/da8xxevm/Kconfig b/board/davinci/da8xxevm/Kconfig index c5499a63fd..34055f6975 100644 --- a/board/davinci/da8xxevm/Kconfig +++ b/board/davinci/da8xxevm/Kconfig @@ -37,6 +37,9 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "omapl138_lcdk" +config NAND_6BYTES_OOB_FREE_10BYTES_ECC + def_bool y + endif source "board/ti/common/Kconfig" diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c index 9ca350ed46..029d06bbf9 100644 --- a/board/freescale/common/fsl_chain_of_trust.c +++ b/board/freescale/common/fsl_chain_of_trust.c @@ -143,7 +143,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) (image_entry_noargs_t)(unsigned long)spl_image->entry_point; hdr_addr = (spl_image->entry_point + spl_image->size - - CONFIG_U_BOOT_HDR_SIZE); + FSL_U_BOOT_HDR_SIZE); spl_validate_uboot(hdr_addr, (uintptr_t)spl_image->entry_point); /* * In case of failure in validation, spl_validate_uboot would diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c index 285ed9afcc..bfe6357b0d 100644 --- a/board/freescale/common/fsl_validate.c +++ b/board/freescale/common/fsl_validate.c @@ -29,7 +29,7 @@ #define CHECK_KEY_LEN(key_len) (((key_len) == 2 * KEY_SIZE_BYTES / 4) || \ ((key_len) == 2 * KEY_SIZE_BYTES / 2) || \ ((key_len) == 2 * KEY_SIZE_BYTES)) -#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) /* Global data structure */ static struct fsl_secboot_glb glb; #endif @@ -63,7 +63,7 @@ self: goto self; } -#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) static u32 check_ie(struct fsl_secboot_img_priv *img) { if (img->hdr.ie_flag & IE_FLAG_MASK) @@ -188,7 +188,7 @@ static u32 check_srk(struct fsl_secboot_img_priv *img) { #ifdef CONFIG_ESBC_HDR_LS /* In LS, No SRK Flag as SRK is always present if IE not present*/ -#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) return !check_ie(img); #endif return 1; @@ -278,7 +278,7 @@ static u32 read_validate_single_key(struct fsl_secboot_img_priv *img) } #endif /* CONFIG_ESBC_HDR_LS */ -#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) static void install_ie_tbl(uintptr_t ie_tbl_addr, struct fsl_secboot_img_priv *img) @@ -434,7 +434,7 @@ void fsl_secboot_handle_error(int error) case ERROR_ESBC_CLIENT_HEADER_INVALID_KEY_NUM: case ERROR_ESBC_CLIENT_HEADER_INV_SRK_ENTRY_KEYLEN: #endif -#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) /*@fallthrough@*/ case ERROR_ESBC_CLIENT_HEADER_IE_KEY_REVOKED: case ERROR_ESBC_CLIENT_HEADER_INVALID_IE_NUM_ENTRY: @@ -571,7 +571,7 @@ static int calc_esbchdr_esbc_hash(struct fsl_secboot_img_priv *img) key_hash = 1; } #endif -#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) if (!key_hash && check_ie(img)) key_hash = 1; #endif @@ -705,7 +705,7 @@ static int read_validate_esbc_client_header(struct fsl_secboot_img_priv *img) } #endif -#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) if (!key_found && check_ie(img)) { ret = read_validate_ie_tbl(img); if (ret != 0) @@ -851,7 +851,7 @@ static int secboot_init(struct fsl_secboot_img_priv **img_ptr) return -ENOMEM; memset(img, 0, sizeof(struct fsl_secboot_img_priv)); -#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) if (glb.ie_addr) img->ie_addr = glb.ie_addr; #endif @@ -952,7 +952,7 @@ int fsl_secboot_validate(uintptr_t haddr, char *arg_hash_str, else ret = memcmp(srk_hash, img->img_key_hash, SHA256_BYTES); -#if defined(CONFIG_FSL_ISBC_KEY_EXT) +#if CONFIG_IS_ENABLED(FSL_ISBC_KEY_EXT) if (!hash_cmd && check_ie(img)) ret = 0; #endif diff --git a/board/freescale/t104xrdb/Kconfig b/board/freescale/t104xrdb/Kconfig index e33d317365..e4814915e3 100644 --- a/board/freescale/t104xrdb/Kconfig +++ b/board/freescale/t104xrdb/Kconfig @@ -1,6 +1,4 @@ -if TARGET_T1040RDB || TARGET_T1040D4RDB || \ - TARGET_T1042RDB || TARGET_T1042D4RDB || \ - TARGET_T1042RDB_PI +if TARGET_T1042D4RDB config SYS_BOARD default "t104xrdb" diff --git a/board/freescale/t104xrdb/cpld.h b/board/freescale/t104xrdb/cpld.h index 769883f946..0384202fbc 100644 --- a/board/freescale/t104xrdb/cpld.h +++ b/board/freescale/t104xrdb/cpld.h @@ -20,7 +20,7 @@ struct cpld_data { u8 int_status; /* 0x12 - Interrupt status Register */ u8 flash_ctl_status; /* 0x13 - Flash control and status register */ u8 fan_ctl_status; /* 0x14 - Fan control and status register */ -#if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) u8 int_mask; /* 0x15 - Interrupt mask Register */ #else u8 led_ctl_status; /* 0x15 - LED control and status register */ diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c index fe51d68c7b..3906c8381e 100644 --- a/board/freescale/t104xrdb/eth.c +++ b/board/freescale/t104xrdb/eth.c @@ -22,10 +22,6 @@ int board_eth_init(struct bd_info *bis) struct memac_mdio_info memac_mdio_info; unsigned int i; int phy_addr = 0; -#ifdef CONFIG_VSC9953 - phy_interface_t phy_int; - struct mii_dev *bus; -#endif printf("Initializing Fman\n"); @@ -43,25 +39,6 @@ int board_eth_init(struct bd_info *bis) int idx = i - FM1_DTSEC1; switch (fm_info_get_enet_if(i)) { -#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1040D4RDB) - case PHY_INTERFACE_MODE_SGMII: - /* T1040RDB & T1040D4RDB only supports SGMII on - * DTSEC3 - */ - fm_info_set_phy_address(FM1_DTSEC3, - CFG_SYS_SGMII1_PHY_ADDR); - break; -#endif -#ifdef CONFIG_TARGET_T1042RDB - case PHY_INTERFACE_MODE_SGMII: - /* T1042RDB doesn't supports SGMII on DTSEC1 & DTSEC2 */ - if ((FM1_DTSEC1 == i) || (FM1_DTSEC2 == i)) - fm_info_set_phy_address(i, 0); - /* T1042RDB only supports SGMII on DTSEC3 */ - fm_info_set_phy_address(FM1_DTSEC3, - CFG_SYS_SGMII1_PHY_ADDR); - break; -#endif #ifdef CONFIG_TARGET_T1042D4RDB case PHY_INTERFACE_MODE_SGMII: /* T1042D4RDB supports SGMII on DTSEC1, DTSEC2 @@ -107,48 +84,6 @@ int board_eth_init(struct bd_info *bis) DEFAULT_FM_MDIO_NAME)); } -#ifdef CONFIG_VSC9953 - /* SerDes configured for QSGMII */ - if (serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_A) >= 0) { - for (i = 0; i < 4; i++) { - bus = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); - phy_addr = CFG_SYS_FM1_QSGMII11_PHY_ADDR + i; - phy_int = PHY_INTERFACE_MODE_QSGMII; - - vsc9953_port_info_set_mdio(i, bus); - vsc9953_port_info_set_phy_address(i, phy_addr); - vsc9953_port_info_set_phy_int(i, phy_int); - vsc9953_port_enable(i); - } - } - if (serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_B) >= 0) { - for (i = 4; i < 8; i++) { - bus = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); - phy_addr = CFG_SYS_FM1_QSGMII21_PHY_ADDR + i - 4; - phy_int = PHY_INTERFACE_MODE_QSGMII; - - vsc9953_port_info_set_mdio(i, bus); - vsc9953_port_info_set_phy_address(i, phy_addr); - vsc9953_port_info_set_phy_int(i, phy_int); - vsc9953_port_enable(i); - } - } - - /* Connect DTSEC1 to L2 switch if it doesn't have a PHY */ - if (serdes_get_first_lane(FSL_SRDS_1, SGMII_FM1_DTSEC1) < 0) - vsc9953_port_enable(8); - - /* Connect DTSEC2 to L2 switch if it doesn't have a PHY */ - if (serdes_get_first_lane(FSL_SRDS_1, SGMII_FM1_DTSEC2) < 0) { - /* Enable L2 On MAC2 using SCFG */ - struct ccsr_scfg *scfg = (struct ccsr_scfg *) - CFG_SYS_MPC85xx_SCFG; - - out_be32(&scfg->esgmiiselcr, in_be32(&scfg->esgmiiselcr) | - (0x80000000)); - vsc9953_port_enable(9); - } -#endif cpu_eth_init(bis); #endif diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c index 45ebdd3000..8cec71217a 100644 --- a/board/freescale/t104xrdb/t104xrdb.c +++ b/board/freescale/t104xrdb/t104xrdb.c @@ -34,7 +34,7 @@ int checkboard(void) struct cpu_type *cpu = gd->arch.cpu; u8 sw; -#if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) printf("Board: %sD4RDB\n", cpu->name); #else printf("Board: %sRDB\n", cpu->name); @@ -110,23 +110,6 @@ int misc_init_r(void) CPLD_WRITE(misc_ctl_status, CPLD_READ(misc_ctl_status) | MISC_CTL_SG_SEL | MISC_CTL_AURORA_SEL); -#if defined(CONFIG_TARGET_T1040D4RDB) - if (hwconfig("qe-tdm")) { - CPLD_WRITE(sfp_ctl_status, CPLD_READ(sfp_ctl_status) | - MISC_MUX_QE_TDM); - printf("QECSR : 0x%02x, mux to qe-tdm\n", - CPLD_READ(sfp_ctl_status)); - } - /* Mask all CPLD interrupt sources, except QSGMII interrupts */ - if (CPLD_READ(sw_ver) < 0x03) { - debug("CPLD SW version 0x%02x doesn't support int_mask\n", - CPLD_READ(sw_ver)); - } else { - CPLD_WRITE(int_mask, CPLD_INT_MASK_ALL & - ~(CPLD_INT_MASK_QSGMII1 | CPLD_INT_MASK_QSGMII2)); - } -#endif - return 0; } diff --git a/board/google/Kconfig b/board/google/Kconfig index c57e518c33..0474b4e693 100644 --- a/board/google/Kconfig +++ b/board/google/Kconfig @@ -6,6 +6,10 @@ if VENDOR_GOOGLE config BIOSEMU bool + select X86EMU_RAW_IO + +config X86EMU_RAW_IO + bool choice prompt "Mainboard model" diff --git a/board/samsung/common/gadget.c b/board/samsung/common/gadget.c index 6d783e61e0..9487f9ec4e 100644 --- a/board/samsung/common/gadget.c +++ b/board/samsung/common/gadget.c @@ -7,14 +7,20 @@ #include <common.h> #include <linux/usb/ch9.h> +#define EXYNOS_G_DNL_THOR_VENDOR_NUM 0x04E8 +#define EXYNOS_G_DNL_THOR_PRODUCT_NUM 0x685D + +#define EXYNOS_G_DNL_UMS_VENDOR_NUM 0x0525 +#define EXYNOS_G_DNL_UMS_PRODUCT_NUM 0xA4A5 + int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) { if (!strcmp(name, "usb_dnl_thor")) { - put_unaligned(CONFIG_G_DNL_THOR_VENDOR_NUM, &dev->idVendor); - put_unaligned(CONFIG_G_DNL_THOR_PRODUCT_NUM, &dev->idProduct); + put_unaligned(EXYNOS_G_DNL_THOR_VENDOR_NUM, &dev->idVendor); + put_unaligned(EXYNOS_G_DNL_THOR_PRODUCT_NUM, &dev->idProduct); } else if (!strcmp(name, "usb_dnl_ums")) { - put_unaligned(CONFIG_G_DNL_UMS_VENDOR_NUM, &dev->idVendor); - put_unaligned(CONFIG_G_DNL_UMS_PRODUCT_NUM, &dev->idProduct); + put_unaligned(EXYNOS_G_DNL_UMS_VENDOR_NUM, &dev->idVendor); + put_unaligned(EXYNOS_G_DNL_UMS_PRODUCT_NUM, &dev->idProduct); } else { put_unaligned(CONFIG_USB_GADGET_VENDOR_NUM, &dev->idVendor); put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct); diff --git a/board/samsung/smdkv310/Kconfig b/board/samsung/smdkv310/Kconfig index a6fd657697..cf5ac17074 100644 --- a/board/samsung/smdkv310/Kconfig +++ b/board/samsung/smdkv310/Kconfig @@ -1,5 +1,8 @@ if TARGET_SMDKV310 +config MIU_2BIT_INTERLEAVED + def_bool y + config SYS_BOARD default "smdkv310" diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c index 2efede62aa..8fa9197a6d 100644 --- a/board/siemens/common/board.c +++ b/board/siemens/common/board.c @@ -93,7 +93,7 @@ int board_init(void) gpmc_init(); -#ifdef CONFIG_NAND_CS_INIT +#if CONFIG_IS_ENABLED(NAND_CS_INIT) board_nand_cs_init(); #endif diff --git a/board/siemens/draco/Kconfig b/board/siemens/draco/Kconfig index a699c7d46f..1eb8a4886f 100644 --- a/board/siemens/draco/Kconfig +++ b/board/siemens/draco/Kconfig @@ -60,4 +60,6 @@ config SYS_SOC config SYS_CONFIG_NAME default "etamin" +config NAND_CS_INIT + def_bool y endif diff --git a/board/siemens/draco/board.c b/board/siemens/draco/board.c index f898bba4b0..8874659013 100644 --- a/board/siemens/draco/board.c +++ b/board/siemens/draco/board.c @@ -370,7 +370,14 @@ U_BOOT_CMD( #endif /* #if defined(CONFIG_DRIVER_TI_CPSW) */ #endif /* #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) */ -#ifdef CONFIG_NAND_CS_INIT +#if CONFIG_IS_ENABLED(NAND_CS_INIT) +#define ETAMIN_NAND_GPMC_CONFIG1 0x00000800 +#define ETAMIN_NAND_GPMC_CONFIG2 0x001e1e00 +#define ETAMIN_NAND_GPMC_CONFIG3 0x001e1e00 +#define ETAMIN_NAND_GPMC_CONFIG4 0x16051807 +#define ETAMIN_NAND_GPMC_CONFIG5 0x00151e1e +#define ETAMIN_NAND_GPMC_CONFIG6 0x16000f80 + /* GPMC definitions for second nand cs1 */ static const u32 gpmc_nand_config[] = { ETAMIN_NAND_GPMC_CONFIG1, diff --git a/board/sysam/stmark2/Kconfig b/board/sysam/stmark2/Kconfig index 49d02744a9..b2595059c6 100644 --- a/board/sysam/stmark2/Kconfig +++ b/board/sysam/stmark2/Kconfig @@ -6,6 +6,10 @@ config CF_SBF config EXTRA_CLOCK def_bool y +config SERIAL_BOOT + def_bool y + depends on CF_SBF + config SYS_INPUT_CLKSRC hex default 30000000 diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c index 0808ca1a54..06009d8ad5 100644 --- a/board/timll/devkit8000/devkit8000.c +++ b/board/timll/devkit8000/devkit8000.c @@ -76,10 +76,11 @@ int board_init(void) } /* Configure GPMC registers for DM9000 */ +#define DM9000_BASE 0x2c000000 static void gpmc_dm9000_config(void) { enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6], - CONFIG_DM9000_BASE, GPMC_SIZE_16M); + DM9000_BASE, GPMC_SIZE_16M); } /* @@ -100,9 +101,7 @@ int misc_init_r(void) #endif #ifdef CONFIG_DRIVER_DM9000 - /* Configure GPMC registers for DM9000 */ - enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6], - CONFIG_DM9000_BASE, GPMC_SIZE_16M); + gpmc_dm9000_config(); /* Use OMAP DIE_ID as MAC address */ if (!eth_env_get_enetaddr("ethaddr", enetaddr)) { diff --git a/cmd/Kconfig b/cmd/Kconfig index d93731f2af..47d2ef04a2 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -526,6 +526,10 @@ config CMD_THOR_DOWNLOAD There is no documentation about this within the U-Boot source code but you should be able to find something on the interwebs. +config THOR_RESET_OFF + bool "thor: Disable reset on completion" + depends on CMD_THOR_DOWNLOAD + config CMD_ZBOOT bool "zboot - x86 boot command" help @@ -98,7 +98,7 @@ static uint i2c_mm_last_alen; * pairs. The following macros take care of this */ #if defined(CFG_SYS_I2C_NOPROBES) -#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) +#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) static struct { uchar bus; @@ -1764,8 +1764,7 @@ static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc, * Returns zero on success, CMD_RET_USAGE in case of misuse and negative * on error. */ -#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) || \ - CONFIG_IS_ENABLED(DM_I2C) +#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C) static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -1915,10 +1914,9 @@ static struct cmd_tbl cmd_i2c_sub[] = { U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""), #endif U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""), -#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || \ - defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C) +#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C) U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""), -#endif /* CONFIG_I2C_MULTI_BUS */ +#endif #if defined(CONFIG_I2C_EDID) U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""), #endif /* CONFIG_I2C_EDID */ @@ -1992,10 +1990,9 @@ static char i2c_help_text[] = "i2c " /* That's the prefix for the crc32 command below. */ #endif "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" -#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || \ - defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C) +#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C) "i2c dev [dev] - show or set current I2C bus\n" -#endif /* CONFIG_I2C_MULTI_BUS */ +#endif #if defined(CONFIG_I2C_EDID) "i2c edid chip - print EDID configuration information\n" #endif /* CONFIG_I2C_EDID */ diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 1657c2ca96..f0f7acead7 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1347,7 +1347,7 @@ config SPL_USB_HOST config SPL_USB_STORAGE bool "Support loading from USB" - depends on SPL_USB_HOST && !(BLK && !DM_USB) + depends on SPL_USB_HOST help Enable support for USB devices in SPL. This allows use of USB devices such as hard drives and flash drivers for loading U-Boot. diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig index 28966e0d0a..7dc9d2ed27 100644 --- a/configs/10m50_defconfig +++ b/configs/10m50_defconfig @@ -1,5 +1,6 @@ CONFIG_NIOS2=y CONFIG_SYS_CONFIG_NAME="10m50_devboard" +CONFIG_MONITOR_IS_IN_RAM=y CONFIG_SYS_MALLOC_LEN=0x20000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig index 3d62512ff9..46dfaf827a 100644 --- a/configs/3c120_defconfig +++ b/configs/3c120_defconfig @@ -1,5 +1,6 @@ CONFIG_NIOS2=y CONFIG_SYS_CONFIG_NAME="3c120_devboard" +CONFIG_MONITOR_IS_IN_RAM=y CONFIG_SYS_MALLOC_LEN=0x20000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 @@ -39,6 +40,7 @@ CONFIG_MISC=y CONFIG_ALTERA_SYSID=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index 680c2d4367..263e57f46a 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -26,8 +26,18 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="M5208EVBe" CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_UDP_CHECKSUM=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.162.1.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.162.1.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.162.1.1" CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y @@ -37,6 +47,7 @@ CONFIG_SYS_I2C_SPEED=80000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=254 diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index c0087aa67f..88c1116211 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -34,7 +34,17 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="u-boot.bin" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="M5235EVB" CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.162.1.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.162.1.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.162.1.1" CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y @@ -44,6 +54,7 @@ CONFIG_SYS_I2C_SPEED=80000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_32BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=137 diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index b099e98606..255f3b9d2f 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -34,7 +34,17 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="u-boot.bin" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="M5235EVB" CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.162.1.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.162.1.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.162.1.1" CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y @@ -44,6 +54,7 @@ CONFIG_SYS_I2C_SPEED=80000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=137 diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig index b192839766..de7f14165b 100644 --- a/configs/M5249EVB_defconfig +++ b/configs/M5249EVB_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CHECKSUM=y diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig index 581023f967..ea079972c9 100644 --- a/configs/M5253DEMO_defconfig +++ b/configs/M5253DEMO_defconfig @@ -25,7 +25,10 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_MAC_PARTITION=y +CONFIG_OVERWRITE_ETHADDR_ONCE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="M5253DEMO" # CONFIG_BLOCK_CACHE is not set CONFIG_SYS_IDE_MAXBUS=1 CONFIG_SYS_ATA_STRIDE=4 @@ -44,4 +47,5 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_SYS_MAX_FLASH_SECT=2048 CONFIG_USE_SYS_MAX_FLASH_BANKS=y CONFIG_DRIVER_DM9000=y +CONFIG_DM9000_BYTE_SWAPPED=y CONFIG_MCFUART=y diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index a321b1c5c2..324daa016e 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -27,7 +27,17 @@ CONFIG_MII_INIT=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="M5272C3" CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.162.1.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.162.1.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.162.1.1" CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFFE00201 @@ -56,6 +66,7 @@ CONFIG_SYS_OR7_PRELIM=0xFFC0007C CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=137 diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index e7e799b7bd..d84d9d98c5 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_MII=y CONFIG_MII_INIT=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y +CONFIG_OVERWRITE_ETHADDR_ONCE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_SYS_RX_ETH_BUFFER=8 @@ -41,6 +42,7 @@ CONFIG_SYS_I2C_SLAVE=0x7F CONFIG_SYS_I2C_SPEED=80000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=11 CONFIG_MCFFEC=y diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig index 5521cced6d..7988d25003 100644 --- a/configs/M5282EVB_defconfig +++ b/configs/M5282EVB_defconfig @@ -27,11 +27,22 @@ CONFIG_MII_INIT=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="M5282EVB" CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.162.1.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.162.1.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.162.1.1" CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_CHECKSUM=y diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 32d1958088..d7c07aa2ea 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -28,8 +28,18 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_ENV_IS_IN_FLASH=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="M53017" CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_UDP_CHECKSUM=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.162.1.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.162.1.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.162.1.1" CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y @@ -39,7 +49,9 @@ CONFIG_SYS_I2C_SPEED=80000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y +CONFIG_FLASH_SPANSION_S29WS_N=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=137 diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index 9f0b419639..989af925f7 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -27,8 +27,18 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="M5329EVB" CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_UDP_CHECKSUM=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.162.1.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.162.1.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.162.1.1" CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y @@ -39,6 +49,7 @@ CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=137 diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index 05388796fb..7be2a27ba2 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -28,8 +28,18 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="M5329EVB" CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_UDP_CHECKSUM=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.162.1.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.162.1.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.162.1.1" CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y @@ -40,6 +50,7 @@ CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=137 diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 90d8321648..4b278a5b1c 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -28,8 +28,18 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="M5373EVB" CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_UDP_CHECKSUM=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.162.1.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.162.1.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.162.1.1" CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y @@ -40,6 +50,7 @@ CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=137 diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index d8d6417d21..3e16ffc2ef 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -55,6 +55,12 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.0.3" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.0.0.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.0.1" CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0x4000801 CONFIG_SYS_OR0_PRELIM=0xFFC00926 @@ -83,6 +89,7 @@ CONFIG_SYS_OR7_PRELIM=0xFFFF810A CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=35 CONFIG_MTD_RAW_NAND=y diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index 1a571cf6bc..7287ca6b24 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -148,6 +148,7 @@ CONFIG_SPCR_TSECEP_3=y CONFIG_LCRR_DBYP_PLL_BYPASSED=y CONFIG_LCRR_CLKDIV_8=y CONFIG_FSL_SERDES=y +CONFIG_USE_UBOOTPATH=y CONFIG_SYS_MONITOR_LEN=524288 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -178,6 +179,10 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="TSEC0" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="mpc837x_rdb" +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/nfsroot" CONFIG_FSL_SATA=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_BR0_PRELIM_BOOL=y @@ -195,8 +200,10 @@ CONFIG_SYS_FSL_I2C_OFFSET=0x3000 CONFIG_SYS_I2C_SLAVE=0x7F CONFIG_SYS_I2C_SPEED=400000 CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_PIN_MUX=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index 517fd785dd..05034ce2e4 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -13,7 +13,10 @@ CONFIG_SRIO1=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_USE_UBOOTPATH=y +CONFIG_UBOOTPATH="8548cds/u-boot.bin" CONFIG_PCIE1=y CONFIG_PHYS_64BIT=y CONFIG_SYS_MONITOR_LEN=524288 @@ -45,6 +48,17 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="8548cds/uImage.uboot" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC0" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.168.1.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.253" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/nfsroot" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.1" CONFIG_SPD_EEPROM=y CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y @@ -68,6 +82,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x57 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=128 diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 5c83e808d5..965c37e45e 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -13,7 +13,10 @@ CONFIG_SRIO1=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y +CONFIG_USE_UBOOTPATH=y +CONFIG_UBOOTPATH="8548cds/u-boot.bin" CONFIG_PCIE1=y CONFIG_SYS_MONITOR_LEN=524288 CONFIG_OF_BOARD_SETUP=y @@ -44,6 +47,17 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="8548cds/uImage.uboot" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC0" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.168.1.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.253" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/nfsroot" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.1" CONFIG_SPD_EEPROM=y CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y @@ -67,6 +81,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x57 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=128 diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index b354237db3..004175c804 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -13,8 +13,11 @@ CONFIG_SRIO1=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_TARGET_MPC8548CDS_LEGACY=y +CONFIG_USE_UBOOTPATH=y +CONFIG_UBOOTPATH="8548cds/u-boot.bin" CONFIG_PCIE1=y CONFIG_SYS_MONITOR_LEN=524288 CONFIG_OF_BOARD_SETUP=y @@ -44,6 +47,17 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="8548cds/uImage.uboot" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC0" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.168.1.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.253" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/nfsroot" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.1" CONFIG_SPD_EEPROM=y CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y @@ -67,6 +81,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x57 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=128 diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index b32837c778..c12948ae7c 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -16,9 +16,11 @@ CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -81,6 +83,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 575d5bffcb..6a320713eb 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -9,8 +9,10 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -49,6 +51,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 21c752d974..e3b786d4ef 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -14,9 +14,11 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -71,6 +73,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index a514d4ba36..e6ce59e297 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -16,9 +16,11 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -73,6 +75,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index db71e9bce4..99b94a061d 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -16,9 +16,11 @@ CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -80,6 +82,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 291c4a4038..071123362f 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -9,8 +9,10 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -48,6 +50,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 8237da39c2..9f2afcdadc 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -14,9 +14,11 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -70,6 +72,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 9cb53d64e2..7c64fdcf6f 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -16,9 +16,11 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -72,6 +74,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 9574697108..87953b8f19 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -16,9 +16,11 @@ CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -82,6 +84,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 7b3919dc16..bf7078015e 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -9,8 +9,10 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -50,6 +52,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 3ad137dbd5..4dbf8695e4 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -14,9 +14,11 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -72,6 +74,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index cde657ce00..f5bcffbd49 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -16,9 +16,11 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -74,6 +76,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 1faeab2c3b..82f29bed54 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -16,9 +16,11 @@ CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -81,6 +83,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 190d02fa50..985243cebd 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -9,8 +9,10 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -49,6 +51,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 5e32768c28..3dfb509c8a 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -14,9 +14,11 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -71,6 +73,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index bce763c73b..f3d399f84f 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -16,9 +16,11 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -73,6 +75,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index b9d52a755d..de04556b22 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -16,9 +16,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -81,6 +83,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index f86bc553da..2d201bf55e 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -14,9 +14,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -72,6 +74,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 0b9e108ba5..a6b7a4abf5 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -16,9 +16,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -74,6 +76,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 9f68ede4be..58f2475571 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -10,8 +10,10 @@ CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -51,6 +53,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 3dd2475643..cf47bd49c7 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -16,9 +16,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -80,6 +82,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index bd64dcc9ef..3a86a9ef52 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -14,9 +14,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -71,6 +73,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 140d271a19..9fe2b1d88f 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -16,9 +16,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -73,6 +75,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 3f653895ab..17bde92263 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -10,8 +10,10 @@ CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -50,6 +52,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index abe064c04e..2f768c0670 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -16,9 +16,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -83,6 +85,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 78a54dd461..6cb3be08dc 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -14,9 +14,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -74,6 +76,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index a8bdb5a220..0eb2b3ab74 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -16,9 +16,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -76,6 +78,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 7a533ed41d..b0ccaa1cfd 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -10,8 +10,10 @@ CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -53,6 +55,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 3abb9d7f75..c53c4c6c7c 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -16,9 +16,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -85,6 +87,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 551b5fca8e..0ac74287fd 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -14,9 +14,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -76,6 +78,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 493e2c94c1..9da9ef0c69 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -16,9 +16,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -78,6 +80,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index fc82fa8ab9..bb5df66c74 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -10,8 +10,10 @@ CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PHYS_64BIT=y @@ -55,6 +57,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index b6ae81dd42..4758e0e371 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -16,9 +16,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -84,6 +86,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index cfbb3c274e..1584a8a7c3 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -14,9 +14,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -75,6 +77,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 36c6c7e26e..6acb0bcb12 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -16,9 +16,11 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -77,6 +79,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 691df7cc21..2afef4a5eb 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -10,8 +10,10 @@ CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_SYS_MONITOR_LEN=786432 @@ -54,6 +56,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" +CONFIG_USE_HOSTNAME=y +CONFIG_USE_ROOTPATH=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index f495205f5b..bf3365a480 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -60,6 +61,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index 23a7b66fbc..69f30d427f 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -15,6 +15,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -60,6 +61,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 7dfbde0469..c2dc0f21ee 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -62,6 +63,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index aea0b89f97..306432e41b 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -16,6 +16,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -57,6 +58,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index e51db83263..bedea018dd 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -87,6 +88,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 5472cccff8..f06bb02a27 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -86,6 +87,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 0dd725128c..4f91dce109 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -20,6 +20,7 @@ CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -89,6 +90,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 8a2096c56d..c9d771e44b 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -12,6 +12,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -61,6 +62,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index cc6a80447c..a55797eb9e 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -80,6 +81,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index cb270adc37..2f5a1a329d 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -79,6 +80,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 79530eac8f..afce81b107 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -19,6 +19,7 @@ CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -82,6 +83,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index a671ae3d87..29b240fc14 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -54,6 +55,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 637842cda2..ca960d368b 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -89,6 +90,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 35ab9931e7..eba73ee989 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -21,6 +21,7 @@ CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -88,6 +89,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 93b02a5e99..ae98a3586b 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -13,6 +13,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y +CONFIG_USE_UBOOTPATH=y CONFIG_NXP_ESBC=y CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000 CONFIG_PCIE1=y @@ -63,6 +64,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 7d25bbbb0b..76a1e58300 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -23,6 +23,7 @@ CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -91,6 +92,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 2846f63d47..fe440a469f 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -15,6 +15,7 @@ CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SRIO_PCIE_BOOT_SLAVE=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -60,6 +61,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index a7dc88c0bf..f4f90d5ab2 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -15,6 +15,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -63,6 +64,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index a881488dbe..18baf56812 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -85,6 +86,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 562a79955c..df98e33f97 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -84,6 +85,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 00018033a3..efa48af3bf 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -19,6 +19,7 @@ CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -87,6 +88,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 0cb359de94..8e07b2a09c 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -59,6 +60,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index cbe1bb4e3f..69bebfacb0 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -86,6 +87,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 80a2c003e6..179fc63705 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -85,6 +86,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 99bee8e5ea..1d8a6b5f41 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -88,6 +89,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index aa6a053209..a1332a99b4 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -12,6 +12,7 @@ CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_T2080RDB_REV_D=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -60,6 +61,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index b445b6bde1..d906035a2b 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -17,6 +17,7 @@ CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -78,6 +79,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index a807ac8347..d2b270dd44 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -11,6 +11,7 @@ CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_BOOK3E_HV=y CONFIG_SYS_CACHE_STASHING=y +CONFIG_USE_UBOOTPATH=y CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y @@ -53,6 +54,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" +CONFIG_USE_ROOTPATH=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index d876602fa0..e5c8358e54 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -34,6 +34,7 @@ CONFIG_FTSDC010_SDIO=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 1c0b534537..a66db65621 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -40,6 +40,7 @@ CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index dc584a6fd4..606962c0a7 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -41,6 +41,7 @@ CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index ec6299495d..069a9d3982 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -35,6 +35,7 @@ CONFIG_FTSDC010_SDIO=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index 65b3fc646f..c373b99b95 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -34,6 +34,7 @@ CONFIG_FTSDC010_SDIO=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 4c3e1beb00..f235db7990 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -40,6 +40,7 @@ CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 3c6408a12a..4cbfd52fb1 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -41,6 +41,7 @@ CONFIG_FTSDC010_SDIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index f4deee6871..4fed2ead1d 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -35,6 +35,7 @@ CONFIG_FTSDC010_SDIO=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_CFI_FLASH_STATUS_POLL=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 9d81f8d0ad..5a6db3ce6a 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -72,6 +72,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SLAVE=0x1 CONFIG_SYS_I2C_SPEED=400000 CONFIG_MMC_OMAP_HS=y +CONFIG_HSMMC2_8BIT=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_SMSC=y CONFIG_MII=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index de83139d15..aa55a7a61e 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -70,6 +70,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SLAVE=0x1 CONFIG_SYS_I2C_SPEED=400000 CONFIG_MMC_OMAP_HS=y +CONFIG_HSMMC2_8BIT=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_SMSC=y CONFIG_MII=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index e1dfd6a9bd..cb73b104d2 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -73,6 +73,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SLAVE=0x1 CONFIG_SYS_I2C_SPEED=400000 CONFIG_MMC_OMAP_HS=y +CONFIG_HSMMC2_8BIT=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_SMSC=y CONFIG_MII=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index 74f0834466..f28e6e6b16 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -72,6 +72,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SLAVE=0x1 CONFIG_SYS_I2C_SPEED=400000 CONFIG_MMC_OMAP_HS=y +CONFIG_HSMMC2_8BIT=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_SMSC=y CONFIG_MII=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 054e9747a8..03f799506e 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -92,6 +92,7 @@ CONFIG_MISC=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OMAP_HS=y +CONFIG_HSMMC2_8BIT=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=76800000 diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 02a2543a3f..86bcfe85ae 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -89,6 +89,7 @@ CONFIG_MISC=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OMAP_HS=y +CONFIG_HSMMC2_8BIT=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=76800000 diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 84eca42aac..eedbfd0d86 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -88,6 +88,7 @@ CONFIG_MISC=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OMAP_HS=y +CONFIG_HSMMC2_8BIT=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=76800000 diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig index b8e8bc41b6..6775379428 100644 --- a/configs/amcore_defconfig +++ b/configs/amcore_defconfig @@ -31,9 +31,12 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y CONFIG_CMD_DIAG=y CONFIG_ENV_IS_IN_FLASH=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="AMCORE" # CONFIG_NET is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=1024 diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig index 6226d50c8a..395202bc29 100644 --- a/configs/apalis-imx8_defconfig +++ b/configs/apalis-imx8_defconfig @@ -48,6 +48,12 @@ CONFIG_VERSION_VARIABLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_TFTP_TSIZE=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.10.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.10.1" CONFIG_CLK_IMX8=y CONFIG_CPU=y CONFIG_MXC_GPIO=y diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 70ef62a778..54b781b9c9 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -54,6 +54,12 @@ CONFIG_VERSION_VARIABLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=16352 CONFIG_TFTP_TSIZE=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.10.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.10.1" CONFIG_SPL_DM=y CONFIG_SYS_I2C_TEGRA=y CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 68655cf15b..28fc03d85a 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -79,6 +79,12 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.10.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.10.1" CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig index 4c7ded9d22..d7ac130179 100644 --- a/configs/aristainetos2c_defconfig +++ b/configs/aristainetos2c_defconfig @@ -68,6 +68,8 @@ CONFIG_ENV_WRITEABLE_LIST=y CONFIG_ENV_ACCESS_IGNORE_FORCE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="aristainetos2" CONFIG_VERSION_VARIABLE=y CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y diff --git a/configs/aristainetos2ccslb_defconfig b/configs/aristainetos2ccslb_defconfig index a23c77af89..562eb10453 100644 --- a/configs/aristainetos2ccslb_defconfig +++ b/configs/aristainetos2ccslb_defconfig @@ -68,6 +68,8 @@ CONFIG_ENV_WRITEABLE_LIST=y CONFIG_ENV_ACCESS_IGNORE_FORCE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="aristainetos2" CONFIG_VERSION_VARIABLE=y CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig index 9e5665a12b..a1a25622c7 100644 --- a/configs/astro_mcf5373l_defconfig +++ b/configs/astro_mcf5373l_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_I2C_SLAVE=0x7F CONFIG_SYS_I2C_SPEED=80000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index c6c83b8da3..a398e6d97a 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -54,6 +54,8 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_DATAFLASH=y CONFIG_DRIVER_DM9000=y +CONFIG_DM9000_NO_SROM=y +CONFIG_DM9000_USE_16BIT=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 1c16d26c82..1b464ff292 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -54,6 +54,8 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_DATAFLASH=y CONFIG_DRIVER_DM9000=y +CONFIG_DM9000_NO_SROM=y +CONFIG_DM9000_USE_16BIT=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index 8dbcb27f95..f232624942 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -52,6 +52,8 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_DATAFLASH=y CONFIG_DRIVER_DM9000=y +CONFIG_DM9000_NO_SROM=y +CONFIG_DM9000_USE_16BIT=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index e7d32f0991..d5db004481 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -50,6 +50,7 @@ CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=256 CONFIG_MTD_RAW_NAND=y diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index 794cf0e38d..d82cd21472 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -51,6 +51,7 @@ CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=256 CONFIG_MTD_RAW_NAND=y diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig index 503cee91a2..14d435076d 100644 --- a/configs/bayleybay_defconfig +++ b/configs/bayleybay_defconfig @@ -53,6 +53,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_LBA48=y diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 4928a203d0..956e797e43 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -41,6 +41,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y # CONFIG_DOS_PARTITION is not set CONFIG_OF_CONTROL=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="NS3" CONFIG_CLK=y CONFIG_CLK_CCF=y CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig index d80152be0f..708a3a39d8 100644 --- a/configs/boston32r2_defconfig +++ b/configs/boston32r2_defconfig @@ -42,6 +42,7 @@ CONFIG_CLK=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig index 8624853eba..41769be634 100644 --- a/configs/boston32r2el_defconfig +++ b/configs/boston32r2el_defconfig @@ -43,6 +43,7 @@ CONFIG_CLK=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig index 464b255920..12abbb8998 100644 --- a/configs/boston32r6_defconfig +++ b/configs/boston32r6_defconfig @@ -43,6 +43,7 @@ CONFIG_CLK=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig index 67abbb9f7f..89d14b61fb 100644 --- a/configs/boston32r6el_defconfig +++ b/configs/boston32r6el_defconfig @@ -44,6 +44,7 @@ CONFIG_CLK=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig index 253d232374..80031666f9 100644 --- a/configs/boston64r2_defconfig +++ b/configs/boston64r2_defconfig @@ -43,6 +43,7 @@ CONFIG_CLK=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig index 190c993725..ad79c4e585 100644 --- a/configs/boston64r2el_defconfig +++ b/configs/boston64r2el_defconfig @@ -44,6 +44,7 @@ CONFIG_CLK=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig index f6e246e07f..581ddfa5b3 100644 --- a/configs/boston64r6_defconfig +++ b/configs/boston64r6_defconfig @@ -43,6 +43,7 @@ CONFIG_CLK=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig index 82e01bb21f..9a5655fb02 100644 --- a/configs/boston64r6el_defconfig +++ b/configs/boston64r6el_defconfig @@ -44,6 +44,7 @@ CONFIG_CLK=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 58d75a52a0..0c4627aff0 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # " CONFIG_TEGRA124=y CONFIG_TARGET_CEI_TK1_SOM=y +CONFIG_TEGRA_ENABLE_UARTD=y CONFIG_TEGRA_GPU=y CONFIG_ARMV7_PSCI_0_1=y CONFIG_SYS_LOAD_ADDR=0x81000000 diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig index 321121e3f7..83d5712e61 100644 --- a/configs/cherryhill_defconfig +++ b/configs/cherryhill_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index a38b3b78c0..401506e219 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -84,6 +84,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index 570c4e82a4..64ebef4b50 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -67,6 +67,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 43cf53045b..3098857d6e 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -57,6 +57,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index aa3d6f2b9d..b933a2352e 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index e83f2dfe7f..96c739cbfb 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_LBA48=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 867ca30320..6eda33ebbc 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -76,6 +76,7 @@ CONFIG_SYS_RX_ETH_BUFFER=64 CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_MMC_OMAP_HS=y +CONFIG_HSMMC2_8BIT=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig index 2fdb882dc4..377781f0bc 100644 --- a/configs/cobra5272_defconfig +++ b/configs/cobra5272_defconfig @@ -25,6 +25,10 @@ CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.100.2" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.100.1" CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFFE00201 diff --git a/configs/colibri-imx6ull-emmc_defconfig b/configs/colibri-imx6ull-emmc_defconfig index c0248dca95..b4de88aead 100644 --- a/configs/colibri-imx6ull-emmc_defconfig +++ b/configs/colibri-imx6ull-emmc_defconfig @@ -54,6 +54,12 @@ CONFIG_VERSION_VARIABLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=16352 CONFIG_TFTP_TSIZE=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.10.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.10.1" CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index d16b66df7c..f2a0d79ccc 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -63,6 +63,12 @@ CONFIG_VERSION_VARIABLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=16352 CONFIG_TFTP_TSIZE=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.10.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.10.1" CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig index 6896236045..e4c418958b 100644 --- a/configs/colibri-imx8x_defconfig +++ b/configs/colibri-imx8x_defconfig @@ -47,6 +47,12 @@ CONFIG_VERSION_VARIABLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_TFTP_TSIZE=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.10.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.10.1" CONFIG_CLK_IMX8=y CONFIG_CPU=y CONFIG_FXL6408_GPIO=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index aa24dea1f0..bad7b8a54e 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -79,6 +79,12 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=16352 +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.10.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.10.1" CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index 4428b55503..7e24dcd400 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -61,6 +61,12 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=16352 +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.10.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.10.1" CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index bc9abc82d5..fe785d7e31 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -52,6 +52,12 @@ CONFIG_SYS_MMC_ENV_PART=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=16352 +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.10.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.10.1" CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y CONFIG_USB_FUNCTION_FASTBOOT=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 3352b8e923..2642e8975b 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -66,6 +66,12 @@ CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.10.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.10.1" CONFIG_DFU_NAND=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 CONFIG_VYBRID_GPIO=y diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index 594bddea6e..f3f09e593f 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -51,6 +51,7 @@ CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index 69a958d879..a8ce3000d8 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -51,6 +51,7 @@ CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig index 15b7f27ae6..3a84190bbf 100644 --- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -60,6 +60,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_LBA48=y diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig index 8a1defd043..bb8b9ef312 100644 --- a/configs/conga-qeval20-qa3-e3845_defconfig +++ b/configs/conga-qeval20-qa3-e3845_defconfig @@ -56,6 +56,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_LBA48=y diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index e8fb032bba..ffa48fcb93 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -66,8 +66,11 @@ CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="ccdc.img" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="ccdc" CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 +CONFIG_USE_ROOTPATH=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_SCSI_AHCI=y CONFIG_DM_PCA953X=y diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig index e4da59bae9..ec672e59e8 100644 --- a/configs/coreboot64_defconfig +++ b/configs/coreboot64_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index e297494663..4db7289916 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -44,6 +44,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig index 8b47f2d89f..8e53eec74e 100644 --- a/configs/cougarcanyon2_defconfig +++ b/configs/cougarcanyon2_defconfig @@ -47,6 +47,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_LBA48=y diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index 038cbbe5b9..69ad017f98 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 9332c8cb3f..137f9ec4f5 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -65,6 +65,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index cc46f4eda4..5d29dae341 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # " CONFIG_TEGRA114=y CONFIG_TARGET_DALMORE=y +CONFIG_TEGRA_ENABLE_UARTD=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index 66300698a9..cd5ddc4ad3 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -65,6 +65,7 @@ CONFIG_SYS_I2C_LPC32XX=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=71 diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 8347b67681..6fd4410df5 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -84,4 +84,6 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 CONFIG_DRIVER_DM9000=y +CONFIG_DM9000_NO_SROM=y +CONFIG_DM9000_USE_16BIT=y CONFIG_JFFS2_NAND=y diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig index 63b8c8f92d..bd8b2e1155 100644 --- a/configs/dfi-bt700-q7x-151_defconfig +++ b/configs/dfi-bt700-q7x-151_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_LBA48=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index dbd917b4dd..c46a0a0b69 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -30,6 +30,7 @@ CONFIG_ENV_OFFSET_REDUND=0x130000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_MONITOR_LEN=409600 +CONFIG_STANDALONE_LOAD_ADDR=0x10001000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 7508702eb9..cacdf33d53 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -27,6 +27,7 @@ CONFIG_ENV_OFFSET_REDUND=0x130000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_MONITOR_LEN=409600 +CONFIG_STANDALONE_LOAD_ADDR=0x10001000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index d91cf3e130..41df92f3d2 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -101,6 +101,7 @@ CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_OMAP_HS=y +CONFIG_HSMMC2_8BIT=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 195bc0e4ee..7392b73085 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -96,6 +96,7 @@ CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_OMAP_HS=y +CONFIG_HSMMC2_8BIT=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_SYS_NAND_ONFI_DETECTION=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 99cdbbc02f..1bda6db7a3 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -92,6 +92,7 @@ CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_OMAP_HS=y +CONFIG_HSMMC2_8BIT=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=76800000 diff --git a/configs/draco_defconfig b/configs/draco_defconfig index cc1fb489eb..8d1c6fd44a 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -84,6 +84,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/opt/eldk" CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index a831c1c5d2..7304b49387 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -32,6 +32,7 @@ CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_MII_INIT=y CONFIG_CMD_DATE=y +CONFIG_OVERWRITE_ETHADDR_ONCE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index 6a673c9181..5ecdda418a 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_MII_INIT=y CONFIG_CMD_DATE=y +CONFIG_OVERWRITE_ETHADDR_ONCE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/efi-x86_app32_defconfig b/configs/efi-x86_app32_defconfig index 4ae74dbd2e..905f375a3e 100644 --- a/configs/efi-x86_app32_defconfig +++ b/configs/efi-x86_app32_defconfig @@ -36,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_REGEX is not set diff --git a/configs/efi-x86_app64_defconfig b/configs/efi-x86_app64_defconfig index 3f1e80120c..605d49ff8c 100644 --- a/configs/efi-x86_app64_defconfig +++ b/configs/efi-x86_app64_defconfig @@ -36,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_REGEX is not set diff --git a/configs/efi-x86_payload32_defconfig b/configs/efi-x86_payload32_defconfig index 8d1fc22eb9..a5c629b46f 100644 --- a/configs/efi-x86_payload32_defconfig +++ b/configs/efi-x86_payload32_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set diff --git a/configs/efi-x86_payload64_defconfig b/configs/efi-x86_payload64_defconfig index 89e6d1febc..5cde04a5ac 100644 --- a/configs/efi-x86_payload64_defconfig +++ b/configs/efi-x86_payload64_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index ee731f3c0a..d42eda2055 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -85,6 +85,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/opt/eldk" CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index 141467bbe3..0d2ebdab92 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -46,6 +46,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CPU=y diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index d2946971b4..9d09d9c37f 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -162,6 +162,9 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR_REDUND=0xFE090000 CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="gazerbeam" +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_AXI=y CONFIG_IHS_AXI=y @@ -192,6 +195,7 @@ CONFIG_IHS_FPGA=y CONFIG_FSL_ESDHC=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index f999b44775..5308a8e3e9 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -97,6 +97,10 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NETCONSOLE=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.1" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.146" CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 4c6291f0c5..37fc1e5143 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -97,6 +97,10 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NETCONSOLE=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.1" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.146" CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 4e062e477e..f33625b2ca 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -100,6 +100,10 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NETCONSOLE=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.1" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.146" CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index 353d1a33fa..c8694bba68 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " CONFIG_TEGRA20=y CONFIG_TARGET_HARMONY=y +CONFIG_TEGRA_ENABLE_UARTD=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index 9fbec97d51..fdff11e16f 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -51,6 +51,7 @@ CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index 48be3c5f4a..b29c62fc59 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -83,6 +83,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="xea" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_DEVRES=y diff --git a/configs/imx28_xea_sb_defconfig b/configs/imx28_xea_sb_defconfig index 26227341d9..b7edd3bae4 100644 --- a/configs/imx28_xea_sb_defconfig +++ b/configs/imx28_xea_sb_defconfig @@ -63,6 +63,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="xea" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_DEVRES=y diff --git a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig index f679fbe251..e3588473d5 100644 --- a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig +++ b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig @@ -99,6 +99,7 @@ CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y CONFIG_SPL_POWER_LEGACY=y +CONFIG_POWER_PCA9450=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 91ec39d023..10802eb961 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -99,6 +99,7 @@ CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y CONFIG_SPL_POWER_LEGACY=y +CONFIG_POWER_PCA9450=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index e2709ec521..444953db91 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_RX_ETH_BUFFER=8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index e8baca158b..6eb912c1a1 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_RX_ETH_BUFFER=8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index 04032c8b94..023b84200e 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_RX_ETH_BUFFER=8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index 3d910d3d48..fab7274068 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_RX_ETH_BUFFER=8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig index ea1f858135..6d9d0e8999 100644 --- a/configs/integratorcp_cm1136_defconfig +++ b/configs/integratorcp_cm1136_defconfig @@ -31,9 +31,14 @@ CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.104" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.100" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig index 19c72c759e..2d40a5f937 100644 --- a/configs/integratorcp_cm920t_defconfig +++ b/configs/integratorcp_cm920t_defconfig @@ -31,9 +31,14 @@ CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.104" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.100" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig index e0ba5720f3..4505123d4f 100644 --- a/configs/integratorcp_cm926ejs_defconfig +++ b/configs/integratorcp_cm926ejs_defconfig @@ -31,9 +31,14 @@ CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.104" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.100" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig index e4e960e72a..bbdf86baeb 100644 --- a/configs/integratorcp_cm946es_defconfig +++ b/configs/integratorcp_cm946es_defconfig @@ -31,9 +31,14 @@ CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.104" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.100" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index e7cdd84ecb..053f29b11f 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -138,6 +138,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index 87101cbf53..dc6c1b6935 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -112,6 +112,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/j7200_hs_evm_a72_defconfig b/configs/j7200_hs_evm_a72_defconfig index b9598ca1fe..782a42b746 100644 --- a/configs/j7200_hs_evm_a72_defconfig +++ b/configs/j7200_hs_evm_a72_defconfig @@ -139,6 +139,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/j7200_hs_evm_r5_defconfig b/configs/j7200_hs_evm_r5_defconfig index 608778ade8..73979f4cc3 100644 --- a/configs/j7200_hs_evm_r5_defconfig +++ b/configs/j7200_hs_evm_r5_defconfig @@ -112,6 +112,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 48a2444694..5efaff26d2 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -140,6 +140,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index d6da4c6ae2..9d333e4905 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -120,6 +120,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index a1cc7da0bf..ec66b18740 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -141,6 +141,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index eb9df36553..e496ec85af 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -120,6 +120,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 2b2f80c4aa..99a0eee12d 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -139,6 +139,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 2de5d87bdb..cd25016998 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -118,6 +118,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/j721s2_hs_evm_a72_defconfig b/configs/j721s2_hs_evm_a72_defconfig index 3e0ec40fb2..9fc90737da 100644 --- a/configs/j721s2_hs_evm_a72_defconfig +++ b/configs/j721s2_hs_evm_a72_defconfig @@ -140,6 +140,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/j721s2_hs_evm_r5_defconfig b/configs/j721s2_hs_evm_r5_defconfig index bc8672f709..d9988fc17f 100644 --- a/configs/j721s2_hs_evm_r5_defconfig +++ b/configs/j721s2_hs_evm_r5_defconfig @@ -118,6 +118,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index b391a86c02..d935e784ab 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # " CONFIG_TEGRA124=y CONFIG_TARGET_JETSON_TK1=y +CONFIG_TEGRA_ENABLE_UARTD=y CONFIG_TEGRA_GPU=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index b0069fd60b..2bcf2265c7 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -87,6 +87,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_DRIVER_TI_KEYSTONE_NET=y +CONFIG_KSNET_NETCP_V1_0=y CONFIG_PHY=y CONFIG_NOP_PHY=y CONFIG_KEYSTONE_USB_PHY=y diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index 9ca26ae61f..94ab680343 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -62,6 +62,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_MII=y CONFIG_DRIVER_TI_KEYSTONE_NET=y +CONFIG_KSNET_NETCP_V1_0=y CONFIG_PHY=y CONFIG_NOP_PHY=y CONFIG_KEYSTONE_USB_PHY=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 2abda78893..bd4943006c 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -74,6 +74,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_EMPTY_INFO=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 9609f58fb4..4ea7da8d32 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -227,6 +227,7 @@ CONFIG_I2C_MUX_PCA954x=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index bd3d6315b1..96298ed0c3 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -193,6 +193,7 @@ CONFIG_I2C_MUX_PCA954x=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index de6d99e91e..db717e4a15 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -208,6 +208,7 @@ CONFIG_I2C_MUX_PCA954x=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index a231510a76..69de685baf 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -185,6 +185,7 @@ CONFIG_I2C_MUX_PCA954x=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index e6beb62f86..92f2b0adec 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -207,6 +207,7 @@ CONFIG_I2C_MUX_PCA954x=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/kontron-sl-mx6ul_defconfig b/configs/kontron-sl-mx6ul_defconfig index 7391e59764..02b963e7c3 100644 --- a/configs/kontron-sl-mx6ul_defconfig +++ b/configs/kontron-sl-mx6ul_defconfig @@ -66,6 +66,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eth0" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="kontron-mx6ul" CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y CONFIG_DM_I2C=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index 62fd984deb..4b54813415 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -77,6 +77,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="kontron-mx8mm" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index e332de2aa9..70df2b5fd2 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -75,6 +75,8 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="boot/fitImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC0" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="m53menlo" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041 @@ -86,6 +88,7 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_NAND_MXC=y +CONFIG_MXC_NAND_HWECC=y CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 CONFIG_SYS_NAND_PAGE_COUNT=0x40 CONFIG_SYS_NAND_PAGE_SIZE=0x800 diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index b635c651aa..03de161684 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -37,6 +37,7 @@ CONFIG_SYS_ATA_REG_OFFSET=0 CONFIG_SYS_ATA_IDE0_OFFSET=0x01f0 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=128 diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 243213cb81..3ea9fa9857 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_ATA_REG_OFFSET=0 CONFIG_SYS_ATA_IDE0_OFFSET=0x01f0 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=128 diff --git a/configs/malta_defconfig b/configs/malta_defconfig index ed41e298f4..317b422a6b 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_ATA_REG_OFFSET=0 CONFIG_SYS_ATA_IDE0_OFFSET=0x01f0 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=128 diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index 63e5fcb6a5..3e4d2beda2 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -38,6 +38,7 @@ CONFIG_SYS_ATA_REG_OFFSET=0 CONFIG_SYS_ATA_IDE0_OFFSET=0x01f0 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=128 diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 2566bdef16..1e6cec0121 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -63,11 +63,13 @@ CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_FLASH_VERIFY=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 43ffc3c6bc..20b6e03bdf 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -61,11 +61,13 @@ CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_FLASH_VERIFY=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index 76e4eb3078..563e01459a 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # " CONFIG_TEGRA20=y CONFIG_TARGET_MEDCOM_WIDE=y +CONFIG_TEGRA_ENABLE_UARTD=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index f1b9cb461b..be34941805 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -53,6 +53,8 @@ CONFIG_CMD_JFFS2=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="microblaze-generic" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y @@ -64,6 +66,7 @@ CONFIG_LED_GPIO=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_EMPTY_INFO=y diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig index fbb2df4a74..c2b938e7e7 100644 --- a/configs/microchip_mpfs_icicle_defconfig +++ b/configs/microchip_mpfs_icicle_defconfig @@ -12,6 +12,7 @@ CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 +CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index e8ef832f89..679b6e3de5 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_LBA48=y diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig index 3f18addd5a..c09c2221a5 100644 --- a/configs/mt7622_rfb_defconfig +++ b/configs/mt7622_rfb_defconfig @@ -26,6 +26,10 @@ CONFIG_CMD_SMC=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.1" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.3" CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig index c56b4bb82f..8dd65d57e3 100644 --- a/configs/mt7623a_unielec_u7623_02_defconfig +++ b/configs/mt7623a_unielec_u7623_02_defconfig @@ -35,6 +35,10 @@ CONFIG_CMD_READ=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.1" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.2" CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig index e36943b0fc..cafac4278b 100644 --- a/configs/mt7623n_bpir2_defconfig +++ b/configs/mt7623n_bpir2_defconfig @@ -36,6 +36,10 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.1" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.2" CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index d7669d5577..76fd135d93 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -57,6 +57,10 @@ CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.1.1" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.2" CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y diff --git a/configs/mvebu_ac5_rd_defconfig b/configs/mvebu_ac5_rd_defconfig index 9235a398c5..a27202eb23 100644 --- a/configs/mvebu_ac5_rd_defconfig +++ b/configs/mvebu_ac5_rd_defconfig @@ -43,6 +43,16 @@ CONFIG_CMD_UBI=y CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="0.0.0.0" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="0.0.0.0" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/srv/nfs/" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="0.0.0.0" CONFIG_CLK=y CONFIG_CLK_MVEBU=y CONFIG_DM_PCA953X=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 3999ae1c82..cc74abfcd7 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -59,6 +59,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="fitImage" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="novena" CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_BOUNCE_BUFFER=y diff --git a/configs/octeon_ebb7304_defconfig b/configs/octeon_ebb7304_defconfig index b966b1d24f..a642a64d5c 100644 --- a/configs/octeon_ebb7304_defconfig +++ b/configs/octeon_ebb7304_defconfig @@ -50,6 +50,7 @@ CONFIG_MMC_OCTEONTX=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_EMPTY_INFO=y diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 471e0556fa..fb9430b454 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -74,6 +74,7 @@ CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index e18cbaa5c1..37708516f1 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -75,6 +75,7 @@ CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 91878c11ed..9d5c515a44 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -52,6 +52,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OMAP_HS=y +CONFIG_HSMMC2_8BIT=y CONFIG_PALMAS_POWER=y CONFIG_SCSI=y CONFIG_SCSI_AHCI_PLAT=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index cdb246fc64..867b89d3fe 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -77,6 +77,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=1 CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/tftpboot/opos6ul-root" CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_BOUNCE_BUFFER=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index b57e588f4e..b7c0b0d1e8 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -70,6 +70,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR_REDUND=0x60040000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d90000" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="EXPU1" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index 9029e7babc..a5193cb463 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -68,6 +68,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR_REDUND=0x60200000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d90000" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="EXPU1" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index aa74e1746a..1b9e0b6c91 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -70,6 +70,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR_REDUND=0x60040000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d90000" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="SELI8" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index 2b18a88d44..c193f7bb40 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -68,6 +68,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR_REDUND=0x60200000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d90000" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="SELI8" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 248631b7a8..82e4f1ed97 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -107,6 +107,7 @@ CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y CONFIG_SPL_POWER_LEGACY=y +CONFIG_POWER_PCA9450=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index 170ac86468..789b5d9398 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (Plutux) # " CONFIG_TEGRA20=y CONFIG_TARGET_PLUTUX=y +CONFIG_TEGRA_ENABLE_UARTD=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index d43043427a..d30d07bcbf 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -45,6 +45,7 @@ CONFIG_AT91_GPIO=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=256 CONFIG_MTD_RAW_NAND=y diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 2e42ba0803..11ec775b38 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -49,6 +49,7 @@ CONFIG_AT91_GPIO=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=256 CONFIG_MTD_RAW_NAND=y diff --git a/configs/poleg_evb_defconfig b/configs/poleg_evb_defconfig index 914fc39a7e..b7e39eb31f 100644 --- a/configs/poleg_evb_defconfig +++ b/configs/poleg_evb_defconfig @@ -28,6 +28,12 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_UUID=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.0.2" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.0.1" CONFIG_CLK=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 6b361f8211..e655b18f02 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -82,6 +82,8 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/opt/eldk" CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index cdad1b0995..a19d555f7d 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -8,6 +8,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_QEMU_PPCE500=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y +CONFIG_USE_UBOOTPATH=y CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -39,6 +40,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USE_ROOTPATH=y CONFIG_SIMPLE_BUS_CORRECT_RANGE=y CONFIG_LBA48=y CONFIG_CHIP_SELECTS_PER_CTRL=0 diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 40ba25297f..844c95380e 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -9,6 +9,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_SYS_MONITOR_LEN=786432 +CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y @@ -20,4 +21,5 @@ CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index eb9bf9b918..2be349ada7 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -10,6 +10,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_SYS_MONITOR_LEN=786432 +CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y @@ -21,4 +22,5 @@ CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index 756e7f35f6..894b6d5d17 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -12,6 +12,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_SYS_MONITOR_LEN=786432 +CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISPLAY_CPUINFO=y @@ -25,5 +26,6 @@ CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_MAX_FLASH_BANKS=2 # CONFIG_BINMAN_FDT is not set diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index d5eae95c80..8b558e6bc2 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -9,6 +9,7 @@ CONFIG_ARCH_RV64I=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 +CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y @@ -20,4 +21,5 @@ CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 1cb06b4b2c..6ed88de234 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -10,6 +10,7 @@ CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 +CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};" @@ -23,4 +24,5 @@ CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index 68b16f0a2c..adc6f730d2 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -11,6 +11,7 @@ CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 +CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 CONFIG_DISPLAY_CPUINFO=y @@ -24,5 +25,6 @@ CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_MAX_FLASH_BANKS=2 # CONFIG_BINMAN_FDT is not set diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 0f4811e5d7..9f1cb2675d 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -58,6 +58,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_SYS_IDE_MAXDEVICE=4 diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index a8222122fc..04528ad7cd 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -39,6 +39,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_SYS_IDE_MAXDEVICE=4 diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index 4123338b8d..9335233152 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -45,6 +45,7 @@ CONFIG_DFU_RAM=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index f6c6c28764..6373185f29 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -47,6 +47,7 @@ CONFIG_DFU_RAM=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index 4217175345..0653089eca 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -44,6 +44,7 @@ CONFIG_IDE_RESET=y CONFIG_CLK=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=256 CONFIG_E1000=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 861f0f59bc..fe09c34d5b 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -84,6 +84,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/opt/eldk" CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 30c5d4a5ad..6c3ba4cc72 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -83,6 +83,8 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/opt/eldk" CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index b3108fa64a..ba2e7dd76d 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -81,6 +81,7 @@ CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=131 diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index f06c21fdf1..3afb2aaffb 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -80,6 +80,7 @@ CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=131 diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 2045146fb8..8d71ba7d4f 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -82,6 +82,7 @@ CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_SECT=131 diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index 2375040a9e..dc9225188f 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " CONFIG_TEGRA20=y CONFIG_TARGET_SEABOARD=y +CONFIG_TEGRA_ENABLE_UARTD=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig index 34d23fdb84..abcd63c7ec 100644 --- a/configs/seeed_npi_imx6ull_defconfig +++ b/configs/seeed_npi_imx6ull_defconfig @@ -49,6 +49,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eth0" CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index 5cf020a3eb..6140424670 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -53,6 +53,7 @@ CONFIG_LED_BCM6358=y CONFIG_LED_GPIO=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index 99faabaa2f..6c85962cbb 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -16,6 +16,7 @@ CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 +CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000 CONFIG_USE_PREBOOT=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index c390af2689..3d96aa5411 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -19,6 +19,7 @@ CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 +CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000 CONFIG_USE_PREBOOT=y diff --git a/configs/slimbootloader_defconfig b/configs/slimbootloader_defconfig index f5d16f64d7..dbfed814de 100644 --- a/configs/slimbootloader_defconfig +++ b/configs/slimbootloader_defconfig @@ -25,6 +25,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_ACPIGEN is not set diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index cdad36bbfd..6d859b3274 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -63,6 +63,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="fitImage" +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="socfpga_vining_fpga" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index f45f570764..46be662037 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y CONFIG_SYS_INIT_RAM_LOCK=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_SOCRATES=y +CONFIG_L2_CACHE=y CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MONITOR_LEN=393216 CONFIG_FIT=y @@ -77,6 +78,7 @@ CONFIG_SYS_I2C_FSL=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_FLASH_QUIET_TEST=y CONFIG_SYS_MAX_FLASH_SECT=256 diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig index a75ec667d5..c4752a2b0a 100644 --- a/configs/som-db5800-som-6867_defconfig +++ b/configs/som-db5800-som-6867_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_LBA48=y diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index df90e64cbb..41074d50ff 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -58,6 +58,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_SPL_ENV_IS_NOWHERE is not set +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.1" CONFIG_DM_HWSPINLOCK=y CONFIG_HWSPINLOCK_STM32=y CONFIG_DM_I2C=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index a242f1b158..c9dbd485bc 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -58,6 +58,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_SPL_ENV_IS_NOWHERE is not set +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.1" CONFIG_DM_HWSPINLOCK=y CONFIG_HWSPINLOCK_STM32=y CONFIG_DM_I2C=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index 5f1fc90113..6f8293c7ee 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -58,6 +58,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_SPL_ENV_IS_NOWHERE is not set +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.1" CONFIG_DM_HWSPINLOCK=y CONFIG_HWSPINLOCK_STM32=y CONFIG_DM_I2C=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 65d9b5a729..a12a150f3b 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -58,6 +58,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_SPL_ENV_IS_NOWHERE is not set +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.1" CONFIG_DM_HWSPINLOCK=y CONFIG_HWSPINLOCK_STM32=y CONFIG_DM_I2C=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 86ebbef0a6..2d4b7cbc7b 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -94,6 +94,8 @@ CONFIG_SYS_MMC_ENV_DEV=-1 # CONFIG_SPL_ENV_IS_NOWHERE is not set # CONFIG_SPL_ENV_IS_IN_SPI_FLASH is not set CONFIG_TFTP_TSIZE=y +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.1" CONFIG_STM32_ADC=y CONFIG_SET_DFU_ALT_INFO=y CONFIG_USB_FUNCTION_FASTBOOT=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index caa79e6883..22cf538b41 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -66,6 +66,8 @@ CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=-1 CONFIG_TFTP_TSIZE=y +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.1" CONFIG_STM32_ADC=y CONFIG_CLK_SCMI=y CONFIG_SET_DFU_ALT_INFO=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 26c2e73aa0..7db562c542 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -106,6 +106,8 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_TSIZE=y +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.1" CONFIG_STM32_ADC=y CONFIG_SPL_BLOCK_CACHE=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index f76e13eafd..c94f03569f 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -103,6 +103,8 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_TSIZE=y +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.1" CONFIG_STM32_ADC=y CONFIG_SPL_BLOCK_CACHE=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 3309c2e792..e00c00f374 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -67,6 +67,8 @@ CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=-1 CONFIG_TFTP_TSIZE=y +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.1.1" CONFIG_STM32_ADC=y CONFIG_CLK_SCMI=y CONFIG_SET_DFU_ALT_INFO=y diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig index 5ee2edcf5e..ae7a9cf6da 100644 --- a/configs/stmark2_defconfig +++ b/configs/stmark2_defconfig @@ -37,6 +37,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:1m(u-boot),7m(kernel),-(rootfs)" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_CS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="stmark2" # CONFIG_NET is not set CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig index f69b873a36..a6fc65baee 100644 --- a/configs/synquacer_developerbox_defconfig +++ b/configs/synquacer_developerbox_defconfig @@ -60,6 +60,7 @@ CONFIG_MMC_SDHCI_F_SDH30=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index 02d6b496f9..8c3f8d5e06 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # " CONFIG_TEGRA30=y CONFIG_TARGET_TEC_NG=y +CONFIG_TEGRA_ENABLE_UARTD=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/tec_defconfig b/configs/tec_defconfig index 967d3050ef..a1900f0181 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (TEC) # " CONFIG_TEGRA20=y CONFIG_TARGET_TEC=y +CONFIG_TEGRA_ENABLE_UARTD=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_FIT=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig index 205ac87748..74c4a4967d 100644 --- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig @@ -56,6 +56,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_LBA48=y diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig index b6d59215e7..194b0519ea 100644 --- a/configs/theadorable-x86-conga-qa3-e3845_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig @@ -55,6 +55,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_LBA48=y diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig index fea35cd915..39c8a87fbe 100644 --- a/configs/theadorable-x86-dfi-bt700_defconfig +++ b/configs/theadorable-x86-dfi-bt700_defconfig @@ -53,6 +53,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y +CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_LBA48=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index aef524052b..a9e37170f4 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -84,6 +84,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/opt/eldk" CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index ece625f629..2ae1fb8279 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -40,6 +40,7 @@ CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2077 CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_THOR_RESET_OFF=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y CONFIG_CMD_I2C=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 693a602ea3..510ff2ebd8 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -40,6 +40,7 @@ CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2077 CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_THOR_RESET_OFF=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y CONFIG_CMD_I2C=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 97624e69e7..0b708cccf6 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -40,6 +40,7 @@ CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=2077 CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_THOR_RESET_OFF=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_DFU=y CONFIG_CMD_I2C=y diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig index 807e9ebd86..04d27058f3 100644 --- a/configs/total_compute_defconfig +++ b/configs/total_compute_defconfig @@ -53,6 +53,7 @@ CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_32BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 83120759b1..0c3381461e 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -185,6 +185,7 @@ CONFIG_I2C_MUX_PCA954x=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index ee1640608d..4f192ad262 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -209,6 +209,7 @@ CONFIG_I2C_MUX_PCA954x=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 5665cf3879..b361e3f403 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -50,6 +50,16 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="zImage" CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.168.11.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.11.10" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/nfs/root/path" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.11.1" CONFIG_GPIO_UNIPHIER=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index e3087a9109..765d42a3e6 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -51,6 +51,16 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="zImage" CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.168.11.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.11.10" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/nfs/root/path" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.11.1" CONFIG_GPIO_UNIPHIER=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index 1b0e0d0da7..6a0e2666cf 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -38,6 +38,16 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="Image" CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USE_GATEWAYIP=y +CONFIG_GATEWAYIP="192.168.11.1" +CONFIG_USE_IPADDR=y +CONFIG_IPADDR="192.168.11.10" +CONFIG_USE_NETMASK=y +CONFIG_NETMASK="255.255.255.0" +CONFIG_USE_ROOTPATH=y +CONFIG_ROOTPATH="/nfs/root/path" +CONFIG_USE_SERVERIP=y +CONFIG_SERVERIP="192.168.11.1" CONFIG_GPIO_UNIPHIER=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index ed2bcc69fc..66c969f95e 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -27,6 +27,8 @@ CONFIG_CMD_USB=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_HOSTNAME=y +CONFIG_HOSTNAME="usbarmory" CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y CONFIG_FSL_IIM=y diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 3c924ec9ea..3d94f454be 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (Ventana) # " CONFIG_TEGRA20=y CONFIG_TARGET_VENTANA=y +CONFIG_TEGRA_ENABLE_UARTD=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index bae8179bfd..153c7c1519 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -143,6 +143,7 @@ CONFIG_SPL_POWER_LEGACY=y CONFIG_POWER_DOMAIN=y CONFIG_IMX8M_POWER_DOMAIN=y CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y +CONFIG_POWER_PCA9450=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index 73b7363b68..47841e8b6c 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_UBI=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_SYS_FLASH_CFI_WIDTH_32BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 0b566b8005..4b22d49b29 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_UBI=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_SYS_FLASH_CFI_WIDTH_32BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index 70ce13eccc..83e15ddbe1 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_MMC_MAX_BLK_COUNT=127 CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_EMPTY_INFO=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index a4c555dac5..610d9de2a6 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -51,6 +51,7 @@ CONFIG_SYS_PBSIZE=2071 CONFIG_SYS_BOOTM_LEN=0x3c00000 CONFIG_CMD_IMLS=y CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_THOR_RESET_OFF=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y @@ -109,6 +110,7 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=10 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 4732c39bdb..ab2a542651 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -55,6 +55,7 @@ CONFIG_SYS_PBSIZE=2073 CONFIG_SYS_BOOTM_LEN=0x6400000 CONFIG_CMD_BOOTMENU=y CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_THOR_RESET_OFF=y CONFIG_CMD_GREPENV=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_MEMTEST=y diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index c58514669d..d3a350f540 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_ENV_ADDR=0xF7FE0000 CONFIG_XTFPGA_KC705=y CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_STANDALONE_LOAD_ADDR=0x00800000 CONFIG_SYS_MONITOR_BASE=0xF6000000 CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_SHOW_BOOT_PROGRESS=y @@ -39,6 +40,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y +CONFIG_FLASH_SHOW_PROGRESS=0 CONFIG_SYS_FLASH_EMPTY_INFO=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index f1c648a8f9..c194e89b7e 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -75,6 +75,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y +CONFIG_FLASH_SHOW_PROGRESS=10 CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y diff --git a/doc/README.fec_mxc b/doc/README.fec_mxc index d17dfb676f..4e890d348f 100644 --- a/doc/README.fec_mxc +++ b/doc/README.fec_mxc @@ -22,12 +22,6 @@ CONFIG_FEC_MXC_PHYADDR Optional, selects the exact phy address that should be connected and function fecmxc_initialize will try to initialize it. -CONFIG_FEC_FIXED_SPEED - Optional, selects a fixed speed on the MAC interface without asking some - phy. This is usefull if there is a direct MAC <-> MAC connection, for - example if the CPU is connected directly via the RGMII interface to a - ethernet-switch. - Reading the ethaddr from the SoC eFuses: if CONFIG_FEC_MXC is defined and the U-Boot environment does not contain the ethaddr variable, then its value gets read from the corresponding eFuses in diff --git a/doc/README.fsl-dpaa b/doc/README.fsl-dpaa deleted file mode 100644 index 3ef5eeb32e..0000000000 --- a/doc/README.fsl-dpaa +++ /dev/null @@ -1,10 +0,0 @@ -This file documents Freescale DPAA-specific options. - -FMan (Frame Manager) - - CONFIG_FSL_FM_10GEC_REGULAR_NOTATION - on SoCs T4240, T2080, LS1043A, etc, the notation between 10GEC and MAC as below: - 10GEC1->MAC9, 10GEC2->MAC10, 10GEC3->MAC1, 10GEC4->MAC2 - on SoCs T1024, etc, the notation between 10GEC and MAC as below: - 10GEC1->MAC1, 10GEC2->MAC2 - so we introduce CONFIG_FSL_FM_10GEC_REGULAR_NOTATION to identify the new SoCs on - which 10GEC enumeration is consistent with MAC enumeration. diff --git a/doc/arch/m68k.rst b/doc/arch/m68k.rst index 770327fea2..a9180fd785 100644 --- a/doc/arch/m68k.rst +++ b/doc/arch/m68k.rst @@ -93,10 +93,10 @@ Configuration to use a pre-loader ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ If U-Boot should be loaded to RAM and started by a pre-loader -CONFIG_MONITOR_IS_IN_RAM must be defined. If it is defined the +CONFIG_MONITOR_IS_IN_RAM must be enabled. If it is enabled the initial vector table and basic processor initialization will not be compiled in. The start address of U-Boot must be adjusted in -the boards config header file (CONFIG_SYS_MONITOR_BASE) and Makefile +the boards defconfig file (CONFIG_SYS_MONITOR_BASE) and Makefile (CONFIG_TEXT_BASE) to the load address. ColdFire CPU specific options/settings diff --git a/drivers/adc/adc-uclass.c b/drivers/adc/adc-uclass.c index 67137ffb34..9646e4d706 100644 --- a/drivers/adc/adc-uclass.c +++ b/drivers/adc/adc-uclass.c @@ -22,7 +22,7 @@ #define CHECK_MASK (!CHECK_NUMBER) /* TODO: add support for timer uclass (for early calls) */ -#ifdef CONFIG_SANDBOX_ARCH +#ifdef CONFIG_SANDBOX #define sdelay(x) udelay(x) #else extern void sdelay(unsigned long loops); diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index df7ec48465..759921bc58 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -938,7 +938,7 @@ static void set_ddr_sdram_cfg_2(const unsigned int ctrl_num, #if defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) /* Use the DDR controller to auto initialize memory. */ d_init = popts->ecc_init_using_memctl; - ddr->ddr_data_init = CONFIG_MEM_INIT_VALUE; + ddr->ddr_data_init = 0xDEADBEEF; debug("DDR: ddr_data_init = 0x%08x\n", ddr->ddr_data_init); #else /* Memory will be initialized via DMA, or not at all. */ @@ -1842,19 +1842,6 @@ static void set_ddr_sdram_mode(const unsigned int ctrl_num, } #endif -/* DDR SDRAM Data Initialization (DDR_DATA_INIT) */ -static void set_ddr_data_init(fsl_ddr_cfg_regs_t *ddr) -{ - unsigned int init_value; /* Initialization value */ - -#ifdef CONFIG_MEM_INIT_VALUE - init_value = CONFIG_MEM_INIT_VALUE; -#else - init_value = 0xDEADBEEF; -#endif - ddr->ddr_data_init = init_value; -} - /* * DDR SDRAM Clock Control (DDR_SDRAM_CLK_CNTL) * The old controller on the 8540/60 doesn't have this register. @@ -2537,7 +2524,7 @@ compute_fsl_memctl_config_regs(const unsigned int ctrl_num, set_ddr_sdram_rcw(ctrl_num, ddr, popts, common_dimm); set_ddr_sdram_interval(ctrl_num, ddr, popts, common_dimm); - set_ddr_data_init(ddr); + ddr->ddr_data_init = 0xDEADBEEF; set_ddr_sdram_clk_cntl(ddr, popts); set_ddr_init_addr(ddr); set_ddr_init_ext_addr(ddr); diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c index 0f1e99eeb0..16186bdbae 100644 --- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c +++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c @@ -73,7 +73,7 @@ ddr_enable_ecc(unsigned int dram_size) struct ccsr_ddr __iomem *ddr = (struct ccsr_ddr __iomem *)(CFG_SYS_FSL_DDR_ADDR); - dma_meminit(CONFIG_MEM_INIT_VALUE, dram_size); + dma_meminit(dram_size); /* * Enable errors for ECC. diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c index cd78e45d88..700df2236b 100644 --- a/drivers/dma/fsl_dma.c +++ b/drivers/dma/fsl_dma.c @@ -133,7 +133,7 @@ int dmacpy(phys_addr_t dest, phys_addr_t src, phys_size_t count) { */ #if ((!defined CONFIG_MPC83xx && defined(CONFIG_DDR_ECC) && \ !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))) -void dma_meminit(uint val, uint size) +void dma_meminit(uint size) { uint *p = 0; uint i = 0; @@ -142,7 +142,7 @@ void dma_meminit(uint val, uint size) if (((uint)p & 0x1f) == 0) ppcDcbz((ulong)p); - *p = (uint)CONFIG_MEM_INIT_VALUE; + *p = (uint)0xDEADBEEF; if (((uint)p & 0x1c) == 0x1c) ppcDcbf((ulong)p); diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 08b6c7bdcc..76e19918aa 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -704,7 +704,7 @@ config SYS_I2C_BUS_MAX depends on ARCH_OMAP2PLUS || ARCH_SOCFPGA default 2 if TI816X default 3 if OMAP34XX || AM33XX || AM43XX - default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X + default 4 if ARCH_SOCFPGA || OMAP44XX default 5 if OMAP54XX help Define the maximum number of available I2C buses. diff --git a/drivers/i2c/mv_i2c.c b/drivers/i2c/mv_i2c.c index 8ee17f0a45..5bc9cd7b29 100644 --- a/drivers/i2c/mv_i2c.c +++ b/drivers/i2c/mv_i2c.c @@ -374,45 +374,12 @@ static int __i2c_write(struct mv_i2c *base, uchar chip, u8 *addr, int alen, static struct mv_i2c *base_glob; -#ifdef CONFIG_I2C_MULTI_BUS -static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG; -static unsigned int bus_initialized[CONFIG_MV_I2C_NUM]; -static unsigned int current_bus; - -int i2c_set_bus_num(unsigned int bus) -{ - if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) { - printf("Bad bus: %d\n", bus); - return -1; - } - - base_glob = (struct mv_i2c *)i2c_regs[bus]; - current_bus = bus; - - if (!bus_initialized[current_bus]) { - bus_initialized[current_bus] = 1; - } - - return 0; -} - -unsigned int i2c_get_bus_num(void) -{ - return current_bus; -} -#endif - /* API Functions */ void i2c_init(int speed, int slaveaddr) { u32 val; -#ifdef CONFIG_I2C_MULTI_BUS - current_bus = 0; - base_glob = (struct mv_i2c *)i2c_regs[current_bus]; -#else base_glob = (struct mv_i2c *)CONFIG_MV_I2C_REG; -#endif if (speed > I2C_SPEED_STANDARD_RATE) val = ICR_FM; diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index bf4d994ff6..878f867c62 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -385,6 +385,11 @@ config MMC_OMAP36XX_PINS If unsure, say N. +config HSMMC2_8BIT + bool "Enable 8-bit interface for eMMC (interface #2)" + depends on MMC_OMAP_HS && (OMAP44XX || OMAP54XX || DRA7XX || AM33XX || \ + AM43XX || ARCH_KEYSTONE) + config SH_SDHI bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support" depends on ARCH_RMOBILE @@ -820,8 +825,13 @@ config MMC_MTK endif +config FSL_SDHC_V2_3 + bool + config FSL_ESDHC bool "Freescale/NXP eSDHC controller support" + select FSL_SDHC_V2_3 if ARCH_P1010 || ARCH_BSC9131 || ARCH_BSC9132 \ + || ARCH_C29X help This selects support for the eSDHC (Enhanced Secure Digital Host Controller) found on numerous Freescale/NXP SoCs. @@ -881,6 +891,10 @@ config FSL_USDHC help This enables the Ultra Secured Digital Host Controller enhancements +config FSL_ESDHC_PIN_MUX + bool "Perform esdhc device-tree fixup" + depends on (FSL_ESDHC || FSL_ESDHC_IMX) && OF_LIBFDT + endmenu config SYS_FSL_ERRATUM_ESDHC111 diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 5ee3ce7823..66caf683f7 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -1360,7 +1360,7 @@ int fsl_esdhc_mmc_init(struct bd_info *bis) #if CONFIG_IS_ENABLED(OF_LIBFDT) __weak int esdhc_status_fixup(void *blob, const char *compat) { - if (IS_ENABLED(FSL_ESDHC_PIN_MUX) && !hwconfig("esdhc")) { + if (IS_ENABLED(CONFIG_FSL_ESDHC_PIN_MUX) && !hwconfig("esdhc")) { do_fixup_by_compat(blob, compat, "status", "disabled", sizeof("disabled"), 1); return 1; diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index d8e2dec0a8..af45ef00da 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -77,6 +77,15 @@ config SYS_FLASH_CFI_WIDTH help This must be kept in sync with the table in include/flash.h +config FLASH_SHOW_PROGRESS + int "Print out a countdown durinng writes" + depends on FLASH_CFI_DRIVER + default 45 + help + If set to a non-zero value, print out countdown digits and dots. + Recommended value: 45 (9..1) for 80 column displays, 15 (3..1) for 40 + column displays. + config CFI_FLASH bool "Enable Driver Model for CFI Flash driver" depends on DM_MTD @@ -110,6 +119,13 @@ config SYS_FLASH_EMPTY_INFO bool "Enable displaying empty sectors in flash info" depends on FLASH_CFI_DRIVER +config FLASH_SPANSION_S29WS_N + bool "Non-standard s29ws-n MirrorBit flash" + depends on FLASH_CFI_DRIVER + help + Enable this if the s29ws-n MirrorBit flash has non-standard addresses + for buffered write commands. + config FLASH_CFI_MTD bool "Enable CFI MTD driver" depends on FLASH_CFI_DRIVER @@ -147,6 +163,18 @@ config SYS_FLASH_CHECKSUM If the variable flashchecksum is set in the environment, perform a CRC of the flash and print the value to console. +config FLASH_VERIFY + bool "Compare writes to NOR flash with source location" + depends on MTD_NOR_FLASH + help + If enabled, the content of the flash (destination) is compared + against the source after the write operation. An error message will + be printed when the contents are not identical. Please note that + this option is useless in nearly all cases, since such flash + programming errors usually are detected earlier while + unprotecting/erasing/programming. Please only enable this option if + you really know what you are doing. + config ALTERA_QSPI bool "Altera Generic Quad SPI Controller" depends on DM_MTD diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index c1cdd2cbc3..f378f6fb61 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -1292,7 +1292,7 @@ void flash_print_info(flash_info_t *info) * effect updates to digit and dots. Repeated code is nasty too, so * we define it once here. */ -#ifdef CONFIG_FLASH_SHOW_PROGRESS +#if CONFIG_FLASH_SHOW_PROGRESS #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ if (flash_verbose) { \ dots -= dots_sub; \ @@ -1325,7 +1325,7 @@ int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt) #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE int buffered_size; #endif -#ifdef CONFIG_FLASH_SHOW_PROGRESS +#if CONFIG_FLASH_SHOW_PROGRESS int digit = CONFIG_FLASH_SHOW_PROGRESS; int scale = 0; int dots = 0; diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 25b829f11c..1e4e5c9206 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -479,6 +479,10 @@ config SYS_NAND_SIZE depends on NAND_MXC && SPL_NAND_SUPPORT default 268435456 +config MXC_NAND_HWECC + bool "Hardware ECC support in MXC NAND" + depends on NAND_MXC + config NAND_MXS bool "MXS NAND support" depends on MX23 || MX28 || MX6 || MX7 || IMX8 || IMX8M diff --git a/drivers/mtd/nand/raw/fsl_ifc_spl.c b/drivers/mtd/nand/raw/fsl_ifc_spl.c index 3b464ce10c..60a865b566 100644 --- a/drivers/mtd/nand/raw/fsl_ifc_spl.c +++ b/drivers/mtd/nand/raw/fsl_ifc_spl.c @@ -278,11 +278,11 @@ void nand_boot(void) * U-Boot header is appended at end of U-boot image, so * calculate U-boot header address using U-boot header size. */ -#define CONFIG_U_BOOT_HDR_ADDR \ +#define FSL_U_BOOT_HDR_ADDR \ ((CFG_SYS_NAND_U_BOOT_START + \ CFG_SYS_NAND_U_BOOT_SIZE) - \ - CONFIG_U_BOOT_HDR_SIZE) - spl_validate_uboot(CONFIG_U_BOOT_HDR_ADDR, + FSL_U_BOOT_HDR_SIZE) + spl_validate_uboot(FSL_U_BOOT_HDR_ADDR, CFG_SYS_NAND_U_BOOT_START); /* * In case of failure in validation, spl_validate_uboot would diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 4e5da5ab72..7873538cc2 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -198,6 +198,18 @@ config DRIVER_DM9000 help The Davicom DM9000 parallel bus external ethernet interface chip. +config DM9000_BYTE_SWAPPED + bool "Byte swapped access for DM9000" + depends on DRIVER_DM9000 + +config DM9000_NO_SROM + bool "No SROM on DM9000" + depends on DRIVER_DM9000 + +config DM9000_USE_16BIT + bool "Use 16bit access in DM9000" + depends on DRIVER_DM9000 + config DWC_ETH_QOS bool "Synopsys DWC Ethernet QOS device support" select PHYLIB @@ -360,6 +372,7 @@ config FMAN_ENET select SYS_FMAN_V3 if ARCH_B4420 || ARCH_B4860 || ARCH_LS1043A || \ ARCH_LS1046A || ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || \ ARCH_T2080 || ARCH_T4240 + select FSL_FM_10GEC_REGULAR_NOTATION if ARCH_T1024 help This driver support the Freescale FMan Ethernet controller @@ -379,6 +392,18 @@ config SYS_FMAN_V3 help SoC has FMan v3 with mEMAC +config FSL_FM_10GEC_REGULAR_NOTATION + bool + help + On SoCs T4240, T2080, LS1043A, etc, the notation between 10GEC and + MAC as below: + 10GEC1->MAC9, 10GEC2->MAC10, 10GEC3->MAC1, 10GEC4->MAC2 + While on SoCs T1024, etc, the notation between 10GEC and MAC as below: + 10GEC1->MAC1, 10GEC2->MAC2 + so we introduce CONFIG_FSL_FM_10GEC_REGULAR_NOTATION to identify the + new SoCs on which 10GEC enumeration is consistent with MAC + enumeration. + config FTMAC100 bool "Ftmac100 Ethernet Support" help @@ -684,9 +709,6 @@ config XILINX_AXIMRMAC config VSC7385_ENET bool "Vitesse 7385 Switch Firmware Upload driver" -config VSC9953 - bool "Vitesse VSC9953 L2 Switch driver" - config XILINX_EMACLITE select PHYLIB select MII diff --git a/drivers/net/Makefile b/drivers/net/Makefile index d3fc6b7d3e..5b4e60eea3 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -87,7 +87,6 @@ obj-$(CONFIG_SUN8I_EMAC) += sun8i_emac.o obj-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o obj-$(CONFIG_TULIP) += dc2114x.o obj-$(CONFIG_VSC7385_ENET) += vsc7385.o -obj-$(CONFIG_VSC9953) += vsc9953.o obj-$(CONFIG_XILINX_AXIEMAC) += xilinx_axi_emac.o obj-$(CONFIG_XILINX_AXIMRMAC) += xilinx_axi_mrmac.o obj-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index a61a1fc757..9cb235ad5e 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -268,7 +268,6 @@ static int miiphy_restart_aneg(struct eth_device *dev) return ret; } -#ifndef CONFIG_FEC_FIXED_SPEED static int miiphy_wait_aneg(struct eth_device *dev) { uint32_t start; @@ -294,7 +293,6 @@ static int miiphy_wait_aneg(struct eth_device *dev) return 0; } -#endif /* CONFIG_FEC_FIXED_SPEED */ #endif static int fec_rx_task_enable(struct fec_priv *fec) @@ -536,8 +534,6 @@ static int fec_open(struct udevice *dev) } speed = fec->phydev->speed; } -#elif CONFIG_FEC_FIXED_SPEED - speed = CONFIG_FEC_FIXED_SPEED; #else miiphy_wait_aneg(edev); speed = miiphy_speed(edev->name, fec->phy_id); diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index 58363fce05..3587ca2124 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -37,10 +37,6 @@ DECLARE_GLOBAL_DATA_PTR; -#ifndef CONFIG_MVGBE_PORTS -# define CONFIG_MVGBE_PORTS {0, 0} -#endif - #define MV_PHY_ADR_REQUEST 0xee #define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)->smi) #define MVGBE_PGADR_REG 22 diff --git a/drivers/net/mvgbe.h b/drivers/net/mvgbe.h index e3f5ac0639..6514ab67ba 100644 --- a/drivers/net/mvgbe.h +++ b/drivers/net/mvgbe.h @@ -11,13 +11,6 @@ #ifndef __MVGBE_H__ #define __MVGBE_H__ -/* PHY_BASE_ADR is board specific and can be configured */ -#if defined (CONFIG_PHY_BASE_ADR) -#define PHY_BASE_ADR CONFIG_PHY_BASE_ADR -#else -#define PHY_BASE_ADR 0x08 /* default phy base addr */ -#endif - /* Constants */ #define INT_CAUSE_UNMASK_ALL 0x0007ffff #define INT_CAUSE_UNMASK_ALL_EXT 0x0011ffff diff --git a/drivers/net/qe/uec.h b/drivers/net/qe/uec.h index 551d7061cc..4510205da3 100644 --- a/drivers/net/qe/uec.h +++ b/drivers/net/qe/uec.h @@ -689,5 +689,4 @@ struct uec_priv { int uec_initialize(struct bd_info *bis, struct uec_inf *uec_info); int uec_eth_init(struct bd_info *bis, struct uec_inf *uecs, int num); -int uec_standard_init(struct bd_info *bis); #endif /* __UEC_H__ */ diff --git a/drivers/net/ti/Kconfig b/drivers/net/ti/Kconfig index 59c96d862d..e13dbc9401 100644 --- a/drivers/net/ti/Kconfig +++ b/drivers/net/ti/Kconfig @@ -25,6 +25,19 @@ config DRIVER_TI_KEYSTONE_NET help This driver supports the TI Keystone 2 Ethernet subsystem +choice + prompt "TI Keystone 2 Ethernet NETCP IP revision" + depends on DRIVER_TI_KEYSTONE_NET + default KSNET_NETCP_V1_5 + +config KSNET_NETCP_V1_0 + bool "NETCP version 1.0" + +config KSNET_NETCP_V1_5 + bool "NETCP version 1.5" + +endchoice + config TI_AM65_CPSW_NUSS bool "TI K3 AM65x MCU CPSW Nuss Ethernet controller driver" depends on ARCH_K3 diff --git a/drivers/net/ti/cpsw.c b/drivers/net/ti/cpsw.c index a19dc38e52..3a8cc9c52a 100644 --- a/drivers/net/ti/cpsw.c +++ b/drivers/net/ti/cpsw.c @@ -79,10 +79,6 @@ struct cpsw_slave_regs { u32 tx_pri_map; #ifdef CONFIG_AM33XX u32 gap_thresh; -#elif defined(CONFIG_TI814X) - u32 ts_ctl; - u32 ts_seq_ltype; - u32 ts_vlan; #endif u32 sa_lo; u32 sa_hi; diff --git a/drivers/net/vsc9953.c b/drivers/net/vsc9953.c deleted file mode 100644 index 29f26b4b33..0000000000 --- a/drivers/net/vsc9953.c +++ /dev/null @@ -1,2754 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2014 - 2015 Freescale Semiconductor, Inc. - * - * Driver for the Vitesse VSC9953 L2 Switch - */ - -#include <common.h> -#include <command.h> -#include <log.h> -#include <asm/io.h> -#include <asm/fsl_serdes.h> -#include <fm_eth.h> -#include <fsl_memac.h> -#include <bitfield.h> -#include <errno.h> -#include <malloc.h> -#include <vsc9953.h> -#include <ethsw.h> -#include <linux/delay.h> - -static struct vsc9953_info vsc9953_l2sw = { - .port[0] = VSC9953_PORT_INFO_INITIALIZER(0), - .port[1] = VSC9953_PORT_INFO_INITIALIZER(1), - .port[2] = VSC9953_PORT_INFO_INITIALIZER(2), - .port[3] = VSC9953_PORT_INFO_INITIALIZER(3), - .port[4] = VSC9953_PORT_INFO_INITIALIZER(4), - .port[5] = VSC9953_PORT_INFO_INITIALIZER(5), - .port[6] = VSC9953_PORT_INFO_INITIALIZER(6), - .port[7] = VSC9953_PORT_INFO_INITIALIZER(7), - .port[8] = VSC9953_PORT_INFO_INITIALIZER(8), - .port[9] = VSC9953_PORT_INFO_INITIALIZER(9), -}; - -void vsc9953_port_info_set_mdio(int port_no, struct mii_dev *bus) -{ - if (!VSC9953_PORT_CHECK(port_no)) - return; - - vsc9953_l2sw.port[port_no].bus = bus; -} - -void vsc9953_port_info_set_phy_address(int port_no, int address) -{ - if (!VSC9953_PORT_CHECK(port_no)) - return; - - vsc9953_l2sw.port[port_no].phyaddr = address; -} - -void vsc9953_port_info_set_phy_int(int port_no, phy_interface_t phy_int) -{ - if (!VSC9953_PORT_CHECK(port_no)) - return; - - vsc9953_l2sw.port[port_no].enet_if = phy_int; -} - -void vsc9953_port_enable(int port_no) -{ - if (!VSC9953_PORT_CHECK(port_no)) - return; - - vsc9953_l2sw.port[port_no].enabled = 1; -} - -void vsc9953_port_disable(int port_no) -{ - if (!VSC9953_PORT_CHECK(port_no)) - return; - - vsc9953_l2sw.port[port_no].enabled = 0; -} - -static void vsc9953_mdio_write(struct vsc9953_mii_mng *phyregs, int port_addr, - int regnum, int value) -{ - int timeout = 50000; - - out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) | - ((regnum & 0x1f) << 20) | ((value & 0xffff) << 4) | - (0x1 << 1)); - asm("sync"); - - while ((in_le32(&phyregs->miimstatus) & 0x8) && --timeout) - udelay(1); - - if (timeout == 0) - debug("Timeout waiting for MDIO write\n"); -} - -static int vsc9953_mdio_read(struct vsc9953_mii_mng *phyregs, int port_addr, - int regnum) -{ - int value = 0xFFFF; - int timeout = 50000; - - while ((in_le32(&phyregs->miimstatus) & MIIMIND_OPR_PEND) && --timeout) - udelay(1); - if (timeout == 0) { - debug("Timeout waiting for MDIO operation to finish\n"); - return value; - } - - /* Put the address of the phy, and the register - * number into MIICMD - */ - out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) | - ((regnum & 0x1f) << 20) | ((value & 0xffff) << 4) | - (0x2 << 1)); - - timeout = 50000; - /* Wait for the the indication that the read is done */ - while ((in_le32(&phyregs->miimstatus) & 0x8) && --timeout) - udelay(1); - if (timeout == 0) - debug("Timeout waiting for MDIO read\n"); - - /* Grab the value read from the PHY */ - value = in_le32(&phyregs->miimdata); - - if ((value & 0x00030000) == 0) - return value & 0x0000ffff; - - return value; -} - -static int init_phy(struct eth_device *dev) -{ - struct vsc9953_port_info *l2sw_port = dev->priv; - struct phy_device *phydev = NULL; - -#ifdef CONFIG_PHYLIB - if (!l2sw_port->bus) - return 0; - phydev = phy_connect(l2sw_port->bus, l2sw_port->phyaddr, dev, - l2sw_port->enet_if); - if (!phydev) { - printf("Failed to connect\n"); - return -1; - } - - phydev->supported &= SUPPORTED_10baseT_Half | - SUPPORTED_10baseT_Full | - SUPPORTED_100baseT_Half | - SUPPORTED_100baseT_Full | - SUPPORTED_1000baseT_Full; - phydev->advertising = phydev->supported; - - l2sw_port->phydev = phydev; - - phy_config(phydev); -#endif - - return 0; -} - -static int vsc9953_port_init(int port_no) -{ - struct eth_device *dev; - - /* Internal ports never have a PHY */ - if (VSC9953_INTERNAL_PORT_CHECK(port_no)) - return 0; - - /* alloc eth device */ - dev = (struct eth_device *)calloc(1, sizeof(struct eth_device)); - if (!dev) - return -ENOMEM; - - sprintf(dev->name, "SW@PORT%d", port_no); - dev->priv = &vsc9953_l2sw.port[port_no]; - dev->init = NULL; - dev->halt = NULL; - dev->send = NULL; - dev->recv = NULL; - - if (init_phy(dev)) { - free(dev); - return -ENODEV; - } - - return 0; -} - -static int vsc9953_vlan_table_poll_idle(void) -{ - struct vsc9953_analyzer *l2ana_reg; - int timeout; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - timeout = 50000; - while (((in_le32(&l2ana_reg->ana_tables.vlan_access) & - VSC9953_VLAN_CMD_MASK) != VSC9953_VLAN_CMD_IDLE) && --timeout) - udelay(1); - - return timeout ? 0 : -EBUSY; -} - -#ifdef CONFIG_CMD_ETHSW -/* Add/remove a port to/from a VLAN */ -static void vsc9953_vlan_table_membership_set(int vid, u32 port_no, u8 add) -{ - u32 val; - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - if (vsc9953_vlan_table_poll_idle() < 0) { - debug("VLAN table timeout\n"); - return; - } - - val = in_le32(&l2ana_reg->ana_tables.vlan_tidx); - val = bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid); - out_le32(&l2ana_reg->ana_tables.vlan_tidx, val); - - clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access, - VSC9953_VLAN_CMD_MASK, VSC9953_VLAN_CMD_READ); - - if (vsc9953_vlan_table_poll_idle() < 0) { - debug("VLAN table timeout\n"); - return; - } - - val = in_le32(&l2ana_reg->ana_tables.vlan_tidx); - val = bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid); - out_le32(&l2ana_reg->ana_tables.vlan_tidx, val); - - val = in_le32(&l2ana_reg->ana_tables.vlan_access); - if (!add) { - val = bitfield_replace_by_mask(val, VSC9953_VLAN_CMD_MASK, - VSC9953_VLAN_CMD_WRITE) & - ~(bitfield_replace_by_mask(0, VSC9953_VLAN_PORT_MASK, - (1 << port_no))); - ; - } else { - val = bitfield_replace_by_mask(val, VSC9953_VLAN_CMD_MASK, - VSC9953_VLAN_CMD_WRITE) | - bitfield_replace_by_mask(0, VSC9953_VLAN_PORT_MASK, - (1 << port_no)); - } - out_le32(&l2ana_reg->ana_tables.vlan_access, val); - - /* wait for VLAN table command to flush */ - if (vsc9953_vlan_table_poll_idle() < 0) { - debug("VLAN table timeout\n"); - return; - } -} - -/* show VLAN membership for a port */ -static void vsc9953_vlan_membership_show(int port_no) -{ - u32 val; - struct vsc9953_analyzer *l2ana_reg; - u32 vid; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - printf("Port %d VLAN membership: ", port_no); - - for (vid = 0; vid < VSC9953_MAX_VLAN; vid++) { - if (vsc9953_vlan_table_poll_idle() < 0) { - debug("VLAN table timeout\n"); - return; - } - - val = in_le32(&l2ana_reg->ana_tables.vlan_tidx); - val = bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, - vid); - out_le32(&l2ana_reg->ana_tables.vlan_tidx, val); - - clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access, - VSC9953_VLAN_CMD_MASK, VSC9953_VLAN_CMD_READ); - - if (vsc9953_vlan_table_poll_idle() < 0) { - debug("VLAN table timeout\n"); - return; - } - - val = in_le32(&l2ana_reg->ana_tables.vlan_access); - - if (bitfield_extract_by_mask(val, VSC9953_VLAN_PORT_MASK) & - (1 << port_no)) - printf("%d ", vid); - } - printf("\n"); -} -#endif - -/* vlan table set/clear all membership of vid */ -static void vsc9953_vlan_table_membership_all_set(int vid, int set_member) -{ - uint val; - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - if (vsc9953_vlan_table_poll_idle() < 0) { - debug("VLAN table timeout\n"); - return; - } - - /* read current vlan configuration */ - val = in_le32(&l2ana_reg->ana_tables.vlan_tidx); - out_le32(&l2ana_reg->ana_tables.vlan_tidx, - bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid)); - - clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access, - VSC9953_VLAN_CMD_MASK, VSC9953_VLAN_CMD_READ); - - if (vsc9953_vlan_table_poll_idle() < 0) { - debug("VLAN table timeout\n"); - return; - } - - val = in_le32(&l2ana_reg->ana_tables.vlan_tidx); - out_le32(&l2ana_reg->ana_tables.vlan_tidx, - bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid)); - - clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access, - VSC9953_VLAN_PORT_MASK | VSC9953_VLAN_CMD_MASK, - VSC9953_VLAN_CMD_WRITE | - (set_member ? VSC9953_VLAN_PORT_MASK : 0)); -} - -#ifdef CONFIG_CMD_ETHSW -/* Get PVID of a VSC9953 port */ -static int vsc9953_port_vlan_pvid_get(int port_nr, int *pvid) -{ - u32 val; - struct vsc9953_analyzer *l2ana_reg; - - /* Administrative down */ - if (!vsc9953_l2sw.port[port_nr].enabled) { - printf("Port %d is administrative down\n", port_nr); - return -1; - } - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - /* Get ingress PVID */ - val = in_le32(&l2ana_reg->port[port_nr].vlan_cfg); - *pvid = bitfield_extract_by_mask(val, VSC9953_VLAN_CFG_VID_MASK); - - return 0; -} -#endif - -/* Set PVID for a VSC9953 port */ -static void vsc9953_port_vlan_pvid_set(int port_no, int pvid) -{ - uint val; - struct vsc9953_analyzer *l2ana_reg; - struct vsc9953_rew_reg *l2rew_reg; - - /* Administrative down */ - if (!vsc9953_l2sw.port[port_no].enabled) { - printf("Port %d is administrative down\n", port_no); - return; - } - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET + - VSC9953_REW_OFFSET); - - /* Set PVID on ingress */ - val = in_le32(&l2ana_reg->port[port_no].vlan_cfg); - val = bitfield_replace_by_mask(val, VSC9953_VLAN_CFG_VID_MASK, pvid); - out_le32(&l2ana_reg->port[port_no].vlan_cfg, val); - - /* Set PVID on egress */ - val = in_le32(&l2rew_reg->port[port_no].port_vlan_cfg); - val = bitfield_replace_by_mask(val, VSC9953_PORT_VLAN_CFG_VID_MASK, - pvid); - out_le32(&l2rew_reg->port[port_no].port_vlan_cfg, val); -} - -static void vsc9953_port_all_vlan_pvid_set(int pvid) -{ - int i; - - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_port_vlan_pvid_set(i, pvid); -} - -/* Enable/disable vlan aware of a VSC9953 port */ -static void vsc9953_port_vlan_aware_set(int port_no, int enabled) -{ - struct vsc9953_analyzer *l2ana_reg; - - /* Administrative down */ - if (!vsc9953_l2sw.port[port_no].enabled) { - printf("Port %d is administrative down\n", port_no); - return; - } - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - if (enabled) - setbits_le32(&l2ana_reg->port[port_no].vlan_cfg, - VSC9953_VLAN_CFG_AWARE_ENA); - else - clrbits_le32(&l2ana_reg->port[port_no].vlan_cfg, - VSC9953_VLAN_CFG_AWARE_ENA); -} - -/* Set all VSC9953 ports' vlan aware */ -static void vsc9953_port_all_vlan_aware_set(int enabled) -{ - int i; - - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_port_vlan_aware_set(i, enabled); -} - -/* Enable/disable vlan pop count of a VSC9953 port */ -static void vsc9953_port_vlan_popcnt_set(int port_no, int popcnt) -{ - uint val; - struct vsc9953_analyzer *l2ana_reg; - - /* Administrative down */ - if (!vsc9953_l2sw.port[port_no].enabled) { - printf("Port %d is administrative down\n", port_no); - return; - } - - if (popcnt > 3 || popcnt < 0) { - printf("Invalid pop count value: %d\n", port_no); - return; - } - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - val = in_le32(&l2ana_reg->port[port_no].vlan_cfg); - val = bitfield_replace_by_mask(val, VSC9953_VLAN_CFG_POP_CNT_MASK, - popcnt); - out_le32(&l2ana_reg->port[port_no].vlan_cfg, val); -} - -/* Set all VSC9953 ports' pop count */ -static void vsc9953_port_all_vlan_poncnt_set(int popcnt) -{ - int i; - - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_port_vlan_popcnt_set(i, popcnt); -} - -/* Enable/disable learning for frames dropped due to ingress filtering */ -static void vsc9953_vlan_ingr_fltr_learn_drop(int enable) -{ - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - if (enable) - setbits_le32(&l2ana_reg->ana.adv_learn, VSC9953_VLAN_CHK); - else - clrbits_le32(&l2ana_reg->ana.adv_learn, VSC9953_VLAN_CHK); -} - -enum aggr_code_mode { - AGGR_CODE_RAND = 0, - AGGR_CODE_ALL, /* S/D MAC, IPv4 S/D IP, IPv6 Flow Label, S/D PORT */ -}; - -/* Set aggregation code generation mode */ -static int vsc9953_aggr_code_set(enum aggr_code_mode ac) -{ - int rc; - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - switch (ac) { - case AGGR_CODE_RAND: - clrsetbits_le32(&l2ana_reg->common.aggr_cfg, - VSC9953_AC_DMAC_ENA | VSC9953_AC_SMAC_ENA | - VSC9953_AC_IP6_LBL_ENA | - VSC9953_AC_IP6_TCPUDP_ENA | - VSC9953_AC_IP4_SIPDIP_ENA | - VSC9953_AC_IP4_TCPUDP_ENA, VSC9953_AC_RND_ENA); - rc = 0; - break; - case AGGR_CODE_ALL: - clrsetbits_le32(&l2ana_reg->common.aggr_cfg, VSC9953_AC_RND_ENA, - VSC9953_AC_DMAC_ENA | VSC9953_AC_SMAC_ENA | - VSC9953_AC_IP6_LBL_ENA | - VSC9953_AC_IP6_TCPUDP_ENA | - VSC9953_AC_IP4_SIPDIP_ENA | - VSC9953_AC_IP4_TCPUDP_ENA); - rc = 0; - break; - default: - /* unknown mode for aggregation code */ - rc = -EINVAL; - } - - return rc; -} - -/* Egress untag modes of a VSC9953 port */ -enum egress_untag_mode { - EGRESS_UNTAG_ALL = 0, - EGRESS_UNTAG_PVID_AND_ZERO, - EGRESS_UNTAG_ZERO, - EGRESS_UNTAG_NONE, -}; - -#ifdef CONFIG_CMD_ETHSW -/* Get egress tagging configuration for a VSC9953 port */ -static int vsc9953_port_vlan_egr_untag_get(int port_no, - enum egress_untag_mode *mode) -{ - u32 val; - struct vsc9953_rew_reg *l2rew_reg; - - /* Administrative down */ - if (!vsc9953_l2sw.port[port_no].enabled) { - printf("Port %d is administrative down\n", port_no); - return -1; - } - - l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET + - VSC9953_REW_OFFSET); - - val = in_le32(&l2rew_reg->port[port_no].port_tag_cfg); - - switch (val & VSC9953_TAG_CFG_MASK) { - case VSC9953_TAG_CFG_NONE: - *mode = EGRESS_UNTAG_ALL; - return 0; - case VSC9953_TAG_CFG_ALL_BUT_PVID_ZERO: - *mode = EGRESS_UNTAG_PVID_AND_ZERO; - return 0; - case VSC9953_TAG_CFG_ALL_BUT_ZERO: - *mode = EGRESS_UNTAG_ZERO; - return 0; - case VSC9953_TAG_CFG_ALL: - *mode = EGRESS_UNTAG_NONE; - return 0; - default: - printf("Unknown egress tagging configuration for port %d\n", - port_no); - return -1; - } -} - -/* Show egress tagging configuration for a VSC9953 port */ -static void vsc9953_port_vlan_egr_untag_show(int port_no) -{ - enum egress_untag_mode mode; - - if (vsc9953_port_vlan_egr_untag_get(port_no, &mode)) { - printf("%7d\t%17s\n", port_no, "-"); - return; - } - - printf("%7d\t", port_no); - switch (mode) { - case EGRESS_UNTAG_ALL: - printf("%17s\n", "all"); - break; - case EGRESS_UNTAG_NONE: - printf("%17s\n", "none"); - break; - case EGRESS_UNTAG_PVID_AND_ZERO: - printf("%17s\n", "PVID and 0"); - break; - case EGRESS_UNTAG_ZERO: - printf("%17s\n", "0"); - break; - default: - printf("%17s\n", "-"); - } -} -#endif - -static void vsc9953_port_vlan_egr_untag_set(int port_no, - enum egress_untag_mode mode) -{ - struct vsc9953_rew_reg *l2rew_reg; - - /* Administrative down */ - if (!vsc9953_l2sw.port[port_no].enabled) { - printf("Port %d is administrative down\n", port_no); - return; - } - - l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET + - VSC9953_REW_OFFSET); - - switch (mode) { - case EGRESS_UNTAG_ALL: - clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg, - VSC9953_TAG_CFG_MASK, VSC9953_TAG_CFG_NONE); - break; - case EGRESS_UNTAG_PVID_AND_ZERO: - clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg, - VSC9953_TAG_CFG_MASK, - VSC9953_TAG_CFG_ALL_BUT_PVID_ZERO); - break; - case EGRESS_UNTAG_ZERO: - clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg, - VSC9953_TAG_CFG_MASK, - VSC9953_TAG_CFG_ALL_BUT_ZERO); - break; - case EGRESS_UNTAG_NONE: - clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg, - VSC9953_TAG_CFG_MASK, VSC9953_TAG_CFG_ALL); - break; - default: - printf("Unknown untag mode for port %d\n", port_no); - } -} - -static void vsc9953_port_all_vlan_egress_untagged_set( - enum egress_untag_mode mode) -{ - int i; - - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_port_vlan_egr_untag_set(i, mode); -} - -static int vsc9953_autoage_time_set(int age_period) -{ - u32 autoage; - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - if (age_period < 0 || age_period > VSC9953_AUTOAGE_PERIOD_MASK) - return -EINVAL; - - autoage = bitfield_replace_by_mask(in_le32(&l2ana_reg->ana.auto_age), - VSC9953_AUTOAGE_PERIOD_MASK, - age_period); - out_le32(&l2ana_reg->ana.auto_age, autoage); - - return 0; -} - -#ifdef CONFIG_CMD_ETHSW - -/* Enable/disable status of a VSC9953 port */ -static void vsc9953_port_status_set(int port_no, u8 enabled) -{ - struct vsc9953_qsys_reg *l2qsys_reg; - - /* Administrative down */ - if (!vsc9953_l2sw.port[port_no].enabled) - return; - - l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET + - VSC9953_QSYS_OFFSET); - - if (enabled) - setbits_le32(&l2qsys_reg->sys.switch_port_mode[port_no], - VSC9953_PORT_ENA); - else - clrbits_le32(&l2qsys_reg->sys.switch_port_mode[port_no], - VSC9953_PORT_ENA); -} - -/* Start autonegotiation for a VSC9953 PHY */ -static void vsc9953_phy_autoneg(int port_no) -{ - if (!vsc9953_l2sw.port[port_no].phydev) - return; - - if (vsc9953_l2sw.port[port_no].phydev->drv->startup( - vsc9953_l2sw.port[port_no].phydev)) - printf("Failed to start PHY for port %d\n", port_no); -} - -/* Print a VSC9953 port's configuration */ -static void vsc9953_port_config_show(int port_no) -{ - int speed; - int duplex; - int link; - u8 enabled; - u32 val; - struct vsc9953_qsys_reg *l2qsys_reg; - - l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET + - VSC9953_QSYS_OFFSET); - - val = in_le32(&l2qsys_reg->sys.switch_port_mode[port_no]); - enabled = vsc9953_l2sw.port[port_no].enabled && - (val & VSC9953_PORT_ENA); - - /* internal ports (8 and 9) are fixed */ - if (VSC9953_INTERNAL_PORT_CHECK(port_no)) { - link = 1; - speed = SPEED_2500; - duplex = DUPLEX_FULL; - } else { - if (vsc9953_l2sw.port[port_no].phydev) { - link = vsc9953_l2sw.port[port_no].phydev->link; - speed = vsc9953_l2sw.port[port_no].phydev->speed; - duplex = vsc9953_l2sw.port[port_no].phydev->duplex; - } else { - link = -1; - speed = -1; - duplex = -1; - } - } - - printf("%8d ", port_no); - printf("%8s ", enabled == 1 ? "enabled" : "disabled"); - printf("%8s ", link == 1 ? "up" : "down"); - - switch (speed) { - case SPEED_10: - printf("%8d ", 10); - break; - case SPEED_100: - printf("%8d ", 100); - break; - case SPEED_1000: - printf("%8d ", 1000); - break; - case SPEED_2500: - printf("%8d ", 2500); - break; - case SPEED_10000: - printf("%8d ", 10000); - break; - default: - printf("%8s ", "-"); - } - - printf("%8s\n", duplex == DUPLEX_FULL ? "full" : "half"); -} - -/* Show VSC9953 ports' statistics */ -static void vsc9953_port_statistics_show(int port_no) -{ - u32 rx_val; - u32 tx_val; - struct vsc9953_system_reg *l2sys_reg; - - /* Administrative down */ - if (!vsc9953_l2sw.port[port_no].enabled) { - printf("Port %d is administrative down\n", port_no); - return; - } - - l2sys_reg = (struct vsc9953_system_reg *)(VSC9953_OFFSET + - VSC9953_SYS_OFFSET); - - printf("Statistics for L2 Switch port %d:\n", port_no); - - /* Set counter view for our port */ - out_le32(&l2sys_reg->sys.stat_cfg, port_no); - -#define VSC9953_STATS_PRINTF "%-15s %10u" - - /* Get number of Rx and Tx frames */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_short) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_frag) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_jabber) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_long) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_64) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_65_127) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_128_255) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_256_511) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_512_1023) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_1024_1526) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_jumbo); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_64) + - in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_65_127) + - in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_128_255) + - in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_256_511) + - in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_512_1023) + - in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_1024_1526) + - in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_jumbo); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx frames:", rx_val, "Tx frames:", tx_val); - - /* Get number of Rx and Tx bytes */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_oct); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_oct); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx bytes:", rx_val, "Tx bytes:", tx_val); - - /* Get number of Rx frames received ok and Tx frames sent ok */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_0) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_1) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_2) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_3) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_4) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_5) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_6) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_7) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_0) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_1) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_2) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_3) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_4) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_5) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_6) + - in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_7); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_64) + - in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_65_127) + - in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_128_255) + - in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_256_511) + - in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_512_1023) + - in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_1024_1526) + - in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_jumbo); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx frames ok:", rx_val, "Tx frames ok:", tx_val); - - /* Get number of Rx and Tx unicast frames */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_uc); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_uc); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx unicast:", rx_val, "Tx unicast:", tx_val); - - /* Get number of Rx and Tx broadcast frames */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_bc); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_bc); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx broadcast:", rx_val, "Tx broadcast:", tx_val); - - /* Get number of Rx and Tx frames of 64B */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_64); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_64); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx 64B:", rx_val, "Tx 64B:", tx_val); - - /* Get number of Rx and Tx frames with sizes between 65B and 127B */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_65_127); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_65_127); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx 65B-127B:", rx_val, "Tx 65B-127B:", tx_val); - - /* Get number of Rx and Tx frames with sizes between 128B and 255B */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_128_255); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_128_255); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx 128B-255B:", rx_val, "Tx 128B-255B:", tx_val); - - /* Get number of Rx and Tx frames with sizes between 256B and 511B */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_256_511); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_256_511); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx 256B-511B:", rx_val, "Tx 256B-511B:", tx_val); - - /* Get number of Rx and Tx frames with sizes between 512B and 1023B */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_512_1023); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_512_1023); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx 512B-1023B:", rx_val, "Tx 512B-1023B:", tx_val); - - /* Get number of Rx and Tx frames with sizes between 1024B and 1526B */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_1024_1526); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_1024_1526); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx 1024B-1526B:", rx_val, "Tx 1024B-1526B:", tx_val); - - /* Get number of Rx and Tx jumbo frames */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_jumbo); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_jumbo); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx jumbo:", rx_val, "Tx jumbo:", tx_val); - - /* Get number of Rx and Tx dropped frames */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_cat_drop) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_tail) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_0) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_1) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_2) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_3) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_4) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_5) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_6) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_7) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_0) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_1) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_2) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_3) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_4) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_5) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_6) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_7); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_drop) + - in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_aged); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx drops:", rx_val, "Tx drops:", tx_val); - - /* - * Get number of Rx frames with CRC or alignment errors - * and number of detected Tx collisions - */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_crc); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_col); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx CRC&align:", rx_val, "Tx coll:", tx_val); - - /* - * Get number of Rx undersized frames and - * number of Tx aged frames - */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_short); - tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_aged); - printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n", - "Rx undersize:", rx_val, "Tx aged:", tx_val); - - /* Get number of Rx oversized frames */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_long); - printf(VSC9953_STATS_PRINTF"\n", "Rx oversized:", rx_val); - - /* Get number of Rx fragmented frames */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_frag); - printf(VSC9953_STATS_PRINTF"\n", "Rx fragments:", rx_val); - - /* Get number of Rx jabber errors */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_jabber); - printf(VSC9953_STATS_PRINTF"\n", "Rx jabbers:", rx_val); - - /* - * Get number of Rx frames filtered due to classification rules or - * no destination ports - */ - rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_cat_drop) + - in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_local); - printf(VSC9953_STATS_PRINTF"\n", "Rx filtered:", rx_val); - - printf("\n"); -} - -/* Clear statistics for a VSC9953 port */ -static void vsc9953_port_statistics_clear(int port_no) -{ - struct vsc9953_system_reg *l2sys_reg; - - /* Administrative down */ - if (!vsc9953_l2sw.port[port_no].enabled) { - printf("Port %d is administrative down\n", port_no); - return; - } - - l2sys_reg = (struct vsc9953_system_reg *)(VSC9953_OFFSET + - VSC9953_SYS_OFFSET); - - /* Clear all counter groups for our ports */ - out_le32(&l2sys_reg->sys.stat_cfg, port_no | - VSC9953_STAT_CLEAR_RX | VSC9953_STAT_CLEAR_TX | - VSC9953_STAT_CLEAR_DR); -} - -enum port_learn_mode { - PORT_LEARN_NONE, - PORT_LEARN_AUTO -}; - -/* Set learning configuration for a VSC9953 port */ -static void vsc9953_port_learn_mode_set(int port_no, enum port_learn_mode mode) -{ - struct vsc9953_analyzer *l2ana_reg; - - /* Administrative down */ - if (!vsc9953_l2sw.port[port_no].enabled) { - printf("Port %d is administrative down\n", port_no); - return; - } - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - switch (mode) { - case PORT_LEARN_NONE: - clrbits_le32(&l2ana_reg->port[port_no].port_cfg, - VSC9953_PORT_CFG_LEARN_DROP | - VSC9953_PORT_CFG_LEARN_CPU | - VSC9953_PORT_CFG_LEARN_AUTO | - VSC9953_PORT_CFG_LEARN_ENA); - break; - case PORT_LEARN_AUTO: - clrsetbits_le32(&l2ana_reg->port[port_no].port_cfg, - VSC9953_PORT_CFG_LEARN_DROP | - VSC9953_PORT_CFG_LEARN_CPU, - VSC9953_PORT_CFG_LEARN_ENA | - VSC9953_PORT_CFG_LEARN_AUTO); - break; - default: - printf("Unknown learn mode for port %d\n", port_no); - } -} - -/* Get learning configuration for a VSC9953 port */ -static int vsc9953_port_learn_mode_get(int port_no, enum port_learn_mode *mode) -{ - u32 val; - struct vsc9953_analyzer *l2ana_reg; - - /* Administrative down */ - if (!vsc9953_l2sw.port[port_no].enabled) { - printf("Port %d is administrative down\n", port_no); - return -1; - } - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - /* For now we only support HW learning (auto) and no learning */ - val = in_le32(&l2ana_reg->port[port_no].port_cfg); - if ((val & (VSC9953_PORT_CFG_LEARN_ENA | - VSC9953_PORT_CFG_LEARN_AUTO)) == - (VSC9953_PORT_CFG_LEARN_ENA | VSC9953_PORT_CFG_LEARN_AUTO)) - *mode = PORT_LEARN_AUTO; - else - *mode = PORT_LEARN_NONE; - - return 0; -} - -/* wait for FDB to become available */ -static int vsc9953_mac_table_poll_idle(void) -{ - struct vsc9953_analyzer *l2ana_reg; - u32 timeout; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - timeout = 50000; - while (((in_le32(&l2ana_reg->ana_tables.mac_access) & - VSC9953_MAC_CMD_MASK) != - VSC9953_MAC_CMD_IDLE) && --timeout) - udelay(1); - - return timeout ? 0 : -EBUSY; -} - -/* enum describing available commands for the MAC table */ -enum mac_table_cmd { - MAC_TABLE_READ, - MAC_TABLE_LOOKUP, - MAC_TABLE_WRITE, - MAC_TABLE_LEARN, - MAC_TABLE_FORGET, - MAC_TABLE_GET_NEXT, - MAC_TABLE_AGE, -}; - -/* Issues a command to the FDB table */ -static int vsc9953_mac_table_cmd(enum mac_table_cmd cmd) -{ - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - switch (cmd) { - case MAC_TABLE_READ: - clrsetbits_le32(&l2ana_reg->ana_tables.mac_access, - VSC9953_MAC_CMD_MASK | VSC9953_MAC_CMD_VALID, - VSC9953_MAC_CMD_READ); - break; - case MAC_TABLE_LOOKUP: - clrsetbits_le32(&l2ana_reg->ana_tables.mac_access, - VSC9953_MAC_CMD_MASK, VSC9953_MAC_CMD_READ | - VSC9953_MAC_CMD_VALID); - break; - case MAC_TABLE_WRITE: - clrsetbits_le32(&l2ana_reg->ana_tables.mac_access, - VSC9953_MAC_CMD_MASK | - VSC9953_MAC_ENTRYTYPE_MASK, - VSC9953_MAC_CMD_WRITE | - VSC9953_MAC_ENTRYTYPE_LOCKED); - break; - case MAC_TABLE_LEARN: - clrsetbits_le32(&l2ana_reg->ana_tables.mac_access, - VSC9953_MAC_CMD_MASK | - VSC9953_MAC_ENTRYTYPE_MASK, - VSC9953_MAC_CMD_LEARN | - VSC9953_MAC_ENTRYTYPE_LOCKED | - VSC9953_MAC_CMD_VALID); - break; - case MAC_TABLE_FORGET: - clrsetbits_le32(&l2ana_reg->ana_tables.mac_access, - VSC9953_MAC_CMD_MASK | - VSC9953_MAC_ENTRYTYPE_MASK, - VSC9953_MAC_CMD_FORGET); - break; - case MAC_TABLE_GET_NEXT: - clrsetbits_le32(&l2ana_reg->ana_tables.mac_access, - VSC9953_MAC_CMD_MASK | - VSC9953_MAC_ENTRYTYPE_MASK, - VSC9953_MAC_CMD_NEXT); - break; - case MAC_TABLE_AGE: - clrsetbits_le32(&l2ana_reg->ana_tables.mac_access, - VSC9953_MAC_CMD_MASK | - VSC9953_MAC_ENTRYTYPE_MASK, - VSC9953_MAC_CMD_AGE); - break; - default: - printf("Unknown MAC table command\n"); - } - - if (vsc9953_mac_table_poll_idle() < 0) { - debug("MAC table timeout\n"); - return -1; - } - - return 0; -} - -/* show the FDB entries that correspond to a port and a VLAN */ -static void vsc9953_mac_table_show(int port_no, int vid) -{ - int rc[VSC9953_MAX_PORTS]; - enum port_learn_mode mode[VSC9953_MAX_PORTS]; - int i; - u32 val; - u32 vlan; - u32 mach; - u32 macl; - u32 dest_indx; - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - /* disable auto learning */ - if (port_no == ETHSW_CMD_PORT_ALL) { - for (i = 0; i < VSC9953_MAX_PORTS; i++) { - rc[i] = vsc9953_port_learn_mode_get(i, &mode[i]); - if (!rc[i] && mode[i] != PORT_LEARN_NONE) - vsc9953_port_learn_mode_set(i, PORT_LEARN_NONE); - } - } else { - rc[port_no] = vsc9953_port_learn_mode_get(port_no, - &mode[port_no]); - if (!rc[port_no] && mode[port_no] != PORT_LEARN_NONE) - vsc9953_port_learn_mode_set(port_no, PORT_LEARN_NONE); - } - - /* write port and vid to get selected FDB entries */ - val = in_le32(&l2ana_reg->ana.anag_efil); - if (port_no != ETHSW_CMD_PORT_ALL) { - val = bitfield_replace_by_mask(val, VSC9953_AGE_PORT_MASK, - port_no) | VSC9953_AGE_PORT_EN; - } - if (vid != ETHSW_CMD_VLAN_ALL) { - val = bitfield_replace_by_mask(val, VSC9953_AGE_VID_MASK, - vid) | VSC9953_AGE_VID_EN; - } - out_le32(&l2ana_reg->ana.anag_efil, val); - - /* set MAC and VLAN to 0 to look from beginning */ - clrbits_le32(&l2ana_reg->ana_tables.mach_data, - VSC9953_MAC_VID_MASK | VSC9953_MAC_MACH_MASK); - out_le32(&l2ana_reg->ana_tables.macl_data, 0); - - /* get entries */ - printf("%10s %17s %5s %4s\n", "EntryType", "MAC", "PORT", "VID"); - do { - if (vsc9953_mac_table_cmd(MAC_TABLE_GET_NEXT) < 0) { - debug("GET NEXT MAC table command failed\n"); - break; - } - - val = in_le32(&l2ana_reg->ana_tables.mac_access); - - /* get out when an invalid entry is found */ - if (!(val & VSC9953_MAC_CMD_VALID)) - break; - - switch (val & VSC9953_MAC_ENTRYTYPE_MASK) { - case VSC9953_MAC_ENTRYTYPE_NORMAL: - printf("%10s ", "Dynamic"); - break; - case VSC9953_MAC_ENTRYTYPE_LOCKED: - printf("%10s ", "Static"); - break; - case VSC9953_MAC_ENTRYTYPE_IPV4MCAST: - printf("%10s ", "IPv4 Mcast"); - break; - case VSC9953_MAC_ENTRYTYPE_IPV6MCAST: - printf("%10s ", "IPv6 Mcast"); - break; - default: - printf("%10s ", "Unknown"); - } - - dest_indx = bitfield_extract_by_mask(val, - VSC9953_MAC_DESTIDX_MASK); - - val = in_le32(&l2ana_reg->ana_tables.mach_data); - vlan = bitfield_extract_by_mask(val, VSC9953_MAC_VID_MASK); - mach = bitfield_extract_by_mask(val, VSC9953_MAC_MACH_MASK); - macl = in_le32(&l2ana_reg->ana_tables.macl_data); - - printf("%02x:%02x:%02x:%02x:%02x:%02x ", (mach >> 8) & 0xff, - mach & 0xff, (macl >> 24) & 0xff, (macl >> 16) & 0xff, - (macl >> 8) & 0xff, macl & 0xff); - printf("%5d ", dest_indx); - printf("%4d\n", vlan); - } while (1); - - /* set learning mode to previous value */ - if (port_no == ETHSW_CMD_PORT_ALL) { - for (i = 0; i < VSC9953_MAX_PORTS; i++) { - if (!rc[i] && mode[i] != PORT_LEARN_NONE) - vsc9953_port_learn_mode_set(i, mode[i]); - } - } else { - /* If administrative down, skip */ - if (!rc[port_no] && mode[port_no] != PORT_LEARN_NONE) - vsc9953_port_learn_mode_set(port_no, mode[port_no]); - } - - /* reset FDB port and VLAN FDB selection */ - clrbits_le32(&l2ana_reg->ana.anag_efil, VSC9953_AGE_PORT_EN | - VSC9953_AGE_PORT_MASK | VSC9953_AGE_VID_EN | - VSC9953_AGE_VID_MASK); -} - -/* Add a static FDB entry */ -static int vsc9953_mac_table_add(u8 port_no, uchar mac[6], int vid) -{ - u32 val; - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - val = in_le32(&l2ana_reg->ana_tables.mach_data); - val = bitfield_replace_by_mask(val, VSC9953_MACHDATA_VID_MASK, vid) | - (mac[0] << 8) | (mac[1] << 0); - out_le32(&l2ana_reg->ana_tables.mach_data, val); - - out_le32(&l2ana_reg->ana_tables.macl_data, - (mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | - (mac[5] << 0)); - - /* set on which port is the MAC address added */ - val = in_le32(&l2ana_reg->ana_tables.mac_access); - val = bitfield_replace_by_mask(val, VSC9953_MAC_DESTIDX_MASK, port_no); - out_le32(&l2ana_reg->ana_tables.mac_access, val); - - if (vsc9953_mac_table_cmd(MAC_TABLE_LEARN) < 0) - return -1; - - /* check if the MAC address was indeed added */ - val = in_le32(&l2ana_reg->ana_tables.mach_data); - val = bitfield_replace_by_mask(val, VSC9953_MACHDATA_VID_MASK, vid) | - (mac[0] << 8) | (mac[1] << 0); - out_le32(&l2ana_reg->ana_tables.mach_data, val); - - out_le32(&l2ana_reg->ana_tables.macl_data, - (mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | - (mac[5] << 0)); - - if (vsc9953_mac_table_cmd(MAC_TABLE_READ) < 0) - return -1; - - val = in_le32(&l2ana_reg->ana_tables.mac_access); - - if ((port_no != bitfield_extract_by_mask(val, - VSC9953_MAC_DESTIDX_MASK))) { - printf("Failed to add MAC address\n"); - return -1; - } - return 0; -} - -/* Delete a FDB entry */ -static int vsc9953_mac_table_del(uchar mac[6], u16 vid) -{ - u32 val; - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - /* check first if MAC entry is present */ - val = in_le32(&l2ana_reg->ana_tables.mach_data); - val = bitfield_replace_by_mask(val, VSC9953_MACHDATA_VID_MASK, vid) | - (mac[0] << 8) | (mac[1] << 0); - out_le32(&l2ana_reg->ana_tables.mach_data, val); - - out_le32(&l2ana_reg->ana_tables.macl_data, - (mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | - (mac[5] << 0)); - - if (vsc9953_mac_table_cmd(MAC_TABLE_LOOKUP) < 0) { - debug("Lookup in the MAC table failed\n"); - return -1; - } - - if (!(in_le32(&l2ana_reg->ana_tables.mac_access) & - VSC9953_MAC_CMD_VALID)) { - printf("The MAC address: %02x:%02x:%02x:%02x:%02x:%02x ", - mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); - printf("VLAN: %d does not exist.\n", vid); - return -1; - } - - /* FDB entry found, proceed to delete */ - val = in_le32(&l2ana_reg->ana_tables.mach_data); - val = bitfield_replace_by_mask(val, VSC9953_MACHDATA_VID_MASK, vid) | - (mac[0] << 8) | (mac[1] << 0); - out_le32(&l2ana_reg->ana_tables.mach_data, val); - - out_le32(&l2ana_reg->ana_tables.macl_data, (mac[2] << 24) | - (mac[3] << 16) | (mac[4] << 8) | (mac[5] << 0)); - - if (vsc9953_mac_table_cmd(MAC_TABLE_FORGET) < 0) - return -1; - - /* check if the MAC entry is still in FDB */ - val = in_le32(&l2ana_reg->ana_tables.mach_data); - val = bitfield_replace_by_mask(val, VSC9953_MACHDATA_VID_MASK, vid) | - (mac[0] << 8) | (mac[1] << 0); - out_le32(&l2ana_reg->ana_tables.mach_data, val); - - out_le32(&l2ana_reg->ana_tables.macl_data, (mac[2] << 24) | - (mac[3] << 16) | (mac[4] << 8) | (mac[5] << 0)); - - if (vsc9953_mac_table_cmd(MAC_TABLE_LOOKUP) < 0) { - debug("Lookup in the MAC table failed\n"); - return -1; - } - if (in_le32(&l2ana_reg->ana_tables.mac_access) & - VSC9953_MAC_CMD_VALID) { - printf("Failed to delete MAC address\n"); - return -1; - } - - return 0; -} - -/* age the unlocked entries in FDB */ -static void vsc9953_mac_table_age(int port_no, int vid) -{ - int rc[VSC9953_MAX_PORTS]; - enum port_learn_mode mode[VSC9953_MAX_PORTS]; - u32 val; - int i; - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - /* set port and VID for selective aging */ - val = in_le32(&l2ana_reg->ana.anag_efil); - if (port_no != ETHSW_CMD_PORT_ALL) { - /* disable auto learning */ - rc[port_no] = vsc9953_port_learn_mode_get(port_no, - &mode[port_no]); - if (!rc[port_no] && mode[port_no] != PORT_LEARN_NONE) - vsc9953_port_learn_mode_set(port_no, PORT_LEARN_NONE); - - val = bitfield_replace_by_mask(val, VSC9953_AGE_PORT_MASK, - port_no) | VSC9953_AGE_PORT_EN; - } else { - /* disable auto learning on all ports */ - for (i = 0; i < VSC9953_MAX_PORTS; i++) { - rc[i] = vsc9953_port_learn_mode_get(i, &mode[i]); - if (!rc[i] && mode[i] != PORT_LEARN_NONE) - vsc9953_port_learn_mode_set(i, PORT_LEARN_NONE); - } - } - - if (vid != ETHSW_CMD_VLAN_ALL) { - val = bitfield_replace_by_mask(val, VSC9953_AGE_VID_MASK, vid) | - VSC9953_AGE_VID_EN; - } - out_le32(&l2ana_reg->ana.anag_efil, val); - - /* age the dynamic FDB entries */ - vsc9953_mac_table_cmd(MAC_TABLE_AGE); - - /* clear previously set port and VID */ - clrbits_le32(&l2ana_reg->ana.anag_efil, VSC9953_AGE_PORT_EN | - VSC9953_AGE_PORT_MASK | VSC9953_AGE_VID_EN | - VSC9953_AGE_VID_MASK); - - if (port_no != ETHSW_CMD_PORT_ALL) { - if (!rc[port_no] && mode[port_no] != PORT_LEARN_NONE) - vsc9953_port_learn_mode_set(port_no, mode[port_no]); - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) { - if (!rc[i] && mode[i] != PORT_LEARN_NONE) - vsc9953_port_learn_mode_set(i, mode[i]); - } - } -} - -/* Delete all the dynamic FDB entries */ -static void vsc9953_mac_table_flush(int port, int vid) -{ - vsc9953_mac_table_age(port, vid); - vsc9953_mac_table_age(port, vid); -} - -enum egress_vlan_tag { - EGR_TAG_CLASS = 0, - EGR_TAG_PVID, -}; - -/* Set egress tag mode for a VSC9953 port */ -static void vsc9953_port_vlan_egress_tag_set(int port_no, - enum egress_vlan_tag mode) -{ - struct vsc9953_rew_reg *l2rew_reg; - - l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET + - VSC9953_REW_OFFSET); - - switch (mode) { - case EGR_TAG_CLASS: - clrbits_le32(&l2rew_reg->port[port_no].port_tag_cfg, - VSC9953_TAG_VID_PVID); - break; - case EGR_TAG_PVID: - setbits_le32(&l2rew_reg->port[port_no].port_tag_cfg, - VSC9953_TAG_VID_PVID); - break; - default: - printf("Unknown egress VLAN tag mode for port %d\n", port_no); - } -} - -/* Get egress tag mode for a VSC9953 port */ -static void vsc9953_port_vlan_egress_tag_get(int port_no, - enum egress_vlan_tag *mode) -{ - u32 val; - struct vsc9953_rew_reg *l2rew_reg; - - l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET + - VSC9953_REW_OFFSET); - - val = in_le32(&l2rew_reg->port[port_no].port_tag_cfg); - if (val & VSC9953_TAG_VID_PVID) - *mode = EGR_TAG_PVID; - else - *mode = EGR_TAG_CLASS; -} - -/* VSC9953 VLAN learning modes */ -enum vlan_learning_mode { - SHARED_VLAN_LEARNING, - PRIVATE_VLAN_LEARNING, -}; - -/* Set VLAN learning mode for VSC9953 */ -static void vsc9953_vlan_learning_set(enum vlan_learning_mode lrn_mode) -{ - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - switch (lrn_mode) { - case SHARED_VLAN_LEARNING: - setbits_le32(&l2ana_reg->ana.agen_ctrl, VSC9953_FID_MASK_ALL); - break; - case PRIVATE_VLAN_LEARNING: - clrbits_le32(&l2ana_reg->ana.agen_ctrl, VSC9953_FID_MASK_ALL); - break; - default: - printf("Unknown VLAN learn mode\n"); - } -} - -/* Get VLAN learning mode for VSC9953 */ -static int vsc9953_vlan_learning_get(enum vlan_learning_mode *lrn_mode) -{ - u32 val; - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - val = in_le32(&l2ana_reg->ana.agen_ctrl); - - if (!(val & VSC9953_FID_MASK_ALL)) { - *lrn_mode = PRIVATE_VLAN_LEARNING; - } else if ((val & VSC9953_FID_MASK_ALL) == VSC9953_FID_MASK_ALL) { - *lrn_mode = SHARED_VLAN_LEARNING; - } else { - printf("Unknown VLAN learning mode\n"); - return -EINVAL; - } - - return 0; -} - -/* Enable/disable VLAN ingress filtering on a VSC9953 port */ -static void vsc9953_port_ingress_filtering_set(int port_no, int enabled) -{ - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - if (enabled) - setbits_le32(&l2ana_reg->ana.vlan_mask, 1 << port_no); - else - clrbits_le32(&l2ana_reg->ana.vlan_mask, 1 << port_no); -} - -/* Return VLAN ingress filtering on a VSC9953 port */ -static int vsc9953_port_ingress_filtering_get(int port_no) -{ - u32 val; - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - val = in_le32(&l2ana_reg->ana.vlan_mask); - return !!(val & (1 << port_no)); -} - -/* Get the aggregation group of a port */ -static int vsc9953_port_aggr_grp_get(int port_no, int *aggr_grp) -{ - u32 val; - struct vsc9953_analyzer *l2ana_reg; - - if (!VSC9953_PORT_CHECK(port_no)) - return -EINVAL; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - val = in_le32(&l2ana_reg->port[port_no].port_cfg); - *aggr_grp = bitfield_extract_by_mask(val, - VSC9953_PORT_CFG_PORTID_MASK); - - return 0; -} - -static void vsc9953_aggr_grp_members_get(int aggr_grp, - u8 aggr_membr[VSC9953_MAX_PORTS]) -{ - int port_no; - int aggr_membr_grp; - - for (port_no = 0; port_no < VSC9953_MAX_PORTS; port_no++) { - aggr_membr[port_no] = 0; - - if (vsc9953_port_aggr_grp_get(port_no, &aggr_membr_grp)) - continue; - - if (aggr_grp == aggr_membr_grp) - aggr_membr[port_no] = 1; - } -} - -static void vsc9953_update_dest_members_masks(int port_no, u32 membr_bitfld_old, - u32 membr_bitfld_new) -{ - int i; - u32 pgid; - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - /* - * NOTE: Only the unicast destination masks are updated, since - * we do not support for now Layer-2 multicast entries - */ - for (i = 0; i < VSC9953_MAX_PORTS; i++) { - if (i == port_no) { - clrsetbits_le32(&l2ana_reg->port_id_tbl.port_grp_id[i], - VSC9953_PGID_PORT_MASK, - membr_bitfld_new); - continue; - } - - pgid = in_le32(&l2ana_reg->port_id_tbl.port_grp_id[i]); - if ((u32)(1 << i) & membr_bitfld_old & VSC9953_PGID_PORT_MASK) - pgid &= ~((u32)(1 << port_no)); - if ((u32)(1 << i) & membr_bitfld_new & VSC9953_PGID_PORT_MASK) - pgid |= ((u32)(1 << port_no)); - - out_le32(&l2ana_reg->port_id_tbl.port_grp_id[i], pgid); - } -} - -static void vsc9953_update_source_members_masks(int port_no, - u32 membr_bitfld_old, - u32 membr_bitfld_new) -{ - int i; - int index; - u32 pgid; - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - for (i = 0; i < VSC9953_MAX_PORTS + 1; i++) { - index = PGID_SRC_START + i; - pgid = in_le32(&l2ana_reg->port_id_tbl.port_grp_id[index]); - if (i == port_no) { - pgid = (pgid | VSC9953_PGID_PORT_MASK) & - ~membr_bitfld_new; - out_le32(&l2ana_reg->port_id_tbl.port_grp_id[index], - pgid); - continue; - } - - if ((u32)(1 << i) & membr_bitfld_old & VSC9953_PGID_PORT_MASK) - pgid |= (u32)(1 << port_no); - - if ((u32)(1 << i) & membr_bitfld_new & VSC9953_PGID_PORT_MASK) - pgid &= ~(u32)(1 << port_no); - out_le32(&l2ana_reg->port_id_tbl.port_grp_id[index], pgid); - } -} - -static u32 vsc9953_aggr_mask_get_next(u32 aggr_mask, u32 member_bitfield) -{ - if (!member_bitfield) - return 0; - - if (!(aggr_mask & VSC9953_PGID_PORT_MASK)) - aggr_mask = 1; - else - aggr_mask <<= 1; - - while (!(aggr_mask & member_bitfield)) { - aggr_mask <<= 1; - if (!(aggr_mask & VSC9953_PGID_PORT_MASK)) - aggr_mask = 1; - } - - return aggr_mask; -} - -static void vsc9953_update_aggr_members_masks(int port_no, u32 membr_bitfld_old, - u32 membr_bitfld_new) -{ - int i; - u32 pgid; - u32 aggr_mask_old = 0; - u32 aggr_mask_new = 0; - struct vsc9953_analyzer *l2ana_reg; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - /* Update all the PGID aggregation masks */ - for (i = PGID_AGGR_START; i < PGID_SRC_START; i++) { - pgid = in_le32(&l2ana_reg->port_id_tbl.port_grp_id[i]); - - aggr_mask_old = vsc9953_aggr_mask_get_next(aggr_mask_old, - membr_bitfld_old); - pgid = (pgid & ~membr_bitfld_old) | aggr_mask_old; - - aggr_mask_new = vsc9953_aggr_mask_get_next(aggr_mask_new, - membr_bitfld_new); - pgid = (pgid & ~membr_bitfld_new) | aggr_mask_new; - - out_le32(&l2ana_reg->port_id_tbl.port_grp_id[i], pgid); - } -} - -static u32 vsc9953_aggr_membr_bitfield_get(u8 member[VSC9953_MAX_PORTS]) -{ - int i; - u32 member_bitfield = 0; - - for (i = 0; i < VSC9953_MAX_PORTS; i++) { - if (member[i]) - member_bitfield |= 1 << i; - } - member_bitfield &= VSC9953_PGID_PORT_MASK; - - return member_bitfield; -} - -static void vsc9953_update_members_masks(int port_no, - u8 member_old[VSC9953_MAX_PORTS], - u8 member_new[VSC9953_MAX_PORTS]) -{ - u32 membr_bitfld_old = vsc9953_aggr_membr_bitfield_get(member_old); - u32 membr_bitfld_new = vsc9953_aggr_membr_bitfield_get(member_new); - - vsc9953_update_dest_members_masks(port_no, membr_bitfld_old, - membr_bitfld_new); - vsc9953_update_source_members_masks(port_no, membr_bitfld_old, - membr_bitfld_new); - vsc9953_update_aggr_members_masks(port_no, membr_bitfld_old, - membr_bitfld_new); -} - -/* Set the aggregation group of a port */ -static int vsc9953_port_aggr_grp_set(int port_no, int aggr_grp) -{ - u8 aggr_membr_old[VSC9953_MAX_PORTS]; - u8 aggr_membr_new[VSC9953_MAX_PORTS]; - int rc; - int aggr_grp_old; - u32 val; - struct vsc9953_analyzer *l2ana_reg; - - if (!VSC9953_PORT_CHECK(port_no) || !VSC9953_PORT_CHECK(aggr_grp)) - return -EINVAL; - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - rc = vsc9953_port_aggr_grp_get(port_no, &aggr_grp_old); - if (rc) - return rc; - - /* get all the members of the old aggregation group */ - vsc9953_aggr_grp_members_get(aggr_grp_old, aggr_membr_old); - - /* get all the members of the same aggregation group */ - vsc9953_aggr_grp_members_get(aggr_grp, aggr_membr_new); - - /* add current port as member to the new aggregation group */ - aggr_membr_old[port_no] = 0; - aggr_membr_new[port_no] = 1; - - /* update masks */ - vsc9953_update_members_masks(port_no, aggr_membr_old, aggr_membr_new); - - /* Change logical port number */ - val = in_le32(&l2ana_reg->port[port_no].port_cfg); - val = bitfield_replace_by_mask(val, - VSC9953_PORT_CFG_PORTID_MASK, aggr_grp); - out_le32(&l2ana_reg->port[port_no].port_cfg, val); - - return 0; -} - -static int vsc9953_port_status_key_func(struct ethsw_command_def *parsed_cmd) -{ - int i; - u8 enabled; - - /* Last keyword should tell us if we should enable/disable the port */ - if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] == - ethsw_id_enable) - enabled = 1; - else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] == - ethsw_id_disable) - enabled = 0; - else - return CMD_RET_USAGE; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - vsc9953_port_status_set(parsed_cmd->port, enabled); - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_port_status_set(i, enabled); - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_port_config_key_func(struct ethsw_command_def *parsed_cmd) -{ - int i; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - vsc9953_phy_autoneg(parsed_cmd->port); - printf("%8s %8s %8s %8s %8s\n", - "Port", "Status", "Link", "Speed", - "Duplex"); - vsc9953_port_config_show(parsed_cmd->port); - - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_phy_autoneg(i); - printf("%8s %8s %8s %8s %8s\n", - "Port", "Status", "Link", "Speed", "Duplex"); - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_port_config_show(i); - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_port_stats_key_func(struct ethsw_command_def *parsed_cmd) -{ - int i; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - vsc9953_port_statistics_show(parsed_cmd->port); - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_port_statistics_show(i); - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_port_stats_clear_key_func(struct ethsw_command_def - *parsed_cmd) -{ - int i; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - vsc9953_port_statistics_clear(parsed_cmd->port); - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_port_statistics_clear(i); - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_learn_show_key_func(struct ethsw_command_def *parsed_cmd) -{ - int i; - enum port_learn_mode mode; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - if (vsc9953_port_learn_mode_get(parsed_cmd->port, &mode)) - return CMD_RET_FAILURE; - printf("%7s %11s\n", "Port", "Learn mode"); - switch (mode) { - case PORT_LEARN_NONE: - printf("%7d %11s\n", parsed_cmd->port, "disable"); - break; - case PORT_LEARN_AUTO: - printf("%7d %11s\n", parsed_cmd->port, "auto"); - break; - default: - printf("%7d %11s\n", parsed_cmd->port, "-"); - } - } else { - printf("%7s %11s\n", "Port", "Learn mode"); - for (i = 0; i < VSC9953_MAX_PORTS; i++) { - if (vsc9953_port_learn_mode_get(i, &mode)) - continue; - switch (mode) { - case PORT_LEARN_NONE: - printf("%7d %11s\n", i, "disable"); - break; - case PORT_LEARN_AUTO: - printf("%7d %11s\n", i, "auto"); - break; - default: - printf("%7d %11s\n", i, "-"); - } - } - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_learn_set_key_func(struct ethsw_command_def *parsed_cmd) -{ - int i; - enum port_learn_mode mode; - - /* Last keyword should tell us the learn mode */ - if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] == - ethsw_id_auto) - mode = PORT_LEARN_AUTO; - else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] == - ethsw_id_disable) - mode = PORT_LEARN_NONE; - else - return CMD_RET_USAGE; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - vsc9953_port_learn_mode_set(parsed_cmd->port, mode); - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_port_learn_mode_set(i, mode); - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_fdb_show_key_func(struct ethsw_command_def *parsed_cmd) -{ - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL && - !VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - - if (parsed_cmd->vid != ETHSW_CMD_VLAN_ALL && - !VSC9953_VLAN_CHECK(parsed_cmd->vid)) { - printf("Invalid VID number: %d\n", parsed_cmd->vid); - return CMD_RET_FAILURE; - } - - vsc9953_mac_table_show(parsed_cmd->port, parsed_cmd->vid); - - return CMD_RET_SUCCESS; -} - -static int vsc9953_fdb_flush_key_func(struct ethsw_command_def *parsed_cmd) -{ - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL && - !VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - - if (parsed_cmd->vid != ETHSW_CMD_VLAN_ALL && - !VSC9953_VLAN_CHECK(parsed_cmd->vid)) { - printf("Invalid VID number: %d\n", parsed_cmd->vid); - return CMD_RET_FAILURE; - } - - vsc9953_mac_table_flush(parsed_cmd->port, parsed_cmd->vid); - - return CMD_RET_SUCCESS; -} - -static int vsc9953_fdb_entry_add_key_func(struct ethsw_command_def *parsed_cmd) -{ - int vid; - - /* a port number must be present */ - if (parsed_cmd->port == ETHSW_CMD_PORT_ALL) { - printf("Please specify a port\n"); - return CMD_RET_FAILURE; - } - - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - - /* Use VLAN 1 if VID is not set */ - vid = (parsed_cmd->vid == ETHSW_CMD_VLAN_ALL ? 1 : parsed_cmd->vid); - - if (!VSC9953_VLAN_CHECK(vid)) { - printf("Invalid VID number: %d\n", vid); - return CMD_RET_FAILURE; - } - - if (vsc9953_mac_table_add(parsed_cmd->port, parsed_cmd->ethaddr, vid)) - return CMD_RET_FAILURE; - - return CMD_RET_SUCCESS; -} - -static int vsc9953_fdb_entry_del_key_func(struct ethsw_command_def *parsed_cmd) -{ - int vid; - - /* Use VLAN 1 if VID is not set */ - vid = (parsed_cmd->vid == ETHSW_CMD_VLAN_ALL ? 1 : parsed_cmd->vid); - - if (!VSC9953_VLAN_CHECK(vid)) { - printf("Invalid VID number: %d\n", vid); - return CMD_RET_FAILURE; - } - - if (vsc9953_mac_table_del(parsed_cmd->ethaddr, vid)) - return CMD_RET_FAILURE; - - return CMD_RET_SUCCESS; -} - -static int vsc9953_pvid_show_key_func(struct ethsw_command_def *parsed_cmd) -{ - int i; - int pvid; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - - if (vsc9953_port_vlan_pvid_get(parsed_cmd->port, &pvid)) - return CMD_RET_FAILURE; - printf("%7s %7s\n", "Port", "PVID"); - printf("%7d %7d\n", parsed_cmd->port, pvid); - } else { - printf("%7s %7s\n", "Port", "PVID"); - for (i = 0; i < VSC9953_MAX_PORTS; i++) { - if (vsc9953_port_vlan_pvid_get(i, &pvid)) - continue; - printf("%7d %7d\n", i, pvid); - } - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_pvid_set_key_func(struct ethsw_command_def *parsed_cmd) -{ - /* PVID number should be set in parsed_cmd->vid */ - if (parsed_cmd->vid == ETHSW_CMD_VLAN_ALL) { - printf("Please set a pvid value\n"); - return CMD_RET_FAILURE; - } - - if (!VSC9953_VLAN_CHECK(parsed_cmd->vid)) { - printf("Invalid VID number: %d\n", parsed_cmd->vid); - return CMD_RET_FAILURE; - } - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - vsc9953_port_vlan_pvid_set(parsed_cmd->port, parsed_cmd->vid); - } else { - vsc9953_port_all_vlan_pvid_set(parsed_cmd->vid); - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_vlan_show_key_func(struct ethsw_command_def *parsed_cmd) -{ - int i; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - vsc9953_vlan_membership_show(parsed_cmd->port); - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_vlan_membership_show(i); - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_vlan_set_key_func(struct ethsw_command_def *parsed_cmd) -{ - int i; - int add; - - /* VLAN should be set in parsed_cmd->vid */ - if (parsed_cmd->vid == ETHSW_CMD_VLAN_ALL) { - printf("Please set a vlan value\n"); - return CMD_RET_FAILURE; - } - - if (!VSC9953_VLAN_CHECK(parsed_cmd->vid)) { - printf("Invalid VID number: %d\n", parsed_cmd->vid); - return CMD_RET_FAILURE; - } - - /* keywords add/delete should be the last but one in array */ - if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 2] == - ethsw_id_add) - add = 1; - else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 2] == - ethsw_id_del) - add = 0; - else - return CMD_RET_USAGE; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - vsc9953_vlan_table_membership_set(parsed_cmd->vid, - parsed_cmd->port, add); - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_vlan_table_membership_set(parsed_cmd->vid, i, - add); - } - - return CMD_RET_SUCCESS; -} -static int vsc9953_port_untag_show_key_func( - struct ethsw_command_def *parsed_cmd) -{ - int i; - - printf("%7s\t%17s\n", "Port", "Untag"); - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - vsc9953_port_vlan_egr_untag_show(parsed_cmd->port); - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_port_vlan_egr_untag_show(i); - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_port_untag_set_key_func(struct ethsw_command_def *parsed_cmd) -{ - int i; - enum egress_untag_mode mode; - - /* keywords for the untagged mode are the last in the array */ - if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] == - ethsw_id_all) - mode = EGRESS_UNTAG_ALL; - else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] == - ethsw_id_none) - mode = EGRESS_UNTAG_NONE; - else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] == - ethsw_id_pvid) - mode = EGRESS_UNTAG_PVID_AND_ZERO; - else - return CMD_RET_USAGE; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - vsc9953_port_vlan_egr_untag_set(parsed_cmd->port, mode); - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_port_vlan_egr_untag_set(i, mode); - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_egr_vlan_tag_show_key_func( - struct ethsw_command_def *parsed_cmd) -{ - int i; - enum egress_vlan_tag mode; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - vsc9953_port_vlan_egress_tag_get(parsed_cmd->port, &mode); - printf("%7s\t%12s\n", "Port", "Egress VID"); - printf("%7d\t", parsed_cmd->port); - switch (mode) { - case EGR_TAG_CLASS: - printf("%12s\n", "classified"); - break; - case EGR_TAG_PVID: - printf("%12s\n", "pvid"); - break; - default: - printf("%12s\n", "-"); - } - } else { - printf("%7s\t%12s\n", "Port", "Egress VID"); - for (i = 0; i < VSC9953_MAX_PORTS; i++) { - vsc9953_port_vlan_egress_tag_get(i, &mode); - switch (mode) { - case EGR_TAG_CLASS: - printf("%7d\t%12s\n", i, "classified"); - break; - case EGR_TAG_PVID: - printf("%7d\t%12s\n", i, "pvid"); - break; - default: - printf("%7d\t%12s\n", i, "-"); - } - } - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_egr_vlan_tag_set_key_func( - struct ethsw_command_def *parsed_cmd) -{ - int i; - enum egress_vlan_tag mode; - - /* keywords for the egress vlan tag mode are the last in the array */ - if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] == - ethsw_id_pvid) - mode = EGR_TAG_PVID; - else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] == - ethsw_id_classified) - mode = EGR_TAG_CLASS; - else - return CMD_RET_USAGE; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - vsc9953_port_vlan_egress_tag_set(parsed_cmd->port, mode); - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_port_vlan_egress_tag_set(i, mode); - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_vlan_learn_show_key_func( - struct ethsw_command_def *parsed_cmd) -{ - int rc; - enum vlan_learning_mode mode; - - rc = vsc9953_vlan_learning_get(&mode); - if (rc) - return CMD_RET_FAILURE; - - switch (mode) { - case SHARED_VLAN_LEARNING: - printf("VLAN learning mode: shared\n"); - break; - case PRIVATE_VLAN_LEARNING: - printf("VLAN learning mode: private\n"); - break; - default: - printf("Unknown VLAN learning mode\n"); - rc = CMD_RET_FAILURE; - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_vlan_learn_set_key_func(struct ethsw_command_def *parsed_cmd) -{ - enum vlan_learning_mode mode; - - /* keywords for shared/private are the last in the array */ - if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] == - ethsw_id_shared) - mode = SHARED_VLAN_LEARNING; - else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] == - ethsw_id_private) - mode = PRIVATE_VLAN_LEARNING; - else - return CMD_RET_USAGE; - - vsc9953_vlan_learning_set(mode); - - return CMD_RET_SUCCESS; -} - -static int vsc9953_ingr_fltr_show_key_func(struct ethsw_command_def *parsed_cmd) -{ - int i; - int enabled; - - printf("%7s\t%18s\n", "Port", "Ingress filtering"); - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - enabled = vsc9953_port_ingress_filtering_get(parsed_cmd->port); - printf("%7d\t%18s\n", parsed_cmd->port, enabled ? "enable" : - "disable"); - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) { - enabled = vsc9953_port_ingress_filtering_get(i); - printf("%7d\t%18s\n", parsed_cmd->port, enabled ? - "enable" : - "disable"); - } - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_ingr_fltr_set_key_func(struct ethsw_command_def *parsed_cmd) -{ - int i; - int enable; - - /* keywords for enabling/disabling ingress filtering - * are the last in the array - */ - if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] == - ethsw_id_enable) - enable = 1; - else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] == - ethsw_id_disable) - enable = 0; - else - return CMD_RET_USAGE; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - vsc9953_port_ingress_filtering_set(parsed_cmd->port, enable); - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) - vsc9953_port_ingress_filtering_set(i, enable); - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_port_aggr_show_key_func(struct ethsw_command_def *parsed_cmd) -{ - int i; - int aggr_grp; - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - - if (vsc9953_port_aggr_grp_get(parsed_cmd->port, &aggr_grp)) - return CMD_RET_FAILURE; - printf("%7s %10s\n", "Port", "Aggr grp"); - printf("%7d %10d\n", parsed_cmd->port, aggr_grp); - } else { - printf("%7s %10s\n", "Port", "Aggr grp"); - for (i = 0; i < VSC9953_MAX_PORTS; i++) { - if (vsc9953_port_aggr_grp_get(i, &aggr_grp)) - continue; - printf("%7d %10d\n", i, aggr_grp); - } - } - - return CMD_RET_SUCCESS; -} - -static int vsc9953_port_aggr_set_key_func(struct ethsw_command_def *parsed_cmd) -{ - int i; - - /* Aggregation group number should be set in parsed_cmd->aggr_grp */ - if (parsed_cmd->aggr_grp == ETHSW_CMD_AGGR_GRP_NONE) { - printf("Please set an aggregation group value\n"); - return CMD_RET_FAILURE; - } - - if (!VSC9953_PORT_CHECK(parsed_cmd->aggr_grp)) { - printf("Invalid aggregation group number: %d\n", - parsed_cmd->aggr_grp); - return CMD_RET_FAILURE; - } - - if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) { - if (!VSC9953_PORT_CHECK(parsed_cmd->port)) { - printf("Invalid port number: %d\n", parsed_cmd->port); - return CMD_RET_FAILURE; - } - if (vsc9953_port_aggr_grp_set(parsed_cmd->port, - parsed_cmd->aggr_grp)) { - printf("Port %d: failed to set aggr group %d\n", - parsed_cmd->port, parsed_cmd->aggr_grp); - } - } else { - for (i = 0; i < VSC9953_MAX_PORTS; i++) { - if (vsc9953_port_aggr_grp_set(i, - parsed_cmd->aggr_grp)) { - printf("Port %d: failed to set aggr group %d\n", - i, parsed_cmd->aggr_grp); - } - } - } - - return CMD_RET_SUCCESS; -} - -static struct ethsw_command_func vsc9953_cmd_func = { - .ethsw_name = "L2 Switch VSC9953", - .port_enable = &vsc9953_port_status_key_func, - .port_disable = &vsc9953_port_status_key_func, - .port_show = &vsc9953_port_config_key_func, - .port_stats = &vsc9953_port_stats_key_func, - .port_stats_clear = &vsc9953_port_stats_clear_key_func, - .port_learn = &vsc9953_learn_set_key_func, - .port_learn_show = &vsc9953_learn_show_key_func, - .fdb_show = &vsc9953_fdb_show_key_func, - .fdb_flush = &vsc9953_fdb_flush_key_func, - .fdb_entry_add = &vsc9953_fdb_entry_add_key_func, - .fdb_entry_del = &vsc9953_fdb_entry_del_key_func, - .pvid_show = &vsc9953_pvid_show_key_func, - .pvid_set = &vsc9953_pvid_set_key_func, - .vlan_show = &vsc9953_vlan_show_key_func, - .vlan_set = &vsc9953_vlan_set_key_func, - .port_untag_show = &vsc9953_port_untag_show_key_func, - .port_untag_set = &vsc9953_port_untag_set_key_func, - .port_egr_vlan_show = &vsc9953_egr_vlan_tag_show_key_func, - .port_egr_vlan_set = &vsc9953_egr_vlan_tag_set_key_func, - .vlan_learn_show = &vsc9953_vlan_learn_show_key_func, - .vlan_learn_set = &vsc9953_vlan_learn_set_key_func, - .port_ingr_filt_show = &vsc9953_ingr_fltr_show_key_func, - .port_ingr_filt_set = &vsc9953_ingr_fltr_set_key_func, - .port_aggr_show = &vsc9953_port_aggr_show_key_func, - .port_aggr_set = &vsc9953_port_aggr_set_key_func, -}; - -#endif /* CONFIG_CMD_ETHSW */ - -/***************************************************************************** -At startup, the default configuration would be: - - HW learning enabled on all ports; (HW default) - - All ports are in VLAN 1; - - All ports are VLAN aware; - - All ports have POP_COUNT 1; - - All ports have PVID 1; - - All ports have TPID 0x8100; (HW default) - - All ports tag frames classified to all VLANs that are not PVID; -*****************************************************************************/ -void vsc9953_default_configuration(void) -{ - int i; - - if (vsc9953_autoage_time_set(VSC9953_DEFAULT_AGE_TIME)) - debug("VSC9953: failed to set AGE time to %d\n", - VSC9953_DEFAULT_AGE_TIME); - - for (i = 0; i < VSC9953_MAX_VLAN; i++) - vsc9953_vlan_table_membership_all_set(i, 0); - vsc9953_port_all_vlan_aware_set(1); - vsc9953_port_all_vlan_pvid_set(1); - vsc9953_port_all_vlan_poncnt_set(1); - vsc9953_vlan_table_membership_all_set(1, 1); - vsc9953_vlan_ingr_fltr_learn_drop(1); - vsc9953_port_all_vlan_egress_untagged_set(EGRESS_UNTAG_PVID_AND_ZERO); - if (vsc9953_aggr_code_set(AGGR_CODE_ALL)) - debug("VSC9953: failed to set default aggregation code mode\n"); -} - -static void vcap_entry2cache_init(u32 target, u32 entry_words) -{ - int i; - - for (i = 0; i < entry_words; i++) { - out_le32((unsigned int *)(VSC9953_OFFSET + - VSC9953_VCAP_CACHE_ENTRY_DAT(target, i)), 0x00); - out_le32((unsigned int *)(VSC9953_OFFSET + - VSC9953_VCAP_CACHE_MASK_DAT(target, i)), 0xFF); - } - - out_le32((unsigned int *)(VSC9953_OFFSET + - VSC9953_VCAP_CACHE_TG_DAT(target)), 0x00); - out_le32((unsigned int *)(VSC9953_OFFSET + - VSC9953_VCAP_CFG_MV_CFG(target)), - VSC9953_VCAP_CFG_MV_CFG_SIZE(entry_words)); -} - -static void vcap_action2cache_init(u32 target, u32 action_words, - u32 counter_words) -{ - int i; - - for (i = 0; i < action_words; i++) - out_le32((unsigned int *)(VSC9953_OFFSET + - VSC9953_VCAP_CACHE_ACTION_DAT(target, i)), 0x00); - - for (i = 0; i < counter_words; i++) - out_le32((unsigned int *)(VSC9953_OFFSET + - VSC9953_VCAP_CACHE_CNT_DAT(target, i)), 0x00); -} - -static int vcap_cmd(u32 target, u16 ix, int cmd, int sel, int entry_count) -{ - u32 tgt = target; - u32 value = (VSC9953_VCAP_UPDATE_CTRL_UPDATE_CMD(cmd) | - VSC9953_VCAP_UPDATE_CTRL_UPDATE_ADDR(ix) | - VSC9953_VCAP_UPDATE_CTRL_UPDATE_SHOT); - - if ((sel & TCAM_SEL_ENTRY) && ix >= entry_count) - return CMD_RET_FAILURE; - - if (!(sel & TCAM_SEL_ENTRY)) - value |= VSC9953_VCAP_UPDATE_CTRL_UPDATE_ENTRY_DIS; - - if (!(sel & TCAM_SEL_ACTION)) - value |= VSC9953_VCAP_UPDATE_CTRL_UPDATE_ACTION_DIS; - - if (!(sel & TCAM_SEL_COUNTER)) - value |= VSC9953_VCAP_UPDATE_CTRL_UPDATE_CNT_DIS; - - out_le32((unsigned int *)(VSC9953_OFFSET + - VSC9953_VCAP_CFG_UPDATE_CTRL(tgt)), value); - - do { - value = in_le32((unsigned int *)(VSC9953_OFFSET + - VSC9953_VCAP_CFG_UPDATE_CTRL(tgt))); - - } while (value & VSC9953_VCAP_UPDATE_CTRL_UPDATE_SHOT); - - return CMD_RET_SUCCESS; -} - -static void vsc9953_vcap_init(void) -{ - u32 tgt = VSC9953_ES0; - int cmd_ret; - - /* write entries */ - vcap_entry2cache_init(tgt, ENTRY_WORDS_ES0); - cmd_ret = vcap_cmd(tgt, 0, TCAM_CMD_INITIALIZE, TCAM_SEL_ENTRY, - ENTRY_WORDS_ES0); - if (cmd_ret != CMD_RET_SUCCESS) - debug("VSC9953:%d invalid TCAM_SEL_ENTRY\n", - __LINE__); - - /* write actions and counters */ - vcap_action2cache_init(tgt, BITS_TO_DWORD(ES0_ACT_WIDTH), - BITS_TO_DWORD(ES0_CNT_WIDTH)); - out_le32((unsigned int *)(VSC9953_OFFSET + - VSC9953_VCAP_CFG_MV_CFG(tgt)), - VSC9953_VCAP_CFG_MV_CFG_SIZE(ES0_ACT_COUNT)); - cmd_ret = vcap_cmd(tgt, 0, TCAM_CMD_INITIALIZE, - TCAM_SEL_ACTION | TCAM_SEL_COUNTER, ENTRY_WORDS_ES0); - if (cmd_ret != CMD_RET_SUCCESS) - debug("VSC9953:%d invalid TCAM_SEL_ACTION | TCAM_SEL_COUNTER\n", - __LINE__); - - tgt = VSC9953_IS1; - - /* write entries */ - vcap_entry2cache_init(tgt, ENTRY_WORDS_IS1); - cmd_ret = vcap_cmd(tgt, 0, TCAM_CMD_INITIALIZE, TCAM_SEL_ENTRY, - ENTRY_WORDS_IS1); - if (cmd_ret != CMD_RET_SUCCESS) - debug("VSC9953:%d invalid TCAM_SEL_ENTRY\n", - __LINE__); - - /* write actions and counters */ - vcap_action2cache_init(tgt, BITS_TO_DWORD(IS1_ACT_WIDTH), - BITS_TO_DWORD(IS1_CNT_WIDTH)); - out_le32((unsigned int *)(VSC9953_OFFSET + - VSC9953_VCAP_CFG_MV_CFG(tgt)), - VSC9953_VCAP_CFG_MV_CFG_SIZE(IS1_ACT_COUNT)); - cmd_ret = vcap_cmd(tgt, 0, TCAM_CMD_INITIALIZE, - TCAM_SEL_ACTION | TCAM_SEL_COUNTER, ENTRY_WORDS_IS1); - if (cmd_ret != CMD_RET_SUCCESS) - debug("VSC9953:%d invalid TCAM_SEL_ACTION | TCAM_SEL_COUNTER\n", - __LINE__); - - tgt = VSC9953_IS2; - - /* write entries */ - vcap_entry2cache_init(tgt, ENTRY_WORDS_IS2); - cmd_ret = vcap_cmd(tgt, 0, TCAM_CMD_INITIALIZE, TCAM_SEL_ENTRY, - ENTRY_WORDS_IS2); - if (cmd_ret != CMD_RET_SUCCESS) - debug("VSC9953:%d invalid selection: TCAM_SEL_ENTRY\n", - __LINE__); - - /* write actions and counters */ - vcap_action2cache_init(tgt, BITS_TO_DWORD(IS2_ACT_WIDTH), - BITS_TO_DWORD(IS2_CNT_WIDTH)); - out_le32((unsigned int *)(VSC9953_OFFSET + - VSC9953_VCAP_CFG_MV_CFG(tgt)), - VSC9953_VCAP_CFG_MV_CFG_SIZE(IS2_ACT_COUNT)); - cmd_ret = vcap_cmd(tgt, 0, TCAM_CMD_INITIALIZE, - TCAM_SEL_ACTION | TCAM_SEL_COUNTER, ENTRY_WORDS_IS2); - if (cmd_ret != CMD_RET_SUCCESS) - debug("VSC9953:%d invalid TCAM_SEL_ACTION | TCAM_SEL_COUNTER\n", - __LINE__); -} - -void vsc9953_init(struct bd_info *bis) -{ - u32 i; - u32 hdx_cfg = 0; - u32 phy_addr = 0; - int timeout; - struct vsc9953_system_reg *l2sys_reg; - struct vsc9953_qsys_reg *l2qsys_reg; - struct vsc9953_dev_gmii *l2dev_gmii_reg; - struct vsc9953_analyzer *l2ana_reg; - struct vsc9953_devcpu_gcb *l2dev_gcb; - - l2dev_gmii_reg = (struct vsc9953_dev_gmii *)(VSC9953_OFFSET + - VSC9953_DEV_GMII_OFFSET); - - l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET + - VSC9953_ANA_OFFSET); - - l2sys_reg = (struct vsc9953_system_reg *)(VSC9953_OFFSET + - VSC9953_SYS_OFFSET); - - l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET + - VSC9953_QSYS_OFFSET); - - l2dev_gcb = (struct vsc9953_devcpu_gcb *)(VSC9953_OFFSET + - VSC9953_DEVCPU_GCB); - - out_le32(&l2dev_gcb->chip_regs.soft_rst, - VSC9953_SOFT_SWC_RST_ENA); - timeout = 50000; - while ((in_le32(&l2dev_gcb->chip_regs.soft_rst) & - VSC9953_SOFT_SWC_RST_ENA) && --timeout) - udelay(1); /* busy wait for vsc9953 soft reset */ - if (timeout == 0) - debug("Timeout waiting for VSC9953 to reset\n"); - - out_le32(&l2sys_reg->sys.reset_cfg, VSC9953_MEM_ENABLE | - VSC9953_MEM_INIT); - - timeout = 50000; - while ((in_le32(&l2sys_reg->sys.reset_cfg) & - VSC9953_MEM_INIT) && --timeout) - udelay(1); /* busy wait for vsc9953 memory init */ - if (timeout == 0) - debug("Timeout waiting for VSC9953 memory to initialize\n"); - - out_le32(&l2sys_reg->sys.reset_cfg, (in_le32(&l2sys_reg->sys.reset_cfg) - | VSC9953_CORE_ENABLE)); - - /* VSC9953 Setting to be done once only */ - out_le32(&l2qsys_reg->sys.ext_cpu_cfg, 0x00000b00); - - for (i = 0; i < VSC9953_MAX_PORTS; i++) { - if (vsc9953_port_init(i)) - printf("Failed to initialize l2switch port %d\n", i); - - if (!vsc9953_l2sw.port[i].enabled) - continue; - - /* Enable VSC9953 GMII Ports Port ID 0 - 7 */ - if (VSC9953_INTERNAL_PORT_CHECK(i)) { - out_le32(&l2ana_reg->pfc[i].pfc_cfg, - VSC9953_PFC_FC_QSGMII); - out_le32(&l2sys_reg->pause_cfg.mac_fc_cfg[i], - VSC9953_MAC_FC_CFG_QSGMII); - } else { - out_le32(&l2ana_reg->pfc[i].pfc_cfg, - VSC9953_PFC_FC); - out_le32(&l2sys_reg->pause_cfg.mac_fc_cfg[i], - VSC9953_MAC_FC_CFG); - } - - l2dev_gmii_reg = (struct vsc9953_dev_gmii *) - (VSC9953_OFFSET + VSC9953_DEV_GMII_OFFSET + - T1040_SWITCH_GMII_DEV_OFFSET * i); - - out_le32(&l2dev_gmii_reg->port_mode.clock_cfg, - VSC9953_CLOCK_CFG); - out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_ena_cfg, - VSC9953_MAC_ENA_CFG); - out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_mode_cfg, - VSC9953_MAC_MODE_CFG); - out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_ifg_cfg, - VSC9953_MAC_IFG_CFG); - /* mac_hdx_cfg varies with port id*/ - hdx_cfg = VSC9953_MAC_HDX_CFG | (i << 16); - out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_hdx_cfg, hdx_cfg); - out_le32(&l2sys_reg->sys.front_port_mode[i], - VSC9953_FRONT_PORT_MODE); - setbits_le32(&l2qsys_reg->sys.switch_port_mode[i], - VSC9953_PORT_ENA); - out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_maxlen_cfg, - VSC9953_MAC_MAX_LEN); - out_le32(&l2sys_reg->pause_cfg.pause_cfg[i], - VSC9953_PAUSE_CFG); - /* WAIT FOR 2 us*/ - udelay(2); - - /* Initialize Lynx PHY Wrappers */ - phy_addr = 0; - if (vsc9953_l2sw.port[i].enet_if == - PHY_INTERFACE_MODE_QSGMII) - phy_addr = (i + 0x4) & 0x1F; - else if (vsc9953_l2sw.port[i].enet_if == - PHY_INTERFACE_MODE_SGMII) - phy_addr = (i + 1) & 0x1F; - - if (phy_addr) { - /* SGMII IF mode + AN enable */ - vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr, - 0x14, PHY_SGMII_IF_MODE_AN | - PHY_SGMII_IF_MODE_SGMII); - /* Dev ability according to SGMII specification */ - vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr, - 0x4, PHY_SGMII_DEV_ABILITY_SGMII); - /* Adjust link timer for SGMII - * 1.6 ms in units of 8 ns = 2 * 10^5 = 0x30d40 - */ - vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr, - 0x13, 0x0003); - vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr, - 0x12, 0x0d40); - /* Restart AN */ - vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr, - 0x0, PHY_SGMII_CR_DEF_VAL | - PHY_SGMII_CR_RESET_AN); - - timeout = 50000; - while ((vsc9953_mdio_read(&l2dev_gcb->mii_mng[0], - phy_addr, 0x01) & 0x0020) && --timeout) - udelay(1); /* wait for AN to complete */ - if (timeout == 0) - debug("Timeout waiting for AN to complete\n"); - } - } - - vsc9953_vcap_init(); - vsc9953_default_configuration(); - -#ifdef CONFIG_CMD_ETHSW - if (ethsw_define_functions(&vsc9953_cmd_func) < 0) - debug("Unable to use \"ethsw\" commands\n"); -#endif - - printf("VSC9953 L2 switch initialized\n"); - return; -} diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index d94048db5f..176fb07c65 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -416,6 +416,9 @@ config POWER_HI6553 config POWER_LTC3676 bool "Enable legacy driver for LTC3676 PMIC" +config POWER_PCA9450 + bool "Enable legacy driver for PCA9450 PMIC" + config POWER_PFUZE100 bool "Enable legacy driver for PFUZE100 PMIC" diff --git a/drivers/ram/mpc83xx_sdram.c b/drivers/ram/mpc83xx_sdram.c index a53ff93a6b..11676d4fae 100644 --- a/drivers/ram/mpc83xx_sdram.c +++ b/drivers/ram/mpc83xx_sdram.c @@ -118,12 +118,7 @@ int dram_init(void) phys_size_t get_effective_memsize(void) { - if (!IS_ENABLED(CONFIG_VERY_BIG_RAM)) - return gd->ram_size; - - /* Limit stack to what we can reasonable map */ - return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ? - CONFIG_MAX_MEM_MAPPED : gd->ram_size); + return gd->ram_size; } /** diff --git a/drivers/rtc/mc146818.c b/drivers/rtc/mc146818.c index 122691b978..03ce081d57 100644 --- a/drivers/rtc/mc146818.c +++ b/drivers/rtc/mc146818.c @@ -13,7 +13,7 @@ #include <dm.h> #include <rtc.h> -#if defined(CONFIG_X86) || defined(CONFIG_MALTA) +#if defined(CONFIG_X86) || defined(CONFIG_TARGET_MALTA) #include <asm/io.h> #define in8(p) inb(p) #define out8(p, v) outb(v, p) diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c index 4f4eb02de0..07a59ec960 100644 --- a/drivers/serial/usbtty.c +++ b/drivers/serial/usbtty.c @@ -120,20 +120,6 @@ static struct usb_device_descriptor device_descriptor = { .bNumConfigurations = NUM_CONFIGS }; - -#if defined(CONFIG_USBD_HS) -static struct usb_qualifier_descriptor qualifier_descriptor = { - .bLength = sizeof(struct usb_qualifier_descriptor), - .bDescriptorType = USB_DT_QUAL, - .bcdUSB = cpu_to_le16(USB_BCD_VERSION), - .bDeviceClass = COMMUNICATIONS_DEVICE_CLASS, - .bDeviceSubClass = 0x00, - .bDeviceProtocol = 0x00, - .bMaxPacketSize0 = EP0_MAX_PACKET_SIZE, - .bNumConfigurations = NUM_CONFIGS -}; -#endif - /* * Static CDC ACM specific descriptors */ @@ -639,9 +625,6 @@ static void usbtty_init_instances (void) memset (device_instance, 0, sizeof (struct usb_device_instance)); device_instance->device_state = STATE_INIT; device_instance->device_descriptor = &device_descriptor; -#if defined(CONFIG_USBD_HS) - device_instance->qualifier_descriptor = &qualifier_descriptor; -#endif device_instance->event = usbtty_event_handler; device_instance->cdc_recv_setup = usbtty_cdc_setup; device_instance->bus = bus_instance; @@ -755,10 +738,6 @@ static void usbtty_init_terminal_type(short type) device_descriptor.idProduct = cpu_to_le16(CONFIG_USBD_PRODUCTID_CDCACM); -#if defined(CONFIG_USBD_HS) - qualifier_descriptor.bDeviceClass = - COMMUNICATIONS_DEVICE_CLASS; -#endif /* Assign endpoint indices */ tx_endpoint = ACM_TX_ENDPOINT; rx_endpoint = ACM_RX_ENDPOINT; @@ -787,9 +766,6 @@ static void usbtty_init_terminal_type(short type) device_descriptor.bDeviceClass = 0xFF; device_descriptor.idProduct = cpu_to_le16(CONFIG_USBD_PRODUCTID_GSERIAL); -#if defined(CONFIG_USBD_HS) - qualifier_descriptor.bDeviceClass = 0xFF; -#endif /* Assign endpoint indices */ tx_endpoint = GSERIAL_TX_ENDPOINT; rx_endpoint = GSERIAL_RX_ENDPOINT; @@ -937,9 +913,6 @@ static int usbtty_configured (void) static void usbtty_event_handler (struct usb_device_instance *device, usb_device_event_t event, int data) { -#if defined(CONFIG_USBD_HS) - int i; -#endif switch (event) { case DEVICE_RESET: case DEVICE_BUS_INACTIVE: @@ -950,29 +923,6 @@ static void usbtty_event_handler (struct usb_device_instance *device, break; case DEVICE_ADDRESS_ASSIGNED: -#if defined(CONFIG_USBD_HS) - /* - * is_usbd_high_speed routine needs to be defined by - * specific gadget driver - * It returns true if device enumerates at High speed - * Retuns false otherwise - */ - for (i = 0; i < NUM_ENDPOINTS; i++) { - if (((ep_descriptor_ptrs[i]->bmAttributes & - USB_ENDPOINT_XFERTYPE_MASK) == - USB_ENDPOINT_XFER_BULK) - && is_usbd_high_speed()) { - - ep_descriptor_ptrs[i]->wMaxPacketSize = - CONFIG_USBD_SERIAL_BULK_HS_PKTSIZE; - } - - endpoint_instance[i + 1].tx_packetSize = - ep_descriptor_ptrs[i]->wMaxPacketSize; - endpoint_instance[i + 1].rcv_packetSize = - ep_descriptor_ptrs[i]->wMaxPacketSize; - } -#endif usbtty_init_endpoints (); default: diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h index e27aa368c9..ac4d22044d 100644 --- a/drivers/serial/usbtty.h +++ b/drivers/serial/usbtty.h @@ -51,10 +51,6 @@ #define CONFIG_USBD_SERIAL_INT_PKTSIZE UDC_INT_PACKET_SIZE #define CONFIG_USBD_SERIAL_BULK_PKTSIZE UDC_BULK_PACKET_SIZE -#if defined(CONFIG_USBD_HS) -#define CONFIG_USBD_SERIAL_BULK_HS_PKTSIZE UDC_BULK_HS_PACKET_SIZE -#endif - #define USBTTY_DEVICE_CLASS COMMUNICATIONS_DEVICE_CLASS #define USBTTY_BCD_DEVICE 0x00 diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index c6900f449d..64ceed12ce 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -429,6 +429,16 @@ config SANDBOX_SPI }; }; +config SANDBOX_SPI_MAX_BUS + int + depends on SANDBOX + default 1 + +config SANDBOX_SPI_MAX_CS + int + depends on SANDBOX + default 10 + config SPI_ASPEED_SMC bool "ASPEED SPI flash controller driver" depends on DM_SPI && SPI_MEM diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 3afb45d5cc..8efd461457 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -93,7 +93,6 @@ comment "USB peripherals" config USB_STORAGE bool "USB Mass Storage support" - depends on !(BLK && !DM_USB) ---help--- Say Y here if you want to connect USB mass storage devices to your board's USB port. diff --git a/drivers/usb/gadget/ep0.c b/drivers/usb/gadget/ep0.c index 6624f61b76..c256cc31fb 100644 --- a/drivers/usb/gadget/ep0.c +++ b/drivers/usb/gadget/ep0.c @@ -371,26 +371,7 @@ static int ep0_get_descriptor (struct usb_device_instance *device, } break; case USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER: -#if defined(CONFIG_USBD_HS) - { - struct usb_qualifier_descriptor *qualifier_descriptor = - device->qualifier_descriptor; - - if (!qualifier_descriptor) - return -1; - - /* copy descriptor for this device */ - copy_config(urb, qualifier_descriptor, - sizeof(struct usb_qualifier_descriptor), - max); - - } - dbg_ep0(3, "copied qualifier descriptor, actual_length: 0x%x", - urb->actual_length); -#else return -1; -#endif - break; default: return -1; diff --git a/env/Kconfig b/env/Kconfig index 4e506ae262..7ca992aa1d 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -30,6 +30,15 @@ config ENV_OVERWRITE Use this to permit overriding of certain environmental variables like Ethernet and Serial +config OVERWRITE_ETHADDR_ONCE + bool "Enable overwriting ethaddr environment variables once" + depends on !ENV_OVERWRITE + help + Enable this to allow for the ethaddr environment variables to be + overwritten one time per boot, only. This allows for a default + to be installed in the environment, which can be changed exactly ONCE + by the user. + config ENV_MIN_ENTRIES int "Minimum number of entries in the environment hashtable" default 64 @@ -78,13 +87,6 @@ config ENV_IS_IN_EEPROM still be one byte because the extra address bits are hidden in the chip address. - - CONFIG_I2C_ENV_EEPROM_BUS - if you have an Environment on an EEPROM reached over - I2C muxes, you can define here, how to reach this - EEPROM. For example: - - #define CONFIG_I2C_ENV_EEPROM_BUS 1 - EEPROM which holds the environment, is reached over a pca9547 i2c mux with address 0x70, channel 3. @@ -866,6 +868,16 @@ config ETHPRIME help The value to set the "ethprime" variable to. +config USE_HOSTNAME + bool "Set a default 'hostname' value in the environment" + default y if X86 + +config HOSTNAME + string "Value of the default 'hostname' value in the environment" + depends on USE_HOSTNAME + default "x86" if X86 + default "unknown" + config VERSION_VARIABLE bool "Add a 'ver' environment variable with the U-Boot version" help diff --git a/env/Makefile b/env/Makefile index c4ad654328..bb6e24b396 100644 --- a/env/Makefile +++ b/env/Makefile @@ -11,7 +11,6 @@ obj-$(CONFIG_$(SPL_TPL_)ENV_SUPPORT) += flags.o ifndef CONFIG_SPL_BUILD obj-y += callback.o obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o -extra-$(CONFIG_ENV_IS_EMBEDDED) += embedded.o obj-$(CONFIG_ENV_IS_IN_EEPROM) += embedded.o extra-$(CONFIG_ENV_IS_IN_FLASH) += embedded.o obj-$(CONFIG_ENV_IS_IN_NVRAM) += embedded.o diff --git a/env/eeprom.c b/env/eeprom.c index f8556a4721..7ce7e9972b 100644 --- a/env/eeprom.c +++ b/env/eeprom.c @@ -15,55 +15,12 @@ #include <asm/global_data.h> #include <linux/stddef.h> #include <u-boot/crc.h> -#if defined(CONFIG_I2C_ENV_EEPROM_BUS) -#include <i2c.h> -#endif #include <search.h> #include <errno.h> #include <linux/compiler.h> /* for BUG_ON */ DECLARE_GLOBAL_DATA_PTR; -static int eeprom_bus_read(unsigned dev_addr, unsigned offset, - uchar *buffer, unsigned cnt) -{ - int rcode; -#if defined(CONFIG_I2C_ENV_EEPROM_BUS) - int old_bus = i2c_get_bus_num(); - - if (old_bus != CONFIG_I2C_ENV_EEPROM_BUS) - i2c_set_bus_num(CONFIG_I2C_ENV_EEPROM_BUS); -#endif - - rcode = eeprom_read(dev_addr, offset, buffer, cnt); - -#if defined(CONFIG_I2C_ENV_EEPROM_BUS) - i2c_set_bus_num(old_bus); -#endif - - return rcode; -} - -static int eeprom_bus_write(unsigned dev_addr, unsigned offset, - uchar *buffer, unsigned cnt) -{ - int rcode; -#if defined(CONFIG_I2C_ENV_EEPROM_BUS) - int old_bus = i2c_get_bus_num(); - - if (old_bus != CONFIG_I2C_ENV_EEPROM_BUS) - i2c_set_bus_num(CONFIG_I2C_ENV_EEPROM_BUS); -#endif - - rcode = eeprom_write(dev_addr, offset, buffer, cnt); - -#if defined(CONFIG_I2C_ENV_EEPROM_BUS) - i2c_set_bus_num(old_bus); -#endif - - return rcode; -} - static int env_eeprom_load(void) { char buf_env[CONFIG_ENV_SIZE]; @@ -82,11 +39,11 @@ static int env_eeprom_load(void) for (i = 0; i < 2; i++) { /* read CRC */ - eeprom_bus_read(CONFIG_SYS_I2C_EEPROM_ADDR, + eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, off_env[i] + offsetof(env_t, crc), (uchar *)&crc[i], sizeof(ulong)); /* read FLAGS */ - eeprom_bus_read(CONFIG_SYS_I2C_EEPROM_ADDR, + eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, off_env[i] + offsetof(env_t, flags), (uchar *)&flags[i], sizeof(uchar)); @@ -96,7 +53,7 @@ static int env_eeprom_load(void) while (len > 0) { int n = (len > sizeof(rdbuf)) ? sizeof(rdbuf) : len; - eeprom_bus_read(CONFIG_SYS_I2C_EEPROM_ADDR, off, + eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, off, rdbuf, n); crc_tmp = crc32(crc_tmp, rdbuf, n); @@ -138,7 +95,7 @@ static int env_eeprom_load(void) eeprom_init(-1); /* prepare for EEPROM read/write */ /* read old CRC */ - eeprom_bus_read(CONFIG_SYS_I2C_EEPROM_ADDR, + eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_ENV_OFFSET + offsetof(env_t, crc), (uchar *)&crc, sizeof(ulong)); @@ -148,7 +105,7 @@ static int env_eeprom_load(void) while (len > 0) { int n = (len > sizeof(rdbuf)) ? sizeof(rdbuf) : len; - eeprom_bus_read(CONFIG_SYS_I2C_EEPROM_ADDR, + eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_ENV_OFFSET + off, rdbuf, n); new = crc32(new, rdbuf, n); len -= n; @@ -168,7 +125,7 @@ static int env_eeprom_load(void) off = CONFIG_ENV_OFFSET_REDUND; #endif - eeprom_bus_read(CONFIG_SYS_I2C_EEPROM_ADDR, + eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, off, (uchar *)buf_env, CONFIG_ENV_SIZE); return env_import(buf_env, 1, H_EXTERNAL); @@ -197,12 +154,12 @@ static int env_eeprom_save(void) env_new.flags = ENV_REDUND_ACTIVE; #endif - rc = eeprom_bus_write(CONFIG_SYS_I2C_EEPROM_ADDR, + rc = eeprom_write(CONFIG_SYS_I2C_EEPROM_ADDR, off, (uchar *)&env_new, CONFIG_ENV_SIZE); #ifdef CONFIG_ENV_OFFSET_REDUND if (rc == 0) { - eeprom_bus_write(CONFIG_SYS_I2C_EEPROM_ADDR, + eeprom_write(CONFIG_SYS_I2C_EEPROM_ADDR, off_red + offsetof(env_t, flags), (uchar *)&flag_obsolete, 1); diff --git a/env/embedded.c b/env/embedded.c index 27fb45bf8c..7cbe54c56e 100644 --- a/env/embedded.c +++ b/env/embedded.c @@ -27,7 +27,7 @@ * Generate embedded environment table * inside U-Boot image, if needed. */ -#if defined(ENV_IS_EMBEDDED) || defined(CONFIG_BUILD_ENVCRC) +#if defined(ENV_IS_EMBEDDED) /* * Put the environment in the .text section when we are building * U-Boot proper. The host based program "tools/envcrc" does not need diff --git a/env/nvram.c b/env/nvram.c index fb265235af..229c34f536 100644 --- a/env/nvram.c +++ b/env/nvram.c @@ -7,22 +7,6 @@ * Andreas Heppel <aheppel@sysgo.de> */ -/* - * 09-18-2001 Andreas Heppel, Sysgo RTS GmbH <aheppel@sysgo.de> - * - * It might not be possible in all cases to use 'memcpy()' to copy - * the environment to NVRAM, as the NVRAM might not be mapped into - * the memory space. (I.e. this is the case for the BAB750). In those - * cases it might be possible to access the NVRAM using a different - * method. For example, the RTC on the BAB750 is accessible in IO - * space using its address and data registers. To enable usage of - * NVRAM in those cases I invented the functions 'nvram_read()' and - * 'nvram_write()', which will be activated upon the configuration - * #define CONFIG_SYS_NVRAM_ACCESS_ROUTINE. Note, that those functions are - * strongly dependent on the used HW, and must be redefined for each - * board that wants to use them. - */ - #include <common.h> #include <command.h> #include <env.h> @@ -35,22 +19,14 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE -extern void *nvram_read(void *dest, const long src, size_t count); -extern void nvram_write(long dest, const void *src, size_t count); -#else static env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR; -#endif static int env_nvram_load(void) { char buf[CONFIG_ENV_SIZE]; -#if defined(CONFIG_SYS_NVRAM_ACCESS_ROUTINE) - nvram_read(buf, CONFIG_ENV_ADDR, CONFIG_ENV_SIZE); -#else memcpy(buf, (void *)CONFIG_ENV_ADDR, CONFIG_ENV_SIZE); -#endif + return env_import(buf, 1, H_EXTERNAL); } @@ -63,12 +39,9 @@ static int env_nvram_save(void) if (rcode) return rcode; -#ifdef CONFIG_SYS_NVRAM_ACCESS_ROUTINE - nvram_write(CONFIG_ENV_ADDR, &env_new, CONFIG_ENV_SIZE); -#else if (memcpy((char *)CONFIG_ENV_ADDR, &env_new, CONFIG_ENV_SIZE) == NULL) rcode = 1; -#endif + return rcode; } @@ -79,19 +52,8 @@ static int env_nvram_save(void) */ static int env_nvram_init(void) { -#if defined(CONFIG_SYS_NVRAM_ACCESS_ROUTINE) - ulong crc; - uchar data[ENV_SIZE]; - - nvram_read(&crc, CONFIG_ENV_ADDR, sizeof(ulong)); - nvram_read(data, CONFIG_ENV_ADDR + sizeof(ulong), ENV_SIZE); - - if (crc32(0, data, ENV_SIZE) == crc) { - gd->env_addr = (ulong)CONFIG_ENV_ADDR + sizeof(long); -#else if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) { gd->env_addr = (ulong)&env_ptr->data; -#endif gd->env_valid = ENV_VALID; } else { gd->env_valid = ENV_INVALID; diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h index 3a4fbc6eab..b898ec0cc3 100644 --- a/include/configs/10m50_devboard.h +++ b/include/configs/10m50_devboard.h @@ -32,6 +32,5 @@ */ #define CFG_SYS_SDRAM_BASE 0xc8000000 #define CFG_SYS_SDRAM_SIZE 0x08000000 -#define CONFIG_MONITOR_IS_IN_RAM #endif /* __CONFIG_H */ diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index ab889180ee..e67338c202 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -28,6 +28,5 @@ */ #define CFG_SYS_SDRAM_BASE 0xD0000000 #define CFG_SYS_SDRAM_SIZE 0x08000000 -#define CONFIG_MONITOR_IS_IN_RAM #endif /* __CONFIG_H */ diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index b360238b33..e14650fe0d 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -17,14 +17,6 @@ /* I2C */ -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* CONFIG_MCFFEC */ - -#define CONFIG_HOSTNAME "M5208EVBe" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=40010000\0" \ diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index ed45eccb62..220524bfae 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -26,14 +26,7 @@ #define CFG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA) /* this must be included AFTER the definition of CONFIG COMMANDS (if any) */ -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* FEC_ENET */ - -#define CONFIG_HOSTNAME "M5235EVB" + #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=10000\0" \ diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 0e38eeb4a3..c71130909f 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -20,8 +20,6 @@ #define CFG_SYS_UART_PORT (0) -#undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */ - /* * Clock configuration: enable only one of the following options */ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 7e37c6d119..bc156df20d 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -20,14 +20,6 @@ env/embedded.o(.text*); #ifdef CONFIG_DRIVER_DM9000 -# define CONFIG_DM9000_BASE (CFG_SYS_CS1_BASE | 0x300) -# define DM9000_IO CONFIG_DM9000_BASE -# define DM9000_DATA (CONFIG_DM9000_BASE + 4) -# undef CONFIG_DM9000_DEBUG -# define CONFIG_DM9000_BYTE_SWAPPED - -# define CONFIG_OVERWRITE_ETHADDR_ONCE - # define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \ @@ -42,8 +34,6 @@ "" #endif -#define CONFIG_HOSTNAME "M5253DEMO" - /* I2C */ #define CFG_SYS_I2C_PINMUX_REG (*(u32 *) (CFG_SYS_MBAR+0x19C)) #define CFG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF) diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index a9339e5052..6aae584afd 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -19,8 +19,6 @@ #define CFG_SYS_UART_PORT (0) -#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ - /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash */ @@ -29,14 +27,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* CONFIG_MCFFEC */ - -#define CONFIG_HOSTNAME "M5272C3" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=10000\0" \ diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index ff9f853589..41974cff41 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -38,10 +38,6 @@ #define CFG_SYS_I2C_PINMUX_CLR (0xFFF0) #define CFG_SYS_I2C_PINMUX_SET (0x000F) -#ifdef CONFIG_MCFFEC -# define CONFIG_OVERWRITE_ETHADDR_ONCE -#endif /* FEC_ENET */ - #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=10000\0" \ diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index bde9e770e5..7cfe7a2da3 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -19,8 +19,6 @@ #define CFG_SYS_UART_PORT (0) -#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ - /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash */ @@ -29,14 +27,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text*); -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* CONFIG_MCFFEC */ - -#define CONFIG_HOSTNAME "M5282EVB" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=10000\0" \ diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 42b74aeb9b..ac2bd0b224 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -30,14 +30,6 @@ /* I2C */ -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* FEC_ENET */ - -#define CONFIG_HOSTNAME "M53017" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=40010000\0" \ @@ -93,7 +85,6 @@ * FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_SPANSION_S29WS_N 1 # define CFG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ #endif diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 72f0c63a1e..a86a117fd8 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -22,14 +22,6 @@ /* I2C */ -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* FEC_ENET */ - -#define CONFIG_HOSTNAME "M5329EVB" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=40010000\0" \ diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 4e8b54e01f..b2ad03cc3c 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -24,14 +24,6 @@ /* I2C */ -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* FEC_ENET */ - -#define CONFIG_HOSTNAME "M5373EVB" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 232cf9e998..f8368823aa 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -52,10 +52,6 @@ "${ofl_args}; " \ "bootm ${loadaddr} - 0xf00000\0" -#define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.1 -#define CONFIG_NETMASK 255.0.0.0 - /* Miscellaneous configurable options */ /* Definitions for initial stack pointer and data area (in DPRAM) */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index f312ffb37e..7b932eb389 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -177,7 +177,6 @@ #define CFG_SYS_PCIE2_IO_PHYS 0xD8000000 #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC_PIN_MUX #define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC83xx_ESDHC_ADDR #endif @@ -196,16 +195,10 @@ * Environment Configuration */ -#define CONFIG_NETDEV "eth1" - -#define CONFIG_HOSTNAME "mpc837x_rdb" -#define CONFIG_ROOTPATH "/nfsroot" - /* U-Boot image on TFTP server */ -#define CONFIG_UBOOTPATH "u-boot.bin" -#define CONFIG_FDTFILE "mpc8379_rdb.dtb" +#define FDTFILE "mpc8379_rdb.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=" CONFIG_NETDEV "\0" \ + "netdev=eth1\0" \ "uboot=" CONFIG_UBOOTPATH "\0" \ "tftpflash=tftp $loadaddr $uboot;" \ "protect off " __stringify(CONFIG_TEXT_BASE) \ @@ -219,7 +212,7 @@ "cmp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \ " $filesize\0" \ "fdtaddr=780000\0" \ - "fdtfile=" CONFIG_FDTFILE "\0" \ + "fdtfile=" FDTFILE "\0" \ "ramdiskaddr=1000000\0" \ "ramdiskfile=rootfs.ext2.gz.uboot\0" \ "console=ttyS0\0" \ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 34b876f829..1e3ba6de6e 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -18,11 +18,6 @@ #endif /* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ - -/* * Only possible on E500 Version 2 or newer cores. */ @@ -31,8 +26,6 @@ /* DDR Setup */ -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE @@ -298,20 +291,10 @@ * Environment Configuration */ -#define CONFIG_IPADDR 192.168.1.253 - -#define CONFIG_HOSTNAME "unknown" -#define CONFIG_ROOTPATH "/nfsroot" -#define CONFIG_UBOOTPATH 8548cds/u-boot.bin /* TFTP server */ - -#define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_GATEWAYIP 192.168.1.1 -#define CONFIG_NETMASK 255.255.255.0 - #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:ecc=off\0" \ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ "protect off " __stringify(CONFIG_TEXT_BASE) \ " +$filesize; " \ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 4418d51695..2267a7a9c8 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -24,7 +24,6 @@ #ifdef CONFIG_SPIFLASH #ifdef CONFIG_NXP_ESBC -#define CONFIG_RAMBOOT_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #else #define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10) @@ -96,16 +95,9 @@ #endif #endif -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ - /* DDR Setup */ #define SPD_EEPROM_ADDRESS 0x52 -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - #ifndef __ASSEMBLY__ extern unsigned long get_sdram_size(void); #endif @@ -161,7 +153,6 @@ extern unsigned long get_sdram_size(void); #define CFG_SYS_NOR_FTIM3 0x0 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ /* CFI for NOR Flash */ @@ -381,13 +372,10 @@ extern unsigned long get_sdram_size(void); * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH u-boot.bin/* U-Boot image on TFTP server */ - #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=" __stringify(CONFIG_DEF_HWCONFIG) "\0" \ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "loadaddr=1000000\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 8b901ca47a..1a157a7da0 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -12,7 +12,6 @@ #define __CONFIG_H #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #endif @@ -46,10 +45,9 @@ /* * Config the L3 Cache as L3 SRAM */ -#define CFG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE +#define CFG_SYS_INIT_L3_ADDR CONFIG_TEXT_BASE #ifdef CONFIG_PHYS_64BIT -#define CFG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | \ - CONFIG_RAMBOOT_TEXT_BASE) +#define CFG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_TEXT_BASE) #else #define CFG_SYS_INIT_L3_ADDR_PHYS CFG_SYS_INIT_L3_ADDR #endif @@ -62,7 +60,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE @@ -88,7 +85,6 @@ #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE #endif -#define CONFIG_FSL_CPLD #define CPLD_BASE 0xffdf0000 /* CPLD registers */ #ifdef CONFIG_PHYS_64BIT #define CPLD_BASE_PHYS 0xfffdf0000ull @@ -101,8 +97,6 @@ #define PIXIS_LBMAP_SHIFT 4 #define PIXIS_LBMAP_ALTBANK 0x40 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - /* Nand Flash */ #ifdef CONFIG_NAND_FSL_ELBC #define CFG_SYS_NAND_BASE 0xffa00000 @@ -133,7 +127,6 @@ #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS + 0x8000000} /* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ #ifdef CONFIG_PHYS_64BIT #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf @@ -308,8 +301,6 @@ /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH u-boot.bin #define __USB_PHY_TYPE utmi @@ -317,7 +308,7 @@ "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ "bank_intlv=cs0_cs1\0" \ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index d5c9c05767..19ae639947 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -36,14 +36,5 @@ /* size in bytes reserved for initial data */ #include <asm/arch/config.h> -/* There is no PHY directly connected so don't ask it for link status */ - -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */ -#define CONFIG_PHY_BASE_ADR 0x01 -#endif /* CONFIG_CMD_NET */ #endif /* _CONFIG_SBX81LIFKW_H */ diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index 23d37394e0..bdbf9d4758 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -41,14 +41,5 @@ /* size in bytes reserved for initial data */ #include <asm/arch/config.h> -/* There is no PHY directly connected so don't ask it for link status */ - -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */ -#define CONFIG_PHY_BASE_ADR 0x01 -#endif /* CONFIG_CMD_NET */ #endif /* _CONFIG_SBX81LIFXCAT_H */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 623d4cf556..4794c5a84d 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -94,9 +94,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif /* * Config the L3 Cache as L3 SRAM @@ -112,7 +109,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #if defined(CONFIG_TARGET_T1024RDB) @@ -158,8 +154,6 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0x0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} #ifdef CONFIG_TARGET_T1024RDB @@ -271,7 +265,6 @@ #endif /* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #ifdef CONFIG_PHYS_64BIT #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf @@ -423,8 +416,6 @@ /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi #ifdef CONFIG_ARCH_T1024 @@ -443,7 +434,7 @@ ARCH_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "bootargs=root=/dev/ram rw console=ttyS0,115200\0" \ "netdev=eth0\0" \ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index b6938056bb..cfde8ecf9c 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -20,13 +20,7 @@ #ifdef CONFIG_MTD_RAW_NAND #ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. - */ -#define CFG_SYS_NAND_U_BOOT_SIZE ((768 << 10) + \ - CONFIG_U_BOOT_HDR_SIZE) +#define CFG_SYS_NAND_U_BOOT_SIZE ((768 << 10) + (16 << 10)) #else #define CFG_SYS_NAND_U_BOOT_SIZE (768 << 10) #endif @@ -64,9 +58,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif /* * Config the L3 Cache as L3 SRAM @@ -86,7 +77,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE @@ -126,8 +116,6 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0x0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} /* CPLD on IFC */ @@ -139,24 +127,10 @@ #define CPLD_LBMAP_RESET 0xFF #define CPLD_LBMAP_SHIFT 0x03 -#if defined(CONFIG_TARGET_T1042RDB_PI) -#define CPLD_DIU_SEL_DFP 0x80 -#elif defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) #define CPLD_DIU_SEL_DFP 0xc0 #endif -#if defined(CONFIG_TARGET_T1040D4RDB) -#define CPLD_INT_MASK_ALL 0xFF -#define CPLD_INT_MASK_THERM 0x80 -#define CPLD_INT_MASK_DVI_DFP 0x40 -#define CPLD_INT_MASK_QSGMII1 0x20 -#define CPLD_INT_MASK_QSGMII2 0x10 -#define CPLD_INT_MASK_SGMI1 0x08 -#define CPLD_INT_MASK_SGMI2 0x04 -#define CPLD_INT_MASK_TDMR1 0x02 -#define CPLD_INT_MASK_TDMR2 0x01 -#endif - #define CFG_SYS_CPLD_BASE 0xffdf0000 #define CFG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CFG_SYS_CPLD_BASE) #define CFG_SYS_CSPR2_EXT (0xf) @@ -249,7 +223,6 @@ #endif /* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf #define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 @@ -279,16 +252,12 @@ #define I2C_MUX_PCA_ADDR 0x70 #define I2C_MUX_CH_DEFAULT 0x8 -#if defined(CONFIG_TARGET_T1042RDB_PI) || \ - defined(CONFIG_TARGET_T1040D4RDB) || \ - defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) /* * RTC configuration */ #define CFG_SYS_I2C_RTC_ADDR 0x68 -/*DVI encoder*/ -#define CONFIG_HDMI_ENCODER_I2C_ADDR 0x75 #endif /* @@ -365,36 +334,16 @@ #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_FMAN_ENET -#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1042RDB) -#define CFG_SYS_SGMII1_PHY_ADDR 0x03 -#elif defined(CONFIG_TARGET_T1040D4RDB) -#define CFG_SYS_SGMII1_PHY_ADDR 0x01 -#elif defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) #define CFG_SYS_SGMII1_PHY_ADDR 0x02 #define CFG_SYS_SGMII2_PHY_ADDR 0x03 #define CFG_SYS_SGMII3_PHY_ADDR 0x01 #endif -#if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB) -#define CFG_SYS_RGMII1_PHY_ADDR 0x04 -#define CFG_SYS_RGMII2_PHY_ADDR 0x05 -#else #define CFG_SYS_RGMII1_PHY_ADDR 0x01 #define CFG_SYS_RGMII2_PHY_ADDR 0x02 #endif -/* Enable VSC9953 L2 Switch driver on T1040 SoC */ -#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1040D4RDB) -#ifdef CONFIG_TARGET_T1040RDB -#define CFG_SYS_FM1_QSGMII11_PHY_ADDR 0x04 -#define CFG_SYS_FM1_QSGMII21_PHY_ADDR 0x08 -#else -#define CFG_SYS_FM1_QSGMII11_PHY_ADDR 0x08 -#define CFG_SYS_FM1_QSGMII21_PHY_ADDR 0x0c -#endif -#endif -#endif - /* * Miscellaneous configurable options */ @@ -413,21 +362,11 @@ /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #define __USB_PHY_TYPE utmi #define RAMDISKFILE "t104xrdb/ramdisk.uboot" -#ifdef CONFIG_TARGET_T1040RDB -#define FDTFILE "t1040rdb/t1040rdb.dtb" -#elif defined(CONFIG_TARGET_T1042RDB_PI) -#define FDTFILE "t1042rdb_pi/t1042rdb_pi.dtb" -#elif defined(CONFIG_TARGET_T1042RDB) -#define FDTFILE "t1042rdb/t1042rdb.dtb" -#elif defined(CONFIG_TARGET_T1040D4RDB) -#define FDTFILE "t1042rdb/t1040d4rdb.dtb" -#elif defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) #define FDTFILE "t1042rdb/t1042d4rdb.dtb" #endif @@ -436,7 +375,7 @@ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\ "usb2:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index a93e05dd4d..4b6bdaa344 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -60,13 +60,6 @@ #endif /* - * These can be toggled for performance analysis, otherwise use default. - */ -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - -/* * Config the L3 Cache as L3 SRAM */ #define CFG_SYS_INIT_L3_ADDR 0xFFFC0000 @@ -78,7 +71,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CFG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ @@ -119,8 +111,6 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0x0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS \ + 0x8000000, CFG_SYS_FLASH_BASE_PHYS} @@ -247,7 +237,6 @@ #endif /* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf #define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 @@ -421,8 +410,6 @@ /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi @@ -432,7 +419,7 @@ "bank_intlv=auto;" \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index cf65a0da18..fab40f792a 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -60,13 +60,6 @@ #endif /* - * These can be toggled for performance analysis, otherwise use default. - */ -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - -/* * Config the L3 Cache as L3 SRAM */ #define CFG_SYS_INIT_L3_ADDR 0xFFFC0000 @@ -78,7 +71,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CFG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ @@ -114,8 +106,6 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0x0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS } /* CPLD on IFC */ @@ -212,7 +202,6 @@ #endif /* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf #define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 @@ -387,8 +376,6 @@ /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi @@ -398,7 +385,7 @@ "bank_intlv=auto;" \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index b51762264a..41565f284c 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -16,7 +16,6 @@ #ifdef CONFIG_RAMBOOT_PBL #ifndef CONFIG_SDCARD -#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else #define RESET_VECTOR_OFFSET 0x27FFC @@ -42,13 +41,6 @@ #define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS /* - * These can be toggled for performance analysis, otherwise use default. - */ -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - -/* * Config the L3 Cache as L3 SRAM */ #define CFG_SYS_INIT_L3_ADDR 0xFFFC0000 @@ -60,7 +52,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE @@ -71,7 +62,6 @@ #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) /* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf #define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 @@ -138,8 +128,6 @@ /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #define HVBOOT \ "setenv bootargs config-addr=0x60000000; " \ @@ -184,8 +172,6 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0x0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS \ + 0x8000000, CFG_SYS_FLASH_BASE_PHYS} @@ -388,7 +374,7 @@ "bank_intlv=auto;" \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ diff --git a/include/configs/alt.h b/include/configs/alt.h index fe303fda78..f277400169 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -20,9 +20,6 @@ #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) -/* FLASH */ -#define CONFIG_SPI_FLASH_QUAD - /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index 452887d699..70645edcb1 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -20,8 +20,6 @@ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -#define CONFIG_HSMMC2_8BIT - #ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x80200000\0" \ diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index dacfd41cce..ba91f2b054 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -35,9 +35,6 @@ #include <configs/ti_omap5_common.h> -/* Enhance our eMMC support / experience. */ -#define CONFIG_HSMMC2_8BIT - /* CPSW Ethernet */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ diff --git a/include/configs/amcore.h b/include/configs/amcore.h index ee0be972d2..ca29346fe6 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -8,8 +8,6 @@ #ifndef __AMCORE_CONFIG_H #define __AMCORE_CONFIG_H -#define CONFIG_HOSTNAME "AMCORE" - #define CFG_SYS_UART_PORT 0 #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index cf23837863..aa3dcf4a88 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -14,9 +14,6 @@ #define USDHC2_BASE_ADDR 0x5b020000 /* Networking */ -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SERVERIP 192.168.10.1 #define MEM_LAYOUT_ENV_SETTINGS \ "fdt_addr_r=0x84000000\0" \ diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index f0a02ae179..71d4727ca9 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -13,7 +13,6 @@ #include "tegra124-common.h" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define FDT_MODULE "apalis-v1.2" @@ -33,12 +32,6 @@ func(PXE, pxe, na) \ func(DHCP, dhcp, na) -#undef CONFIG_IPADDR -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#undef CONFIG_SERVERIP -#define CONFIG_SERVERIP 192.168.10.1 - #define DFU_ALT_EMMC_INFO "apalis-tk1.img raw 0x0 0x500 mmcpart 1; " \ "boot part 0 1 mmcpart 0; " \ "rootfs part 0 2 mmcpart 0; " \ diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index a3c86545f0..07587c7609 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -28,19 +28,11 @@ /* Host */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -/* Client */ -#define CONFIG_USBD_HS /* Framebuffer and LCD */ /* Command definition */ -#undef CONFIG_IPADDR -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#undef CONFIG_SERVERIP -#define CONFIG_SERVERIP 192.168.10.1 - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 4f00b3bad3..80204d706d 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -20,7 +20,6 @@ * Apalis UART3: NVIDIA UARTB * Apalis UART4: NVIDIA UARTC */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define UBOOT_UPDATE \ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 6faf544d21..8541354571 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -11,8 +11,6 @@ #ifndef __ARISTAINETOS2_CONFIG_H #define __ARISTAINETOS2_CONFIG_H -#define CONFIG_HOSTNAME "aristainetos2" - #if (CONFIG_SYS_BOARD_VERSION == 5) #define CONSOLE_DEV "ttymxc1" #elif (CONFIG_SYS_BOARD_VERSION == 6) diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 62aa99342a..6aef3bd86f 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -38,16 +38,6 @@ #error No card type defined! #endif -/* - * CONFIG_RAM defines if u-boot is loaded via BDM (or started from - * a different bootloader that has already performed RAM setup) or - * started directly from flash, which is the regular case for production - * boards. - */ -#ifdef CONFIG_RAM -#define CONFIG_MONITOR_IS_IN_RAM -#endif - /* I2C */ /* @@ -69,21 +59,6 @@ #define CFG_SYS_UART_PORT (2) #define CFG_SYS_UART2_ALT3_GPIO -/* - * Configuration for environment - * Environment is located in the last sector of the flash - */ - -#ifndef CONFIG_MONITOR_IS_IN_RAM -#else -/* - * environment in RAM - This is used to use a single PC-based application - * to load an image, load U-Boot, load an environment and then start U-Boot - * to execute the commands from the environment. Feedback is done via setting - * and reading memory locations. - */ -#endif - /* here we put our FPGA configuration... */ /* Define user parameters that have to be customized most likely */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 56247e390b..39f6ff8a72 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -34,13 +34,6 @@ #endif -/* Ethernet */ -#define CONFIG_DM9000_BASE 0x30000000 -#define DM9000_IO CONFIG_DM9000_BASE -#define DM9000_DATA (CONFIG_DM9000_BASE + 4) -#define CONFIG_DM9000_USE_16BIT -#define CONFIG_DM9000_NO_SROM - /* USB */ #define CFG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 03e04e6e68..d70f038230 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -49,9 +49,6 @@ */ #define CFG_SYS_FLASH_BANKS_SIZES {0x4000000} -/* max number of sectors on one chip */ -#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2) - /* environments */ /* SPI FLASH */ diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index b5469880fe..fc176dc201 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -9,8 +9,6 @@ #include <linux/sizes.h> -#define CONFIG_HOSTNAME "NS3" - /* Physical Memory Map */ #define V2M_BASE 0x80000000 #define PHYS_SDRAM_1 V2M_BASE diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 6b5f650811..7e0e477960 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -10,20 +10,12 @@ #include "tegra30-common.h" -/* VDD core PMIC */ -#define CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 - /* High-level configuration options */ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Beaver" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* SPI */ -#define CONFIG_TEGRA_SLINK_CTRLS 6 -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/blanche.h b/include/configs/blanche.h index cb28ae28dd..d4e0f677e6 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -22,10 +22,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* FLASH */ -#if !defined(CONFIG_MTD_NOR_FLASH) -#define CONFIG_SH_QSPI_BASE 0xE6B10000 -#else -#define CONFIG_FLASH_SHOW_PROGRESS 45 +#if defined(CONFIG_MTD_NOR_FLASH) #define CFG_SYS_FLASH_BASE 0x00000000 #define CFG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */ #define CFG_SYS_FLASH_BANKS_LIST { (CFG_SYS_FLASH_BASE) } diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index d35c7c4a59..984602c2cf 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -16,8 +16,6 @@ #define CFG_SYS_PL310_BASE L2_PL310_BASE #endif /* !CONFIG_SYS_L2CACHE_OFF */ -#define CONFIG_MXC_GPT_HCLK - /* MMC */ /* Boot */ @@ -80,9 +78,6 @@ BUR_COMMON_ENV \ #define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE -/* Ethernet */ -#define CONFIG_FEC_FIXED_SPEED _1000BASET - /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 35c5a4f122..64d713a196 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -10,9 +10,6 @@ #include "tegra30-common.h" -/* VDD core PMIC */ -#define CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 - /* High-level configuration options */ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Cardhu" @@ -21,13 +18,8 @@ "fdtfile=tegra30-cardhu-a04.dtb\0" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* SPI */ -#define CONFIG_TEGRA_SLINK_CTRLS 6 -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index 55e2d744c4..e49eb60208 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -19,12 +19,8 @@ #define CONFIG_TEGRA_BOARD_STRING "CEI tk1-som" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 3329c24fa6..446d5c4f3d 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -17,11 +17,4 @@ /* NS16550-ish UARTs */ #define CFG_SYS_NS16550_CLK 48000000 -/* Ethernet: davicom DM9000 */ -#define CONFIG_DM9000_BASE 0xb6000000 -#define DM9000_IO CONFIG_DM9000_BASE -#define DM9000_DATA (CONFIG_DM9000_BASE + 2) - -/* Miscellaneous configuration options */ - #endif /* __CONFIG_CI20_H__ */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index fcc17fc6b7..8a18d6f97a 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -36,8 +36,6 @@ * we don't need to do it twice. */ -#define CONFIG_HSMMC2_8BIT - #include <configs/ti_armv7_omap.h> #define V_OSCK 24000000 /* Clock output from T2 */ diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 6d6e2fc696..cd50ffe98d 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -43,27 +43,6 @@ #define CFG_SYS_UART_PORT (0) /* --- - * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different - * bootloader residing in flash ('chainloading'); if you want to use - * chainloading or want to compile a u-boot binary that can be loaded into - * RAM via BDM set - * "#if 0" to "#if 1" - * You will need a first stage bootloader then, e. g. colilo or a working BDM - * cable (Background Debug Mode) - * - * Setting #if 0: u-boot will start from flash and relocate itself to RAM - * - * Please do not forget to modify the setting of CONFIG_TEXT_BASE - * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000) - * - * --- - */ - -#if 0 -#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */ -#endif - -/* --- * Configuration for environment * Environment is embedded in u-boot in the second sector of the flash * --- @@ -91,9 +70,6 @@ enter a valid image address in flash */ /* User network settings */ -#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */ -#define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */ - #endif /*---*/ diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index c0c3b4e035..6f3524deb5 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -20,10 +20,6 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 #define CFG_SYS_FSL_USDHC_NUM 1 -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SERVERIP 192.168.10.1 - #if defined(CONFIG_TARGET_COLIBRI_IMX6ULL_EMMC) #define UBOOT_UPDATE \ "uboot_hwpart=1\0" \ @@ -130,8 +126,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USBD_HS - /* USB Device Firmware Update support */ #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 6002d8d5c9..215c633a4c 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -14,10 +14,6 @@ #define USDHC1_BASE_ADDR 0x5b010000 #define USDHC2_BASE_ADDR 0x5b020000 -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SERVERIP 192.168.10.1 - #define MEM_LAYOUT_ENV_SETTINGS \ "fdt_addr_r=0x83000000\0" \ "kernel_addr_r=0x81000000\0" \ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 60a3862a4d..4e51df123a 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -25,17 +25,9 @@ /* Host */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -/* Client */ -#define CONFIG_USBD_HS /* Command definition */ -#undef CONFIG_IPADDR -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#undef CONFIG_SERVERIP -#define CONFIG_SERVERIP 192.168.10.1 - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 32a79b0255..89546b857f 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -21,10 +21,6 @@ #define CFG_SYS_FSL_USDHC_NUM 2 #endif -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SERVERIP 192.168.10.1 - #if defined(CONFIG_TARGET_COLIBRI_IMX7_EMMC) #define UBOOT_UPDATE \ "uboot_hwpart=1\0" \ @@ -174,6 +170,4 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USBD_HS - #endif diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 2ba3c3bc87..ea7d648eb6 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -11,8 +11,6 @@ #include "tegra20-common.h" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_TEGRA_UARTA_SDIO1 #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* NAND support */ diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index ffed71a2e8..7edb2c0b26 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -21,7 +21,6 @@ * Colibri UART-B: NVIDIA UARTD * Colibri UART-C: NVIDIA UARTB */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define UBOOT_UPDATE \ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index fa778ec9e2..e8918df69e 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -14,14 +14,6 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -/* NAND support */ - -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SERVERIP 192.168.10.1 - -#define CONFIG_FDTADDR 0x84000000 - #define MEM_LAYOUT_ENV_SETTINGS \ "bootm_size=0x10000000\0" \ "fdt_addr_r=0x82000000\0" \ diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h index 823d37fc38..e9b85b4e1c 100644 --- a/include/configs/conga-qeval20-qa3-e3845.h +++ b/include/configs/conga-qeval20-qa3-e3845.h @@ -17,7 +17,6 @@ "stderr=serial\0" #define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 5da2778b67..119a834fe7 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -21,9 +21,6 @@ * Environment Configuration */ -#define CONFIG_HOSTNAME "ccdc" -#define CONFIG_ROOTPATH "/opt/nfsroot" - #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth1\0" \ "consoledev=ttyS1\0" \ diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 24cf554649..c9009e3962 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -14,14 +14,10 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Dalmore" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 46410595c2..e3621fd6f9 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -16,17 +16,6 @@ #include <configs/ti_omap3_common.h> -/* Hardware drivers */ -/* DM9000 */ -#define CONFIG_DM9000_BASE 0x2c000000 -#define DM9000_IO CONFIG_DM9000_BASE -#define DM9000_DATA (CONFIG_DM9000_BASE + 0x400) -#define CONFIG_DM9000_USE_16BIT 1 -#define CONFIG_DM9000_NO_SROM 1 -#undef CONFIG_DM9000_DEBUG - -/* TWL4030 */ - /* BOOTP/DHCP options */ #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h index 52f2d50118..154c4f4f13 100644 --- a/include/configs/dfi-bt700.h +++ b/include/configs/dfi-bt700.h @@ -21,7 +21,6 @@ "stderr=serial\0" #define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index f9b3d19480..3aed6299ed 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -38,10 +38,6 @@ /* USB Gadget (DFU, UMS) */ #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE) #define DFU_DEFAULT_POLL_TIMEOUT 300 - -/* USB IDs */ -#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 #endif #endif diff --git a/include/configs/display5.h b/include/configs/display5.h index 7636d2869a..4401515a65 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -36,9 +36,6 @@ #define CONFIG_MXC_UART_BASE UART5_BASE -/* I2C Configs */ -#define CONFIG_I2C_MULTI_BUS - /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR 0 #define CFG_SYS_FSL_USDHC_NUM 2 @@ -279,8 +276,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_STANDALONE_LOAD_ADDR 0x10001000 - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/dns325.h b/include/configs/dns325.h index 015bc78648..1bfb741346 100644 --- a/include/configs/dns325.h +++ b/include/configs/dns325.h @@ -17,13 +17,6 @@ /* Remove or override few declarations from mv-common.h */ /* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#endif - -/* * Enable GPI0 support */ diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h index 33ae7d654b..a6c1e9c6d0 100644 --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h @@ -28,10 +28,4 @@ "initrd=/boot/uInitrd\0" \ "bootargs_root=ubi.mtd=1 root=ubi0:root rootfstype=ubifs ro\0" -/* - * Ethernet Driver configuration - */ -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 - #endif /* _CONFIG_DOCKSTAR_H */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index ac3fcacc68..f8afcc7826 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -13,7 +13,6 @@ #include <environment/ti/dfu.h> -#define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED 0x80000000 #ifndef CONFIG_QSPI_BOOT @@ -48,9 +47,6 @@ #include <configs/ti_omap5_common.h> -/* Enhance our eMMC support / experience. */ -#define CONFIG_HSMMC2_8BIT - /* * Default to using SPI for environment, etc. * 0x000000 - 0x040000 : QSPI.SPL (256KiB) diff --git a/include/configs/draak.h b/include/configs/draak.h index 8140bc469c..946f1d9646 100644 --- a/include/configs/draak.h +++ b/include/configs/draak.h @@ -13,7 +13,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CFG_SYS_FLASH_BANKS_LIST { 0x08000000 } #define CFG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index fbd83d629c..98322a54f6 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -24,10 +24,4 @@ "x_bootargs=console=ttyS0,115200\0" \ "x_bootargs_root=root=/dev/sda2 rootdelay=10\0" -/* - * Ethernet Driver configuration - */ -#define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ -#define CONFIG_PHY_BASE_ADR 0 - #endif /* _CONFIG_DREAMPLUG_H */ diff --git a/include/configs/ds109.h b/include/configs/ds109.h index 8553ea0b95..8e7a86e062 100644 --- a/include/configs/ds109.h +++ b/include/configs/ds109.h @@ -35,12 +35,4 @@ "ipaddr=192.168.1.5\0" \ "usb0Mode=host\0" -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable one port */ -#define CONFIG_PHY_BASE_ADR 8 -#endif /* CONFIG_CMD_NET */ - #endif /* _CONFIG_DS109_H */ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 21eab9b3a4..26e4ade34e 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -14,8 +14,6 @@ #define CFG_SYS_UART_PORT (0) -#undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */ - /*----------------------------------------------------------------------* * Options * *----------------------------------------------------------------------*/ @@ -44,10 +42,6 @@ * Network * *----------------------------------------------------------------------*/ -#ifdef CONFIG_MCFFEC -#define CONFIG_OVERWRITE_ETHADDR_ONCE -#endif - /*------------------------------------------------------------------------- * Low Level Configuration Settings * (address mappings, register initial values, etc.) @@ -84,7 +78,6 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CFG_SYS_FLASH_BASE CFG_SYS_CS0_BASE #define CFG_SYS_INT_FLASH_BASE 0xF0000000 @@ -145,13 +138,5 @@ #define CFG_SYS_DDRUA 0x05 #define CFG_SYS_PJPAR 0xFF -/*----------------------------------------------------------------------- - * I2C - */ - -#ifdef CONFIG_CMD_DATE -#define CONFIG_I2C_RTC_ADDR 0x68 -#endif - #endif /* _CONFIG_M5282EVB_H */ /*---------------------------------------------------------------------*/ diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h index d1882a9646..ad5944230a 100644 --- a/include/configs/ebisu.h +++ b/include/configs/ebisu.h @@ -15,7 +15,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CFG_SYS_FLASH_BANKS_LIST { 0x08000000 } #define CFG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/efi-x86_app.h b/include/configs/efi-x86_app.h index 6061a6db0a..17a7851402 100644 --- a/include/configs/efi-x86_app.h +++ b/include/configs/efi-x86_app.h @@ -8,8 +8,6 @@ #include <configs/x86-common.h> -#undef CONFIG_TPM_TIS_BASE_ADDRESS - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=vidconsole\0" \ "stderr=vidconsole\0" diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 22e0fa5aab..1742b1192f 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -35,11 +35,11 @@ #if defined(CONFIG_ENV_IS_IN_MMC) /* RiOTboard */ -#define CONFIG_FDTFILE "imx6dl-riotboard.dtb" +#define FDTFILE "imx6dl-riotboard.dtb" #define CFG_SYS_FSL_USDHC_NUM 3 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) /* MarSBoard */ -#define CONFIG_FDTFILE "imx6q-marsboard.dtb" +#define FDTFILE "imx6q-marsboard.dtb" #define CFG_SYS_FSL_USDHC_NUM 2 #endif @@ -79,7 +79,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ - "fdtfile=" CONFIG_FDTFILE "\0" \ + "fdtfile=" FDTFILE "\0" \ "finduuid=part uuid mmc 0:1 uuid\0" \ BOOTENV diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 6647148c96..811c7cb961 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -127,16 +127,6 @@ "bootm ${kloadaddr} - ${loadaddr}\0" \ COMMON_ENV_NAND_CMDS -#ifndef CONFIG_SPL_BUILD - -#define CONFIG_NAND_CS_INIT -#define ETAMIN_NAND_GPMC_CONFIG1 0x00000800 -#define ETAMIN_NAND_GPMC_CONFIG2 0x001e1e00 -#define ETAMIN_NAND_GPMC_CONFIG3 0x001e1e00 -#define ETAMIN_NAND_GPMC_CONFIG4 0x16051807 -#define ETAMIN_NAND_GPMC_CONFIG5 0x00151e1e -#define ETAMIN_NAND_GPMC_CONFIG6 0x16000f80 - /* Default env settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hostname=etamin\0" \ @@ -147,5 +137,5 @@ CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ CONFIG_ENV_SETTINGS_V2 \ CONFIG_ENV_SETTINGS_NAND_V2 -#endif /* CONFIG_SPL_BUILD */ + #endif /* ! __CONFIG_ETAMIN_H */ diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 52eb0be676..3fd58d6bd4 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -49,7 +49,6 @@ /* Ethernet */ #define CONFIG_PHY_ID 0 -#define CONFIG_MACB_SEARCH_PHY /* MMC */ #ifdef CONFIG_CMD_MMC diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 81f450cde6..e8c182bc2f 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -10,17 +10,8 @@ #include "exynos-common.h" -/* SD/MMC configuration */ -#define CONFIG_MMC_DEFAULT_DEV 0 - #define DFU_DEFAULT_POLL_TIMEOUT 300 -/* USB Samsung's IDs */ -#define CONFIG_G_DNL_THOR_VENDOR_NUM 0x04E8 -#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D -#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 - /* Common environment variables */ #define ENV_ITB \ "loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kerneladdr} " \ diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index dd322c2b3a..8e277ce7ff 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -27,8 +27,6 @@ /* MMC SPL */ #define COPY_BL2_FNPTR_ADDR 0x02020030 -#define CONFIG_RD_LVL - #define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE #define PHYS_SDRAM_2 (CFG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) @@ -58,7 +56,6 @@ /* USB */ /* USB boot mode */ -#define CONFIG_USB_BOOTING #define EXYNOS_COPY_USB_FNPTR_ADDR 0x02020070 #define EXYNOS_USB_SECONDARY_BOOT 0xfeed0002 #define EXYNOS_IRAM_SECONDARY_BASE 0x02020018 diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h index c9e0c13172..8f2dac61cb 100644 --- a/include/configs/exynos5-dt-common.h +++ b/include/configs/exynos5-dt-common.h @@ -17,6 +17,5 @@ #define CFG_SYS_SPI_BASE 0x12D30000 #define FLASH_SIZE (4 << 20) -#define CONFIG_SPI_BOOTING #endif diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index 7a9307ccc3..934a4ef9d1 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -8,8 +8,6 @@ #ifndef __CONFIG_EXYNOS5420_H #define __CONFIG_EXYNOS5420_H -#define CONFIG_VAR_SIZE_SPL - #define CONFIG_IRAM_TOP 0x02074000 #define CONFIG_PHY_IRAM_BASE 0x02020000 diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index cff910c1bd..e22dd036cc 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -15,10 +15,6 @@ /* select serial console configuration */ -/* IRAM Layout */ -#define CONFIG_IRAM_BASE 0x02100000 -#define CONFIG_IRAM_SIZE 0x58000 -#define CONFIG_IRAM_END (CONFIG_IRAM_BASE + CONFIG_IRAM_SIZE) #define CPU_RELEASE_ADDR secondary_boot_addr /* select serial console configuration */ diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index 36dcee87c5..671b75e698 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -55,10 +55,6 @@ * Environment Configuration */ -/* TODO: Turn into string option and migrate to Kconfig */ -#define CONFIG_HOSTNAME "gazerbeam" -#define CONFIG_ROOTPATH "/opt/nfsroot" - #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS1\0" \ diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index 1458b187de..1aaa3e67d6 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -26,7 +26,6 @@ /* USB */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USBD_HS /* Memory */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h index 66eed9e14f..1c86dcb1f6 100644 --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h @@ -36,10 +36,4 @@ "kernel=/boot/uImage\0" \ "bootargs_root=ubi.mtd=root root=ubi0:root rootfstype=ubifs ro\0" -/* - * Ethernet Driver configuration - */ -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 - #endif /* _CONFIG_GOFLEXHOME_H */ diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h index 4954c5ca08..d196c4eda5 100644 --- a/include/configs/guruplug.h +++ b/include/configs/guruplug.h @@ -30,12 +30,4 @@ "fdt=/boot/guruplug-server-plus.dtb\0" \ "bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs rw\0" -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ -#define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ - #endif /* _CONFIG_GURUPLUG_H */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 4d0a78c626..5a78c68e2f 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -38,7 +38,6 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USBD_HS /* Miscellaneous configurable options */ @@ -57,7 +56,5 @@ /* Persistent Environment Config */ /* Environment */ -#define CONFIG_IPADDR 192.168.1.1 -#define CONFIG_SERVERIP 192.168.1.146 #endif /* __CONFIG_H */ diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 211dab4d23..a1a66bfb64 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -14,7 +14,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Harmony" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: keyboard satellite board UART, default */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index 05192218d2..76fc4ac8b6 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -25,14 +25,6 @@ "bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs rw\0" /* - * Ethernet driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ - -/* * SATA driver configuration */ #ifdef CONFIG_IDE diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index f2e3608d3a..6d2104b3a1 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -16,14 +16,4 @@ "kernel=/boot/uImage\0" \ "bootargs_root=noinitrd ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0" -/* - * Ethernet driver configuration - * - * This board has PCIe Wifi card, so allow Ethernet to be disabled - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 11 -#endif /* CONFIG_CMD_NET */ - #endif /* _CONFIG_ICONNECT_H */ diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index 76771fd66c..8e9dbefc49 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -81,6 +81,4 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_USBD_HS - #endif /* __CONFIG_H */ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 738677ff37..137bd3b095 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -12,14 +12,6 @@ #define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#ifdef CONFIG_SPL_BUILD -/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ - - -#define CONFIG_POWER_PCA9450 - -#endif - #if defined(CONFIG_CMD_NET) #define CONFIG_FEC_MXC_PHYADDR 1 diff --git a/include/configs/imx8mp_icore_mx8mp.h b/include/configs/imx8mp_icore_mx8mp.h index d67bad8971..b261a81e44 100644 --- a/include/configs/imx8mp_icore_mx8mp.h +++ b/include/configs/imx8mp_icore_mx8mp.h @@ -13,13 +13,6 @@ #define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#ifdef CONFIG_SPL_BUILD -/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ - -#define CONFIG_POWER_PCA9450 - -#endif - #if defined(CONFIG_CMD_NET) #define CONFIG_FEC_MXC_PHYADDR 1 diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 25bb41ebc4..596e4ff8c3 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -19,9 +19,6 @@ /* Integrator CP-specific configuration */ #define CFG_SYS_HZ_CLOCK 1000000 /* Timer 1 is clocked at 1Mhz */ -#define CONFIG_SERVERIP 192.168.1.100 -#define CONFIG_IPADDR 192.168.1.104 - /* * Miscellaneous configurable options */ diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index b846889541..aa9e1d811a 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -15,14 +15,8 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -/* Environment in eMMC, at the end of 2nd "boot sector" */ - -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h index bbc58be511..1283f450b3 100644 --- a/include/configs/k2e_evm.h +++ b/include/configs/k2e_evm.h @@ -37,8 +37,6 @@ #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS /* Network */ -#define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 9 -#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE #endif /* __CONFIG_K2E_EVM_H */ diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index bb91751d5d..fd3708ba81 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -51,9 +51,7 @@ "name_fs=arago-base-tisdk-image-k2g-evm.cpio\0" /* Network */ -#define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 2 -#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE #define PHY_ANEG_TIMEOUT 10000 /* PHY needs longer aneg time */ #define SPI_MTD_PARTS KEYSTONE_SPI1_MTD_PARTS diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h index 68cbe98b55..36e3c59d1c 100644 --- a/include/configs/k2hk_evm.h +++ b/include/configs/k2hk_evm.h @@ -37,7 +37,6 @@ #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS /* Network */ -#define CONFIG_KSNET_NETCP_V1_0 #define CONFIG_KSNET_CPSW_NUM_PORTS 5 #endif /* __CONFIG_K2HK_EVM_H */ diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h index a18158a7eb..cb7b036781 100644 --- a/include/configs/k2l_evm.h +++ b/include/configs/k2l_evm.h @@ -37,8 +37,6 @@ #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS /* Network */ -#define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 5 -#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE #endif /* __CONFIG_K2L_EVM_H */ diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index 1f03f95ace..c939caf2a1 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -58,8 +58,3 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CFG_SYS_BOOTMAPSZ (8 << 20) - -/* - * QE UEC ethernet configuration - */ -#define CONFIG_UEC_ETH diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 7fe2ece840..ffd394691a 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -58,8 +58,6 @@ FTIM2_NOR_TWP(0xb)) #define CFG_SYS_NOR_FTIM3 0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE_PHYS } #define CFG_SYS_WRITE_SWAPPED_DATA @@ -151,7 +149,6 @@ * I2C */ -#define CONFIG_I2C_MULTI_BUS #define CFG_SYS_I2C_MAX_HOPS 1 #define CFG_SYS_NUM_I2C_BUSES 3 #define I2C_MUX_PCA_ADDR 0x70 diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 532370e918..80bff4b893 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -149,7 +149,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index 6fcacdb0c6..7c5f673c0f 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -23,7 +23,6 @@ /* Board and environment settings */ #define CONFIG_MXC_UART_BASE UART4_BASE -#define CONFIG_HOSTNAME "kontron-mx6ul" #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index 80a3230460..beb1926c12 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -23,7 +23,6 @@ #define CFG_SYS_INIT_RAM_SIZE 0x200000 /* Board and environment settings */ -#define CONFIG_HOSTNAME "kontron-mx8mm" #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 9c3174d0e0..a073a06c82 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -15,10 +15,6 @@ #undef CFG_SYS_MEM_RESERVE_SECURE #endif -/* DDR */ -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef - -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index 828f910963..7a66df548a 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -15,13 +15,6 @@ */ /* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#endif - -/* * Enable GPI0 support */ diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index abe470fe89..794c1fcbed 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -48,7 +48,6 @@ * Linux Information */ #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) -#define CONFIG_SETUP_INITRD_TAG #define CONFIG_EXTRA_ENV_SETTINGS \ "bootenvfile=uEnv.txt\0" \ "fdtfile=da850-lego-ev3.dtb\0" \ diff --git a/include/configs/librem5.h b/include/configs/librem5.h index 11b3fa6c85..377e3e7b3f 100644 --- a/include/configs/librem5.h +++ b/include/configs/librem5.h @@ -27,8 +27,6 @@ #define CFG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_USBD_HS - #define CONSOLE_ON_UART1 #ifdef CONSOLE_ON_UART1 diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 179c5128e3..0e3ff3c5b7 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -68,7 +68,6 @@ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" -#define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index d6681e8598..76e75335c5 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -22,10 +22,6 @@ #define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - /* * IFC Definitions */ @@ -60,7 +56,6 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CFG_SYS_WRITE_SWAPPED_DATA #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS, \ @@ -247,7 +242,6 @@ * MMC */ -#define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 5612c60ae9..b15c4a238b 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -38,21 +38,6 @@ #define SDRAM_CFG2_FRC_SR 0x80000000 #define SDRAM_CFG_BI 0x00000001 -#ifdef CONFIG_SD_BOOT -#ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -#endif /* ifdef CONFIG_NXP_ESBC */ - -#ifdef CONFIG_U_BOOT_HDR_SIZE -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. Here u-boot max. size is 512K. So if binary - * size increases then increase this size in case of secure boot as - * it uses raw U-Boot image instead of FIT image. - */ -#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ -#endif - #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 3c4c207edd..9b22a2db21 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -37,25 +37,6 @@ #define SDRAM_CFG2_FRC_SR 0x80000000 #define SDRAM_CFG_BI 0x00000001 -#ifdef CONFIG_SD_BOOT -#ifdef CONFIG_NXP_ESBC -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. - */ -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -#endif /* ifdef CONFIG_NXP_ESBC */ - -#ifdef CONFIG_U_BOOT_HDR_SIZE -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. Here u-boot max. size is 512K. So if binary - * size increases then increase this size in case of secure boot as - * it uses raw u-boot image instead of fit image. - */ -#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ -#endif - #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) @@ -92,8 +73,6 @@ FTIM2_NOR_TWPH(0x0e)) #define CFG_SYS_NOR_FTIM3 0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE_PHYS } #define CFG_SYS_WRITE_SWAPPED_DATA @@ -154,7 +133,6 @@ /* GPIO */ -#define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index b190bfe9c8..2ccb20192d 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -12,7 +12,6 @@ /* Link Definitions */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index a3fa92d1ff..685e7e65d1 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -31,7 +31,6 @@ /* Link Definitions */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE @@ -42,37 +41,10 @@ /* Serial Port */ #define CFG_SYS_NS16550_CLK (get_serial_clock()) -/* SD boot SPL */ -#ifdef CONFIG_SD_BOOT -#ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. Here u-boot max. size is 512K. So if binary - * size increases then increase this size in case of secure boot as - * it uses raw u-boot image instead of fit image. - */ -#endif /* ifdef CONFIG_NXP_ESBC */ -#endif - /* NAND SPL */ #ifdef CONFIG_NAND_BOOT #define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE #define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE - -#ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -#endif /* ifdef CONFIG_NXP_ESBC */ - -#ifdef CONFIG_U_BOOT_HDR_SIZE -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. Here u-boot max. size is 512K. So if binary - * size increases then increase this size in case of secure boot as - * it uses raw u-boot image instead of fit image. - */ -#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ - #endif /* GPIO */ @@ -90,10 +62,6 @@ #define CFG_SYS_FLASH_BASE 0x60000000 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE #define CFG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 - -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#endif #endif #endif diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index dab57382ed..7ccbb20bf2 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -12,10 +12,6 @@ #define SPD_EEPROM_ADDRESS 0x51 -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - #ifdef CONFIG_SYS_DPAA_FMAN #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 @@ -107,7 +103,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #endif #ifdef CONFIG_NAND_BOOT diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 12c4853ea9..c8a6f0146a 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -9,12 +9,6 @@ #include "ls1043a_common.h" -/* Physical Memory Map */ - -#ifndef CONFIG_SPL -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - /* * NOR Flash Definitions */ @@ -82,7 +76,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #ifdef CONFIG_NAND_BOOT #define CFG_SYS_NAND_U_BOOT_SIZE (1024 << 10) diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 4ed5481c3e..ae9dc0c73b 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -31,7 +31,6 @@ /* Link Definitions */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE @@ -42,19 +41,6 @@ /* Serial Port */ #define CFG_SYS_NS16550_CLK (get_serial_clock()) -/* SD boot SPL */ -#ifdef CONFIG_SD_BOOT -#ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. Here u-boot max. size is 512K. So if binary - * size increases then increase this size in case of secure boot as - * it uses raw u-boot image instead of fit image. - */ -#endif /* ifdef CONFIG_NXP_ESBC */ -#endif - /* NAND SPL */ #ifdef CONFIG_NAND_BOOT #define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 1759d25f3a..5e03a962d1 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -45,7 +45,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE /* IFC Timing Params */ #define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 553ae841ca..4b4bd7cbe4 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -12,10 +12,6 @@ #define SPD_EEPROM_ADDRESS 0x51 -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - #ifdef CONFIG_SYS_DPAA_FMAN #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 @@ -41,10 +37,6 @@ #define CFG_SYS_FLASH_BASE 0x60000000 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE #define CFG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 - -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#endif #endif /* LPUART */ @@ -127,7 +119,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #endif #ifdef CONFIG_NAND_BOOT diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index f3904e7b3f..0e42a51fc5 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -13,8 +13,6 @@ #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef - #if defined(CONFIG_QSPI_BOOT) #define CFG_SYS_UBOOT_BASE 0x40100000 #endif @@ -50,7 +48,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE /* * CPLD diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 57429d4bbe..86c5d48c0d 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -29,7 +29,6 @@ /* Link Definitions */ #define CFG_SYS_FSL_QSPI_BASE 0x20000000 -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE @@ -134,17 +133,4 @@ unsigned long long get_qixis_addr(void); " 0x580e00000 \0" #endif -#ifdef CONFIG_SPL -#ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. Here u-boot max. size is 512K. So if binary - * size increases then increase this size in case of secure boot as - * it uses raw u-boot image instead of fit image. - */ -#endif /* ifdef CONFIG_NXP_ESBC */ - -#endif - #endif /* __LS1088_COMMON_H */ diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index a35045d640..3391540c6e 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -14,7 +14,6 @@ #define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS 0x51 @@ -62,8 +61,6 @@ #define CFG_SYS_IFC_CCR 0x01000000 #ifndef SYS_NO_FLASH -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE,\ CFG_SYS_FLASH_BASE + 0x40000000} #endif @@ -99,7 +96,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #define CFG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_LBMAP_SWITCH 6 diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 7bc4fc6a66..1ddf0687f4 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -15,7 +15,6 @@ #define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */ -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS 0x51 @@ -47,8 +46,6 @@ #define CFG_SYS_IFC_CCR 0x01000000 #ifndef SYS_NO_FLASH -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE } #endif #endif @@ -83,7 +80,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #define CFG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_BRDCFG4_OFFSET 0x54 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index e82456fd81..bd78bdb793 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -16,7 +16,6 @@ /* Link Definitions */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 924d4057d9..4a52fcdfdd 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -16,7 +16,6 @@ #define CFG_SYS_I2C_FPGA_ADDR 0x66 #define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define SPD_EEPROM_ADDRESS3 0x53 @@ -64,8 +63,6 @@ #define CFG_SYS_IFC_CCR 0x01000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE,\ CFG_SYS_FLASH_BASE + 0x40000000} #endif @@ -100,7 +97,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #define QIXIS_LBMAP_SWITCH 0x06 #define QIXIS_LBMAP_MASK 0x0f diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index c50b603068..b8ab501c98 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -21,7 +21,6 @@ #define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define SPD_EEPROM_ADDRESS3 0x53 @@ -61,8 +60,6 @@ #define CFG_SYS_IFC_CCR 0x01000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE,\ CFG_SYS_FLASH_BASE + 0x40000000} #endif @@ -97,7 +94,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #define QIXIS_LBMAP_SWITCH 0x06 #define QIXIS_LBMAP_MASK 0x0f diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index a469c83fa4..c1a98fd3e4 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -13,13 +13,11 @@ #define CFG_SYS_FLASH_BASE 0x20000000 /* DDR */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL #define CFG_SYS_SDRAM_SIZE 0x200000000UL #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define SPD_EEPROM_ADDRESS3 0x53 diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 66591390d9..d42ad9acb4 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -48,7 +48,6 @@ #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR #define CFG_SYS_NAND_LARGEPAGE -#define CONFIG_MXC_NAND_HWECC #endif /* @@ -84,7 +83,6 @@ /* * Extra Environments */ -#define CONFIG_HOSTNAME "m53menlo" #define CONFIG_EXTRA_ENV_SETTINGS \ "consdev=ttymxc0\0" \ diff --git a/include/configs/malta.h b/include/configs/malta.h index 65f4b05649..c17a4a4a8e 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -9,9 +9,6 @@ /* * System configuration */ -#define CONFIG_MALTA - -#define CONFIG_MEMSIZE_IN_BYTES /* * CPU Configuration diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 7c401a2cfd..a7f5507692 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -25,7 +25,6 @@ /* NOR 16-bit mode */ #define CFG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR -#define CONFIG_FLASH_VERIFY /* NOR Flash MTD */ #define CFG_SYS_FLASH_BANKS_LIST { (CFG_SYS_FLASH_BASE) } diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index a8d8d8b09e..efac0febdf 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 6331b7615d..a22f7a81b0 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -18,7 +18,7 @@ /* Serial drivers */ /* The following table includes the supported baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, \ 230400, 250000, 460800, 500000, 1000000, 2000000, 4000000, \ 8000000 } diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index edd2466caa..b8b08974c7 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -16,8 +16,6 @@ # define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} -#define CONFIG_HOSTNAME "microblaze-generic" - /* architecture dependent code */ #if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP) #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na) diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h index 3def93d61e..c73c5a1d9f 100644 --- a/include/configs/microchip_mpfs_icicle.h +++ b/include/configs/microchip_mpfs_icicle.h @@ -11,8 +11,6 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 - /* Environment options */ #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 50c52f8839..6c15c72efd 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -18,6 +18,5 @@ "usb_pgood_delay=40\0" #define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO #endif /* __CONFIG_H */ diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h index 7c8c67f446..b6e680bcc7 100644 --- a/include/configs/mt7621.h +++ b/include/configs/mt7621.h @@ -10,7 +10,6 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED 0x1c000000 #define CFG_SYS_INIT_SP_OFFSET 0x800000 diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index 8c297266d8..6541512953 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -18,7 +18,5 @@ #define CFG_SYS_SDRAM_BASE 0x40000000 /* Ethernet */ -#define CONFIG_IPADDR 192.168.1.1 -#define CONFIG_SERVERIP 192.168.1.3 #endif diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 39a7ba7663..93161bd24f 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -33,8 +33,6 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" /* Ethernet */ -#define CONFIG_IPADDR 192.168.1.1 -#define CONFIG_SERVERIP 192.168.1.2 #ifdef CONFIG_DISTRO_DEFAULTS diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index bfa44aacc7..f6ab486fa2 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -15,10 +15,7 @@ /* Environment */ -/* Defines for SPL */ - -#define CONFIG_SPI_ADDR 0x30000000 -#define CFG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO) +#define CFG_SYS_UBOOT_BASE (0x30000000 + CONFIG_SPL_PAD_TO) /* SPL -> Uboot */ @@ -28,7 +25,5 @@ #define CFG_SYS_SDRAM_BASE 0x40000000 /* Ethernet */ -#define CONFIG_IPADDR 192.168.1.1 -#define CONFIG_SERVERIP 192.168.1.2 #endif diff --git a/include/configs/mvebu_alleycat-5.h b/include/configs/mvebu_alleycat-5.h index 5c9620371e..3ad3aefa75 100644 --- a/include/configs/mvebu_alleycat-5.h +++ b/include/configs/mvebu_alleycat-5.h @@ -15,11 +15,6 @@ 115200, 230400, 460800, 921600 } /* Default Env vars */ -#define CONFIG_IPADDR 0.0.0.0 /* In order to cause an error */ -#define CONFIG_SERVERIP 0.0.0.0 /* In order to cause an error */ -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_GATEWAYIP 0.0.0.0 -#define CONFIG_ROOTPATH "/srv/nfs/" /* Default Dir for NFS */ #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 245530aa64..dd8cabc2e9 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -16,7 +16,6 @@ #endif #endif -#define CONFIG_MXC_GPT_HCLK #include <linux/sizes.h> #include <asm/arch/imx-regs.h> diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 6294fd1e2c..96a48a97a3 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -145,6 +145,4 @@ /* Environment organization */ -#define CONFIG_USBD_HS - #endif /* __MX6QSABRE_COMMON_CONFIG_H */ diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index d5af699010..6e14b4fbf0 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -14,7 +14,6 @@ #include <asm/mach-imx/gpio.h> /* Timer settings */ -#define CONFIG_MXC_GPT_HCLK #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ /* Miscellaneous configurable options */ diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 6c165521f7..bd70b62bd2 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -101,6 +101,4 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_USBD_HS - #endif /* __CONFIG_H */ diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 30f27e7f0c..32e0e06617 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -86,9 +86,4 @@ #define CFG_SYS_NAND_BASE 0x60000000 #endif -/* SPI */ -#ifdef CONFIG_CMD_SPI -#define CONFIG_SPI_HALF_DUPLEX -#endif - #endif /* __CONFIGS_MXS_H__ */ diff --git a/include/configs/nas220.h b/include/configs/nas220.h index 1b7eb34334..85691ca94f 100644 --- a/include/configs/nas220.h +++ b/include/configs/nas220.h @@ -39,16 +39,4 @@ "bootargs=console=ttyS0,115200\0" \ "autostart=no\0" -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 8 -#endif /* CONFIG_CMD_NET */ - -/* - * EFI partition - */ - #endif /* _CONFIG_NAS220_H */ diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 5020b3bb71..1d101977c2 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -11,8 +11,6 @@ #include "mx6_common.h" -#define CONFIG_USBD_HS - #define CONFIG_MXC_UART_BASE UART2_BASE /* MMC Configs */ diff --git a/include/configs/novena.h b/include/configs/novena.h index 4e46dfc526..b0d473eeee 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -25,7 +25,6 @@ */ /* Booting Linux */ -#define CONFIG_HOSTNAME "novena" /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR @@ -34,9 +33,6 @@ #define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE -/* I2C */ -#define CONFIG_I2C_MULTI_BUS - /* I2C EEPROM */ /* MMC Configs */ @@ -59,8 +55,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -/* Gadget part */ -#define CONFIG_USBD_HS #endif /* Extra U-Boot environment. */ diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 09c4ddb664..2eebd0c9a4 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -18,8 +18,6 @@ /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -#define CONFIG_NETMASK 255.255.255.0 - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index 62f0701180..e2ad77072c 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -46,8 +46,4 @@ #endif /* CONFIG_SPL_BUILD */ -/* Ethernet driver configuration */ -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 1 - #endif /* _CONFIG_NSA310S_H */ diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index baa452156e..e885526e62 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -15,12 +15,8 @@ #define CONFIG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 5bbe7aadcb..bf63a4de07 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -20,14 +20,6 @@ #define DFU_DEFAULT_POLL_TIMEOUT 300 #define DFU_MANIFEST_POLL_TIMEOUT 25000 -/* THOR */ -#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_USB_GADGET_VENDOR_NUM -#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D - -/* UMS */ -#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 - #define CONFIG_DFU_ALT_SYSTEM \ "uImage fat 0 1;" \ "zImage fat 0 1;" \ diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index d7fa2d4391..39d0b40313 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -32,9 +32,6 @@ /* MMC ENV related defines */ -/* Enhance our eMMC support / experience. */ -#define CONFIG_HSMMC2_8BIT - /* Required support for the TCA642X GPIO we have on the uEVM */ #define CFG_SYS_I2C_TCA642X_BUS_NUM 4 #define CFG_SYS_I2C_TCA642X_ADDR 0x22 diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 788a111386..f19211fe64 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -109,7 +109,6 @@ #define CFG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CFG_SYS_NAND_MASK_CLE 0x10 #define CFG_SYS_NAND_MASK_ALE 0x8 -#define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC #define CFG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CFG_SYS_NAND_U_BOOT_DST 0xc1080000 #define CFG_SYS_NAND_U_BOOT_START CFG_SYS_NAND_U_BOOT_DST diff --git a/include/configs/openrd.h b/include/configs/openrd.h index 006f06e6af..2cec20ca42 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -33,26 +33,4 @@ "x_bootcmd_usb=usb start\0" \ "x_bootargs_root=root=ubi0:rootfs rootfstype=ubifs\0" -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -# ifdef CONFIG_BOARD_IS_OPENRD_BASE -# define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -# else -# define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ -# endif -# ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE -# define CONFIG_PHY_BASE_ADR 0x0 -# define PHY_NO "88E1121" -# else -# define CONFIG_PHY_BASE_ADR 0x8 -# define PHY_NO "88E1116" -# endif -#endif /* CONFIG_CMD_NET */ - -/* - * SATA Driver configuration - */ - #endif /* _CONFIG_OPENRD_BASE_H */ diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index e42a736136..459134b93f 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -11,7 +11,6 @@ #include "mx6_common.h" /* Miscellaneous configurable options */ -#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR /* Physical Memory Map */ #define CFG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR @@ -27,6 +26,4 @@ /* LCD */ #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR -#define CONFIG_ROOTPATH "/tftpboot/opos6ul-root" - #endif /* __OPOS6ULDEV_CONFIG_H */ diff --git a/include/configs/origen.h b/include/configs/origen.h index 6633d541a3..a608df44e8 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -38,10 +38,4 @@ "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ "source ${loadaddr}\0" -/* MIU (Memory Interleaving Unit) */ -#define CONFIG_MIU_2BIT_21_7_INTERLEAVED - -#define RESERVE_BLOCK_SIZE (512) -#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ - #endif /* __CONFIG_H */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 49c5aef305..c05904a813 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -109,11 +109,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE - #define CFG_SYS_CCSRBAR 0xffe00000 #define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR @@ -199,7 +194,6 @@ #define CONFIG_FLASH_OR_PRELIM 0xfc000ff7 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ /* Nand Flash */ #ifdef CONFIG_NAND_FSL_ELBC @@ -397,15 +391,12 @@ /* * Environment Configuration */ -#define CONFIG_HOSTNAME "unknown" -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #include "p1_p2_bootsrc.h" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ -"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ +"uboot=" CONFIG_UBOOTPATH "\0" \ "loadaddr=1000000\0" \ "bootfile=uImage\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ @@ -441,29 +432,4 @@ RST_PCIE_CMD(pciboot) \ RST_DEF_CMD(defboot) \ "" -#define CONFIG_USB_FAT_BOOT \ -"setenv bootargs root=/dev/ram rw " \ -"console=$consoledev,$baudrate $othbootargs " \ -"ramdisk_size=$ramdisk_size;" \ -"usb start;" \ -"fatload usb 0:2 $loadaddr $bootfile;" \ -"fatload usb 0:2 $fdtaddr $fdtfile;" \ -"fatload usb 0:2 $ramdiskaddr $ramdiskfile;" \ -"bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_USB_EXT2_BOOT \ -"setenv bootargs root=/dev/ram rw " \ -"console=$consoledev,$baudrate $othbootargs " \ -"ramdisk_size=$ramdisk_size;" \ -"usb start;" \ -"ext2load usb 0:4 $loadaddr $bootfile;" \ -"ext2load usb 0:4 $fdtaddr $fdtfile;" \ -"ext2load usb 0:4 $ramdiskaddr $ramdiskfile;" \ -"bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_NORBOOT \ -"setenv bootargs root=/dev/$jffs2nor rw " \ -"console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;" \ -"bootm $norbootaddr - $norfdtaddr" - #endif /* __CONFIG_H */ diff --git a/include/configs/p2371-0000.h b/include/configs/p2371-0000.h index ecd0405d29..f426889e1c 100644 --- a/include/configs/p2371-0000.h +++ b/include/configs/p2371-0000.h @@ -15,13 +15,9 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-0000" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA /* Environment in eMMC, at the end of 2nd "boot sector" */ -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* _P2371_0000_H */ diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index 7f942888e7..24adf4e13f 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -15,13 +15,9 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-2180" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA /* Environment in eMMC, at the end of 2nd "boot sector" */ -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* _P2371_2180_H */ diff --git a/include/configs/p2571.h b/include/configs/p2571.h index 50cddb4a4a..8a1e7d9b96 100644 --- a/include/configs/p2571.h +++ b/include/configs/p2571.h @@ -15,13 +15,9 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2571" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA /* Environment in eMMC, at the end of 2nd "boot sector" */ -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* _P2571_H */ diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h index ec1a8634e7..078d35dde2 100644 --- a/include/configs/p3450-0000.h +++ b/include/configs/p3450-0000.h @@ -14,7 +14,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA /* Only MMC/PXE/DHCP for now, add USB back in later when supported */ #define BOOT_TARGET_DEVICES(func) \ @@ -23,9 +22,6 @@ func(PXE, pxe, na) \ func(DHCP, dhcp, na) -/* Environment at end of QSPI, in the VER partition */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #define BOARD_EXTRA_ENV_SETTINGS \ "preboot=if test -e mmc 1:1 /u-boot-preboot.scr; then " \ "load mmc 1:1 ${scriptaddr} /u-boot-preboot.scr; " \ diff --git a/include/configs/paz00.h b/include/configs/paz00.h index a945f4e9b2..898167009f 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -16,7 +16,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Compal Paz00" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 11a833bb12..7a38382034 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -13,12 +13,6 @@ #define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#ifdef CONFIG_SPL_BUILD - -#define CONFIG_POWER_PCA9450 - -#endif - #define CONFIG_EXTRA_ENV_SETTINGS \ "image=Image\0" \ "console=ttymxc0,115200\0" \ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 8af8883fad..faf11d5a72 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -26,8 +26,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USBD_HS - #define DFU_DEFAULT_POLL_TIMEOUT 300 #define CONFIG_DFU_ENV_SETTINGS \ diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 99db59c489..1d8ac618c0 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Plutux" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 9fd897958a..fa08744b6f 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -159,11 +159,6 @@ /* PSRAM */ #define PHYS_PSRAM 0x70000000 #define PHYS_PSRAM_SIZE 0x00400000 /* 4MB */ -/* Slave EBI1, PSRAM connected */ -#define CONFIG_PSRAM_SCFG (AT91_MATRIX_SCFG_ARBT_FIXED_PRIORITY | \ - AT91_MATRIX_SCFG_FIXED_DEFMSTR(5) | \ - AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED | \ - AT91_MATRIX_SCFG_SLOT_CYCLE(255)) /* USB */ #define CFG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h index 085732214e..fc9f113dee 100644 --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h @@ -23,10 +23,4 @@ "bootcmd_usb=usb start; ext2load usb 0:1 0x00800000 /uImage; " \ "ext2load usb 0:1 0x01100000 /uInitrd\0" -/* - * Ethernet Driver configuration - */ -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 - #endif /* _CONFIG_POGO_E02_H */ diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h index b5ce2dd13d..239d33d8e9 100644 --- a/include/configs/pogo_v4.h +++ b/include/configs/pogo_v4.h @@ -69,10 +69,4 @@ BOOTENV #endif /* CONFIG_SPL_BUILD */ -/* - * Ethernet Driver configuration - */ -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 - #endif /* _CONFIG_POGO_V4_H */ diff --git a/include/configs/poleg.h b/include/configs/poleg.h index 518d7a3639..075729e5d3 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -14,9 +14,6 @@ #define CFG_SYS_SDRAM_BASE 0x0 /* Default environemnt variables */ -#define CONFIG_SERVERIP 192.168.0.1 -#define CONFIG_IPADDR 192.168.0.2 -#define CONFIG_NETMASK 255.255.255.0 #define CONFIG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80200000\0" \ "stdin=serial\0" \ "stdout=serial\0" \ diff --git a/include/configs/porter.h b/include/configs/porter.h index 88fa65e0ff..e0f77f358b 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -21,9 +21,6 @@ #define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024) #define RCAR_GEN2_UBOOT_SDRAM_SIZE (1024u * 1024 * 1024) -/* FLASH */ -#define CONFIG_SPI_FLASH_QUAD - /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 30a9eae852..20be4af462 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -29,7 +29,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE @@ -58,7 +57,5 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #endif /* __QEMU_PPCE500_H */ diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index 72f35cc054..35172da3ff 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -10,8 +10,6 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 - #define RISCV_MMODE_TIMERBASE 0x2000000 #define RISCV_MMODE_TIMER_FREQ 1000000 diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index e9cbd25382..86012adfb3 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -28,7 +28,6 @@ #define DRAM_RSV_SIZE 0x08000000 #define CFG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE) #define CFG_SYS_SDRAM_SIZE (0x80000000u - DRAM_RSV_SIZE) -#define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE) /* ENV setting */ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index e459581715..a721f27ec0 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -10,16 +10,6 @@ #define CONFIG_IRAM_BASE 0xff8c0000 -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT) -#else -/* BSS setup */ -#endif - -/* MMC/SD IP block */ -#define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000 - -/* RAW SD card / eMMC locations. */ - /* FAT sd card locations. */ #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf8000000 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index fdade1ee66..da83db1f68 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -24,13 +24,6 @@ /* USB Composite download gadget - g_dnl */ #define DFU_DEFAULT_POLL_TIMEOUT 300 -/* USB Samsung's IDs */ - -#define CONFIG_G_DNL_THOR_VENDOR_NUM 0x04E8 -#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D -#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 - /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ /* partitions definitions */ @@ -119,9 +112,6 @@ #define PHYS_SDRAM_3 0x50000000 /* mDDR DMC2 Bank #2 */ #define PHYS_SDRAM_3_SIZE (128 << 20) /* 128 MB in Bank #2 */ -/* FLASH and environment organization */ -#define CONFIG_MMC_DEFAULT_DEV 0 - #define CFG_SYS_ONENAND_BASE 0xB0000000 #endif /* __CONFIG_H */ diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index 2e422cd241..8dc6702de4 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -13,7 +13,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CFG_SYS_FLASH_BANKS_LIST { 0x08000000 } #define CFG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index f272fe9bf8..e5d672746b 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 19701ccce2..d7923967a7 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -21,10 +21,4 @@ "x_bootcmd_usb=usb start\0" \ "x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0" -/* - * Ethernet Driver configuration - */ -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 - #endif /* _CONFIG_SHEEVAPLUG_H */ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 5a001716fb..406a179842 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -17,8 +17,6 @@ /* commands to include */ -#define CONFIG_ROOTPATH "/opt/eldk" - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) @@ -72,9 +70,6 @@ * we don't need to do it twice. */ -/* USB DRACO ID as default */ -#define CONFIG_USBD_HS - /* USB Device Firmware Update support */ #define DFU_MANIFEST_POLL_TIMEOUT 25000 diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 5ad2124bdd..4a453a9df4 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -13,8 +13,6 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 - #define RISCV_MMODE_TIMERBASE 0x2000000 #define RISCV_MMODE_TIMER_FREQ 1000000 diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index f4b1a16019..ac42108620 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -13,8 +13,6 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 - /* Environment options */ #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/silk.h b/include/configs/silk.h index 58613effaf..6d605edf78 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -21,9 +21,6 @@ #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) -/* FLASH */ -#define CONFIG_SPI_FLASH_QUAD - /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 0392530c0a..0cb70762d9 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -12,8 +12,6 @@ #include <configs/exynos5-dt-common.h> #include <configs/exynos5-common.h> -#define CONFIG_SMDK5420 /* which is in a SMDK5420 */ - #define CFG_SYS_SDRAM_BASE 0x20000000 /* DRAM Memory Banks */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index af0c8200fc..38de1fa984 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -34,12 +34,6 @@ /* FLASH and environment organization */ -/* MIU (Memory Interleaving Unit) */ -#define CONFIG_MIU_2BIT_INTERLEAVED - -#define RESERVE_BLOCK_SIZE (512) -#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ - /* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET #define CONFIG_ENV_SROM_BANK 1 diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index bbbdea6664..088cd4d4f7 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -83,10 +83,6 @@ */ #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE) #define DFU_DEFAULT_POLL_TIMEOUT 300 - -/* USB IDs */ -#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 #endif /* diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index 432144cb40..caff0cf252 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -11,15 +11,9 @@ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */ /* Ethernet on SoC (EMAC) */ -#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII /* The PHY is autodetected, so no MII PHY address is needed here */ #define PHY_ANEG_TIMEOUT 8000 -/* Enable SPI NOR flash reset, needed for SPI booting */ -#define CONFIG_SPI_N25Q256A_RESET - -/* Environment setting for SPI flash */ - /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index 70d9f3607a..d88b07bc15 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -13,7 +13,6 @@ /* Booting Linux */ /* Extra Environment */ -#define CONFIG_HOSTNAME "socfpga_vining_fpga" /* * Active LOW GPIO buttons: diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 2a07671602..4c752091fb 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -16,9 +16,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* High Level Configuration Options */ -#define CONFIG_SOCRATES 1 - /* * Only possible on E500 Version 2 or newer cores. */ @@ -37,11 +34,6 @@ * in the README.mpc85xxads. */ -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ - #define CFG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ #undef CFG_SYS_DRAM_TEST /* memory test, takes time */ @@ -50,12 +42,8 @@ #define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR /* DDR Setup */ - -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE -#define CONFIG_VERY_BIG_RAM /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x50 /* CTLR 0 DIMM 0 */ diff --git a/include/configs/som-db5800-som-6867.h b/include/configs/som-db5800-som-6867.h index ee038d83bc..f097092136 100644 --- a/include/configs/som-db5800-som-6867.h +++ b/include/configs/som-db5800-som-6867.h @@ -17,6 +17,5 @@ "stderr=serial,vidconsole\0" #define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO #endif /* __CONFIG_H */ diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index c9cfadd9ce..9715dfad1c 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -24,9 +24,6 @@ /* NAND support */ /* Ethernet need */ -#ifdef CONFIG_DWC_ETH_QOS -#define CONFIG_SERVERIP 192.168.1.1 -#endif #define STM32MP_FIP_IMAGE_GUID \ EFI_GUID(0x19d5df83, 0x11b0, 0x457b, 0xbe, 0x2c, \ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index faff8d6ed6..ce941d832a 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -8,8 +8,6 @@ #ifndef __STMARK2_CONFIG_H #define __STMARK2_CONFIG_H -#define CONFIG_HOSTNAME "stmark2" - #define CFG_SYS_UART_PORT 0 #define LDS_BOARD_TEXT \ @@ -63,10 +61,6 @@ #define CFG_SYS_DRAM_TEST -#if defined(CONFIG_CF_SBF) -#define CONFIG_SERIAL_BOOT -#endif - /* Reserve 256 kB for Monitor */ /* diff --git a/include/configs/stout.h b/include/configs/stout.h index f49e88cb17..977c0adc5f 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -25,9 +25,6 @@ /* SCIF */ #define CONFIG_SCIF_A -/* SPI */ -#define CONFIG_SPI_FLASH_QUAD - /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 496139f346..5d82e7e560 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -73,9 +73,6 @@ * Miscellaneous configurable options */ -/* standalone support */ -#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR - /* FLASH and environment organization */ /* diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 6992689001..a2b6a1f57d 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -14,7 +14,6 @@ #define CFG_SYS_SDRAM_BASE (0x80000000) /* Start address of DDR3 */ #define PHYS_SDRAM_SIZE (0x7c000000) /* Default size (2GB - Secure memory) */ -#define CONFIG_VERY_BIG_RAM /* SynQuacer supports up to 64GB */ #define CONFIG_MAX_MEM_MAPPED PHYS_SDRAM_SIZE #define SQ_DRAMINFO_BASE (0x2e00ffc0) /* DRAM info from TF-A */ diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index fcc9674942..689914cb18 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -28,9 +28,6 @@ /* USB */ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#ifdef CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USBD_HS -#endif /* CONFIG_CMD_USB_MASS_STORAGE */ #endif /* CONFIG_CMD_USB */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index 0987966370..ae879abe3f 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -13,15 +13,8 @@ #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten™ NG Evaluation Carrier" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -/* Environment in eMMC, at the end of 2nd "boot sector" */ - -/* SPI */ -#define CONFIG_TEGRA_SLINK_CTRLS 6 -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/tec.h b/include/configs/tec.h index ddf753da4a..e8a9df756d 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 69acabf19f..2c668e0611 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -73,8 +73,4 @@ BOOTENV \ BOARD_EXTRA_ENV_SETTINGS -#if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) || defined(CONFIG_TEGRA114_SPI) -#define CONFIG_TEGRA_SPI -#endif - #endif /* __TEGRA_COMMON_POST_H */ diff --git a/include/configs/theadorable-x86-common.h b/include/configs/theadorable-x86-common.h index af0a095dfc..b57b1beaaf 100644 --- a/include/configs/theadorable-x86-common.h +++ b/include/configs/theadorable-x86-common.h @@ -16,7 +16,6 @@ "stderr=serial\0" #define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO /* Environment settings */ diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h deleted file mode 100644 index 03849adb5a..0000000000 --- a/include/configs/ti814x_evm.h +++ /dev/null @@ -1,102 +0,0 @@ -/* - * ti814x_evm.h - * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __CONFIG_TI814X_EVM_H -#define __CONFIG_TI814X_EVM_H - -#include <asm/arch/omap.h> - -/* commands to include */ - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x80200000\0" \ - "fdtaddr=0x80F80000\0" \ - "rdaddr=0x81000000\0" \ - "bootfile=/boot/uImage\0" \ - "fdtfile=\0" \ - "console=ttyO0,115200n8\0" \ - "optargs=\0" \ - "mmcdev=0\0" \ - "mmcroot=/dev/mmcblk0p2 ro\0" \ - "mmcrootfstype=ext4 rootwait\0" \ - "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ - "ramrootfstype=ext2\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "${optargs} " \ - "root=${mmcroot} " \ - "rootfstype=${mmcrootfstype}\0" \ - "bootenv=uEnv.txt\0" \ - "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ - "importbootenv=echo Importing environment from mmc ...; " \ - "env import -t $loadaddr $filesize\0" \ - "ramargs=setenv bootargs console=${console} " \ - "${optargs} " \ - "root=${ramroot} " \ - "rootfstype=${ramrootfstype}\0" \ - "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ - "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ - "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "ramboot=echo Booting from ramdisk ...; " \ - "run ramargs; " \ - "bootm ${loadaddr}\0" \ - "fdtfile=ti814x-evm.dtb\0" \ - -/* Clock Defines */ -#define V_OSCK 24000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - - -/* Console I/O Buffer Size */ - -/** - * Physical Memory Map - */ -#define PHYS_DRAM_1_SIZE 0x20000000 /* 512MB */ -#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1024MB */ - -#define CFG_SYS_SDRAM_BASE 0x80000000 - -/** - * Platform/Board specific defs - */ -#define CFG_SYS_TIMERBASE 0x4802E000 - -/* NS16550 Configuration */ -#define CFG_SYS_NS16550_CLK (48000000) -#define CFG_SYS_NS16550_COM1 0x48020000 /* Base EVM has UART0 */ - -/* CPU */ - -/* Defines for SPL */ - -/* - * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM - * 64 bytes before this address should be set aside for u-boot.img's - * header. That is 0x800FFFC0--0x80800000 should not be used for any - * other needs. - */ - -/* - * Since SPL did pll and ddr initialization for us, - * we don't need to do it twice. - */ - -/* Ethernet */ -#define CONFIG_PHY_ET1011C_TX_CLK_FIX - -#endif /* ! __CONFIG_TI814X_EVM_H */ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 0aa331e393..4d39b4005b 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -81,7 +81,7 @@ "${kernelname}\0" \ "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ "${fdtfile}\0" \ - "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \ + "mmcdev=0\0" \ "mmcbootpart=2\0" \ "mmcrootpart=5\0" \ "opts=always_resume=1\0" \ diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index e4cbc7da84..b5bf991220 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -14,8 +14,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Compulab Trimslice" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_TEGRA_UARTA_GPU #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* SPI */ diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h index ab199bc726..6e03375c6c 100644 --- a/include/configs/ulcb.h +++ b/include/configs/ulcb.h @@ -13,7 +13,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CFG_SYS_FLASH_BANKS_LIST { 0x08000000 } #define CFG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 8cd81f1cdd..7fee64029d 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -46,10 +46,6 @@ /* * Network Configuration */ -#define CONFIG_SERVERIP 192.168.11.1 -#define CONFIG_IPADDR 192.168.11.10 -#define CONFIG_GATEWAYIP 192.168.11.1 -#define CONFIG_NETMASK 255.255.255.0 #if defined(CONFIG_ARM64) /* ARM Trusted Firmware */ @@ -62,8 +58,6 @@ "third_image=u-boot.bin\0" #endif -#define CONFIG_ROOTPATH "/nfs/root/path" - #ifdef CONFIG_FIT #define KERNEL_ADDR_R_OFFSET "0x05100000" #define LINUXBOOT_ENV_SETTINGS \ diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index a2bc3cd23a..7f79c6342f 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -28,7 +28,6 @@ #define CONFIG_MXC_USB_FLAGS 0 /* Linux boot */ -#define CONFIG_HOSTNAME "usbarmory" #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0) diff --git a/include/configs/venice2.h b/include/configs/venice2.h index b2dc04a975..970893ca17 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -15,14 +15,10 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Venice2" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/ventana.h b/include/configs/ventana.h index f7a507768e..e7b7b911d9 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -14,7 +14,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Ventana" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 88839a6e56..22dc364223 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -19,9 +19,6 @@ #define CONFIG_MALLOC_F_ADDR 0x184000 /* For RAW image gives a error info not panic */ -#define CONFIG_POWER_PCA9450 - -#define CONFIG_SYS_I2C #endif /* CONFIG_SPL_BUILD */ #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/vinco.h b/include/configs/vinco.h index 9f72bdde81..1c1789ac3f 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -39,9 +39,6 @@ /* USB device */ -/* Ethernet Hardware */ -#define CONFIG_MACB_SEARCH_PHY - #ifdef CONFIG_SPI_BOOT /* bootstrap + u-boot + env + linux in serial flash */ /* Use our own mapping for the VInCo platform */ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index 56c90aa103..a985c6f28f 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -95,8 +95,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_USBD_HS - /* USB Device Firmware Update support */ #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/x530.h b/include/configs/x530.h index c213dc6074..4cf41f52fd 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -51,7 +51,4 @@ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" -#define CONFIG_UBI_PART user -#define CONFIG_UBIFS_VOLUME user - #endif /* _CONFIG_X530_H */ diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index ec87eddd4c..9df3bfd527 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -11,7 +11,6 @@ #define CONFIG_X86_REFCODE_RUN_ADDR 0 #define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \ diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 3e17b53dde..d71108dd31 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -10,22 +10,6 @@ #ifndef __CONFIG_X86_COMMON_H #define __CONFIG_X86_COMMON_H -/* - * High Level Configuration Options - * (easy to change) - */ - -/* Generic TPM interfaced through LPC bus */ -#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 - -/*----------------------------------------------------------------------- - * Serial Configuration - */ - -/* - * Miscellaneous configurable options - */ - /*----------------------------------------------------------------------- * CPU Features */ @@ -41,8 +25,6 @@ */ /* Default environment */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_HOSTNAME "x86" #define CONFIG_RAMDISK_ADDR 0x4000000 #if defined(CONFIG_GENERATE_ACPI_TABLE) || defined(CONFIG_EFI_STUB) #define CONFIG_OTHBOOTARGS "othbootargs=\0" diff --git a/include/configs/xea.h b/include/configs/xea.h index b432ab2dc8..a3dc0c74eb 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -26,7 +26,6 @@ #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Extra Environment */ -#define CONFIG_HOSTNAME "xea" #define CONFIG_EXTRA_ENV_SETTINGS \ "bootmode=update\0" \ diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index ee3130ed32..6ee6786e05 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -25,7 +25,6 @@ #if defined(CONFIG_CMD_DFU) #define DFU_DEFAULT_POLL_TIMEOUT 300 -#define CONFIG_THOR_RESET_OFF #endif /* Ethernet driver */ diff --git a/include/configs/xilinx_versal_net.h b/include/configs/xilinx_versal_net.h index 7d77189693..37bdb21462 100644 --- a/include/configs/xilinx_versal_net.h +++ b/include/configs/xilinx_versal_net.h @@ -25,7 +25,6 @@ #if defined(CONFIG_CMD_DFU) #define DFU_DEFAULT_POLL_TIMEOUT 300 -#define CONFIG_THOR_RESET_OFF #define DFU_ALT_INFO_RAM \ "dfu_ram_info=" \ "setenv dfu_alt_info " \ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index efe241df97..f71cd66099 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -31,7 +31,6 @@ #if defined(CONFIG_ZYNQMP_USB) #define DFU_DEFAULT_POLL_TIMEOUT 300 -#define CONFIG_THOR_RESET_OFF # define PARTS_DEFAULT \ "partitions=uuid_disk=${uuid_gpt_disk};" \ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 3e604894ad..9f1f2d90db 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -34,9 +34,6 @@ #define CONFIG_FEC_ENET_DEV 0 #define CONFIG_FEC_MXC_PHYADDR 0x0 -#define CONFIG_UBOOT_SECTOR_START 0x2 -#define CONFIG_UBOOT_SECTOR_COUNT 0x3fe - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -75,8 +72,8 @@ "bootz; " \ "fi;\0" \ "uboot=ccv/u-boot.imx\0" \ - "uboot_start="__stringify(CONFIG_UBOOT_SECTOR_START)"\0" \ - "uboot_size="__stringify(CONFIG_UBOOT_SECTOR_COUNT)"\0" \ + "uboot_start=0x2\0" \ + "uboot_size=0x3fe\0" \ "update_uboot=if tftp ${uboot}; then " \ "if itest ${filesize} > 0; then " \ "mmc dev 0 1;" \ diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 9201dac7ab..e0189c58f0 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -53,22 +53,6 @@ /* Memory test is destructive so default must not overlap vectors or U-Boot*/ -/* Load address for stand-alone applications. - * MEMADDR cannot be used here, because the definition needs to be - * a plain number as it's used as -Ttext argument for ld in standalone - * example makefile. - * Handle noMMU vs MMUv2 vs MMUv3 distinction here manually. - */ -#if XCHAL_HAVE_PTP_MMU -#if XCHAL_VECBASE_RESET_VADDR == XCHAL_VECBASE_RESET_PADDR -#define CONFIG_STANDALONE_LOAD_ADDR 0x00800000 -#else -#define CONFIG_STANDALONE_LOAD_ADDR 0xd0800000 -#endif -#else -#define CONFIG_STANDALONE_LOAD_ADDR 0x60800000 -#endif - #if defined(CONFIG_MAX_MEM_MAPPED) && \ CONFIG_MAX_MEM_MAPPED < CFG_SYS_SDRAM_SIZE #define XTENSA_SYS_TEXT_ADDR \ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index b8c142fed3..d95178eb64 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -35,13 +35,9 @@ /* Ethernet driver */ /* NOR */ -#ifdef CONFIG_MTD_NOR_FLASH -# define CONFIG_FLASH_SHOW_PROGRESS 10 -#endif #ifdef CONFIG_USB_EHCI_ZYNQ # define DFU_DEFAULT_POLL_TIMEOUT 300 -# define CONFIG_THOR_RESET_OFF #endif /* enable preboot to be loaded before CONFIG_BOOTDELAY */ diff --git a/include/env_default.h b/include/env_default.h index 7c9c00a969..3b7685ee26 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -53,11 +53,11 @@ const char default_environment[] = { #ifdef CONFIG_ETHPRIME "ethprime=" CONFIG_ETHPRIME "\0" #endif -#ifdef CONFIG_IPADDR - "ipaddr=" __stringify(CONFIG_IPADDR) "\0" +#ifdef CONFIG_USE_IPADDR + "ipaddr=" CONFIG_IPADDR "\0" #endif -#ifdef CONFIG_SERVERIP - "serverip=" __stringify(CONFIG_SERVERIP) "\0" +#ifdef CONFIG_USE_SERVERIP + "serverip=" CONFIG_SERVERIP "\0" #endif #ifdef CONFIG_SYS_DISABLE_AUTOLOAD "autoload=0\0" @@ -65,17 +65,17 @@ const char default_environment[] = { #ifdef CONFIG_PREBOOT_DEFINED "preboot=" CONFIG_PREBOOT "\0" #endif -#ifdef CONFIG_ROOTPATH +#ifdef CONFIG_USE_ROOTPATH "rootpath=" CONFIG_ROOTPATH "\0" #endif -#ifdef CONFIG_GATEWAYIP - "gatewayip=" __stringify(CONFIG_GATEWAYIP) "\0" +#ifdef CONFIG_USE_GATEWAYIP + "gatewayip=" CONFIG_GATEWAYIP "\0" #endif -#ifdef CONFIG_NETMASK - "netmask=" __stringify(CONFIG_NETMASK) "\0" +#ifdef CONFIG_USE_NETMASK + "netmask=" CONFIG_NETMASK "\0" #endif -#ifdef CONFIG_HOSTNAME - "hostname=" CONFIG_HOSTNAME "\0" +#ifdef CONFIG_USE_HOSTNAME + "hostname=" CONFIG_HOSTNAME "\0" #endif #ifdef CONFIG_USE_BOOTFILE "bootfile=" CONFIG_BOOTFILE "\0" diff --git a/include/env_internal.h b/include/env_internal.h index f30fd6159d..aee6b3e48f 100644 --- a/include/env_internal.h +++ b/include/env_internal.h @@ -41,10 +41,6 @@ (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) # define ENV_IS_EMBEDDED # endif -# ifdef CONFIG_ENV_IS_EMBEDDED -# error "do not define CONFIG_ENV_IS_EMBEDDED in your board config" -# error "it is calculated automatically for you" -# endif #endif /* CONFIG_ENV_IS_IN_FLASH */ #if defined(CONFIG_ENV_IS_IN_NAND) @@ -57,23 +53,6 @@ extern unsigned long nand_env_oob_offset; # endif /* CONFIG_ENV_OFFSET_OOB */ #endif /* CONFIG_ENV_IS_IN_NAND */ -/* - * For the flash types where embedded env is supported, but it cannot be - * calculated automatically (i.e. NAND), take the board opt-in. - */ -#if defined(CONFIG_ENV_IS_EMBEDDED) && !defined(ENV_IS_EMBEDDED) -# define ENV_IS_EMBEDDED -#endif - -/* The build system likes to know if the env is embedded */ -#ifdef DO_DEPS_ONLY -# ifdef ENV_IS_EMBEDDED -# ifndef CONFIG_ENV_IS_EMBEDDED -# define CONFIG_ENV_IS_EMBEDDED -# endif -# endif -#endif - #include "compiler.h" #ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT @@ -88,7 +67,7 @@ extern unsigned long nand_env_oob_offset; * If the environment is in RAM, allocate extra space for it in the malloc * region. */ -#if defined(CONFIG_ENV_IS_EMBEDDED) +#if defined(ENV_IS_EMBEDDED) #define TOTAL_MALLOC_LEN CONFIG_SYS_MALLOC_LEN #elif (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE < CONFIG_SYS_MONITOR_BASE) || \ (CONFIG_ENV_ADDR >= CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) || \ diff --git a/include/fm_eth.h b/include/fm_eth.h index aeb640925e..6012a449fd 100644 --- a/include/fm_eth.h +++ b/include/fm_eth.h @@ -202,7 +202,6 @@ struct memac_mdio_info { int fm_tgec_mdio_init(struct bd_info *bis, struct tgec_mdio_info *info); int fm_memac_mdio_init(struct bd_info *bis, struct memac_mdio_info *info); -int fm_standard_init(struct bd_info *bis); void fman_enet_init(void); void fdt_fixup_fman_ethernet(void *fdt); phy_interface_t fm_info_get_enet_if(enum fm_port port); diff --git a/include/fsl_validate.h b/include/fsl_validate.h index 252d499e7b..fbcbd42496 100644 --- a/include/fsl_validate.h +++ b/include/fsl_validate.h @@ -280,4 +280,11 @@ int fsl_setenv_chain_of_trust(void); * Architecture header (appended to U-boot image). */ void spl_validate_uboot(uint32_t hdr_addr, uintptr_t img_addr); + +/* + * This header is appended at end of image and copied to DDR along + * with the U-Boot image and later used as part of the validation + * flow + */ +#define FSL_U_BOOT_HDR_SIZE (16 << 10) #endif diff --git a/include/netdev.h b/include/netdev.h index b3f8584e90..2b4e474ed0 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -70,7 +70,6 @@ int sh_eth_initialize(struct bd_info *bis); int skge_initialize(struct bd_info *bis); int smc91111_initialize(u8 dev_num, phys_addr_t base_addr); int smc911x_initialize(u8 dev_num, phys_addr_t base_addr); -int uec_standard_init(struct bd_info *bis); int uli526x_initialize(struct bd_info *bis); int armada100_fec_register(unsigned long base_addr); diff --git a/include/usbdescriptors.h b/include/usbdescriptors.h index 9a50387451..641b4a3e6f 100644 --- a/include/usbdescriptors.h +++ b/include/usbdescriptors.h @@ -227,21 +227,6 @@ struct usb_device_descriptor { u8 bNumConfigurations; } __attribute__ ((packed)); -#if defined(CONFIG_USBD_HS) -struct usb_qualifier_descriptor { - u8 bLength; - u8 bDescriptorType; - - u16 bcdUSB; - u8 bDeviceClass; - u8 bDeviceSubClass; - u8 bDeviceProtocol; - u8 bMaxPacketSize0; - u8 bNumConfigurations; - u8 breserved; -} __attribute__ ((packed)); -#endif - struct usb_string_descriptor { u8 bLength; u8 bDescriptorType; /* 0x03 */ diff --git a/include/usbdevice.h b/include/usbdevice.h index 611cd6e4ab..80c5af0cbc 100644 --- a/include/usbdevice.h +++ b/include/usbdevice.h @@ -196,10 +196,6 @@ struct usb_bus_instance; #define USB_DT_INTERFACE 0x04 #define USB_DT_ENDPOINT 0x05 -#if defined(CONFIG_USBD_HS) -#define USB_DT_QUAL 0x06 -#endif - #define USB_DT_HID (USB_TYPE_CLASS | 0x01) #define USB_DT_REPORT (USB_TYPE_CLASS | 0x02) #define USB_DT_PHYSICAL (USB_TYPE_CLASS | 0x03) @@ -279,11 +275,7 @@ struct usb_bus_instance; * USB Spec Release number */ -#if defined(CONFIG_USBD_HS) -#define USB_BCD_VERSION 0x0200 -#else #define USB_BCD_VERSION 0x0110 -#endif /* @@ -552,9 +544,6 @@ struct usb_device_instance { /* generic */ char *name; struct usb_device_descriptor *device_descriptor; /* per device descriptor */ -#if defined(CONFIG_USBD_HS) - struct usb_qualifier_descriptor *qualifier_descriptor; -#endif void (*event) (struct usb_device_instance *device, usb_device_event_t event, int data); @@ -644,14 +633,6 @@ struct usb_string_descriptor *usbd_get_string (u8); struct usb_device_descriptor *usbd_device_device_descriptor(struct usb_device_instance *, int); -#if defined(CONFIG_USBD_HS) -/* - * is_usbd_high_speed routine needs to be defined by specific gadget driver - * It returns true if device enumerates at High speed - * Retuns false otherwise - */ -int is_usbd_high_speed(void); -#endif int usbd_endpoint_halted (struct usb_device_instance *device, int endpoint); void usbd_rcv_complete(struct usb_endpoint_instance *endpoint, int len, int urb_bad); void usbd_tx_complete (struct usb_endpoint_instance *endpoint); diff --git a/net/Kconfig b/net/Kconfig index a1ec3f8542..4215889127 100644 --- a/net/Kconfig +++ b/net/Kconfig @@ -174,6 +174,58 @@ config BOOTP_MAX_ROOT_PATH_LEN help Select maximal length of option 17 root path. +config USE_GATEWAYIP + bool "Set a default 'gateway' value in the environment" + help + Defines a default value for the IP address of the default router + where packets to other networks are sent to. (Environment variable + "gatewayip") + +config GATEWAYIP + string "Value of the default 'gateway' value in the environment" + depends on USE_GATEWAYIP + +config USE_IPADDR + bool "Set a default 'ipaddr' value in the environment" + help + Define a default value for the IP address to use for the default + Ethernet interface, in case this is not determined through e.g. + bootp. (Environment variable "ipaddr") + +config IPADDR + string "Value of the default 'ipaddr' value in the environment" + depends on USE_IPADDR + +config USE_NETMASK + bool "Set a default 'netmask' value in the environment" + help + Defines a default value for the subnet mask (or routing prefix) which + is used to determine if an IP address belongs to the local subnet or + needs to be forwarded through a router. (Environment variable "netmask") + +config NETMASK + string "Value of the default 'netmask' value in the environment" + depends on USE_NETMASK + +config USE_ROOTPATH + bool "Set a default 'rootpath' value in the environment" + +config ROOTPATH + string "Value of the default 'rootpath' value in the environment" + depends on USE_ROOTPATH + default "/opt/nfsroot" + +config USE_SERVERIP + bool "Set a default 'serverip' value in the environment" + help + Defines a default value for the IP address of a TFTP server to + contact when using the "tftboot" command. (Environment variable + "serverip") + +config SERVERIP + string "Value of the default 'serverip' value in the environment" + depends on USE_SERVERIP + config PROT_TCP bool "TCP stack" help diff --git a/tools/Makefile b/tools/Makefile index 80bc62befc..edfa40903d 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -36,21 +36,20 @@ endif subdir-$(HOST_TOOLS_ALL) += gdb # Merge all the different vars for envcrc into one -ENVCRC-$(CONFIG_ENV_IS_EMBEDDED) = y ENVCRC-$(CONFIG_ENV_IS_IN_EEPROM) = y ENVCRC-$(CONFIG_ENV_IS_IN_FLASH) = y ENVCRC-$(CONFIG_ENV_IS_IN_ONENAND) = y ENVCRC-$(CONFIG_ENV_IS_IN_NAND) = y ENVCRC-$(CONFIG_ENV_IS_IN_NVRAM) = y ENVCRC-$(CONFIG_ENV_IS_IN_SPI_FLASH) = y -CONFIG_BUILD_ENVCRC ?= $(ENVCRC-y) +BUILD_ENVCRC ?= $(ENVCRC-y) hostprogs-$(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER) += atmel_pmecc_params hostprogs-$(CONFIG_VIDEO_LOGO) += bmp_logo HOSTCFLAGS_bmp_logo.o := -pedantic -hostprogs-$(CONFIG_BUILD_ENVCRC) += envcrc +hostprogs-$(BUILD_ENVCRC) += envcrc envcrc-objs := envcrc.o lib/crc32.o env/embedded.o lib/sha1.o hostprogs-$(CONFIG_CMD_NET) += gen_eth_addr diff --git a/tools/envcrc.c b/tools/envcrc.c index a021c785ae..550f31038b 100644 --- a/tools/envcrc.c +++ b/tools/envcrc.c @@ -40,10 +40,6 @@ # endif #endif /* CONFIG_ENV_IS_IN_FLASH */ -#if defined(ENV_IS_EMBEDDED) && !defined(CONFIG_BUILD_ENVCRC) -# define CONFIG_BUILD_ENVCRC -#endif - #ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT # define ENV_HEADER_SIZE (sizeof(uint32_t) + 1) #else @@ -53,17 +49,17 @@ #define ENV_SIZE (CONFIG_ENV_SIZE - ENV_HEADER_SIZE) -#ifdef CONFIG_BUILD_ENVCRC +#ifdef ENV_IS_EMBEDDED # include <env_internal.h> extern unsigned int env_size; extern env_t embedded_environment; -#endif /* CONFIG_BUILD_ENVCRC */ +#endif /* ENV_IS_EMBEDDED */ extern uint32_t crc32(uint32_t, const unsigned char *, unsigned int); int main (int argc, char **argv) { -#ifdef CONFIG_BUILD_ENVCRC +#ifdef ENV_IS_EMBEDDED unsigned char pad = 0x00; uint32_t crc; unsigned char *envptr = (unsigned char *)&embedded_environment, |