diff options
36 files changed, 730 insertions, 188 deletions
diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi index 1eafb40ce3..2d87bea933 100644 --- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi @@ -16,6 +16,10 @@ }; }; +&edp { + rockchip,panel = <&edp_panel>; +}; + &i2c0 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h index 94e5bb674f..9559813e52 100644 --- a/arch/arm/include/asm/arch-rockchip/edp_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/edp_rk3288.h @@ -232,8 +232,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa00); #define PD_CH0 (0x1 << 0) /* pll_reg_1 */ -#define REF_CLK_24M (0x1 << 1) -#define REF_CLK_27M (0x0 << 1) +#define REF_CLK_24M (0x1 << 0) +#define REF_CLK_27M (0x0 << 0) +#define REF_CLK_MASK (0x1 << 0) /* line_map */ #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6) @@ -296,7 +297,9 @@ check_member(rk3288_edp, pll_reg_5, 0xa00); /* int_ctl */ #define SOFT_INT_CTRL (0x1 << 2) -#define INT_POL (0x1 << 0) +#define INT_POL1 (0x1 << 1) +#define INT_POL0 (0x1 << 0) +#define INT_POL (INT_POL0 | INT_POL1) /* sys_ctl_1 */ #define DET_STA (0x1 << 2) diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h index 52446e97c6..49a7141437 100644 --- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h @@ -85,26 +85,13 @@ enum { LB_RGB_1280X8 = 0x5 }; -#if defined(CONFIG_ROCKCHIP_RK3399) enum vop_modes { VOP_MODE_EDP = 0, VOP_MODE_MIPI, VOP_MODE_HDMI, - VOP_MODE_MIPI1, - VOP_MODE_DP, - VOP_MODE_NONE, -}; -#else -enum vop_modes { - VOP_MODE_EDP = 0, - VOP_MODE_HDMI, VOP_MODE_LVDS, - VOP_MODE_MIPI, - VOP_MODE_NONE, - VOP_MODE_AUTO_DETECT, - VOP_MODE_UNKNOWN, + VOP_MODE_DP, }; -#endif /* VOP_VERSION_INFO */ #define M_FPGA_VERSION (0xffff << 16) diff --git a/cmd/efidebug.c b/cmd/efidebug.c index 6e36575a94..0bf7b8856c 100644 --- a/cmd/efidebug.c +++ b/cmd/efidebug.c @@ -341,27 +341,27 @@ static int do_efi_capsule(struct cmd_tbl *cmdtp, int flag, #endif /* CONFIG_EFI_HAVE_CAPSULE_SUPPORT */ /** - * efi_get_device_handle_info() - get information of UEFI device + * efi_get_device_path_text() - get device path text * - * @handle: Handle of UEFI device - * @dev_path_text: Pointer to text of device path - * Return: 0 on success, -1 on failure + * Return the text representation of the device path of a handle. * - * Currently return a formatted text of device path. + * @handle: handle of UEFI device + * Return: + * Pointer to the device path text or NULL. + * The caller is responsible for calling FreePool(). */ -static int efi_get_device_handle_info(efi_handle_t handle, u16 **dev_path_text) +static u16 *efi_get_device_path_text(efi_handle_t handle) { - struct efi_device_path *dp; + struct efi_handler *handler; efi_status_t ret; - ret = EFI_CALL(BS->open_protocol(handle, &efi_guid_device_path, - (void **)&dp, NULL /* FIXME */, NULL, - EFI_OPEN_PROTOCOL_GET_PROTOCOL)); - if (ret == EFI_SUCCESS) { - *dev_path_text = efi_dp_str(dp); - return 0; + ret = efi_search_protocol(handle, &efi_guid_device_path, &handler); + if (ret == EFI_SUCCESS && handler->protocol_interface) { + struct efi_device_path *dp = handler->protocol_interface; + + return efi_dp_str(dp); } else { - return -1; + return NULL; } } @@ -401,7 +401,8 @@ static int do_efi_show_devices(struct cmd_tbl *cmdtp, int flag, printf("Device%.*s Device Path\n", EFI_HANDLE_WIDTH - 6, spc); printf("%.*s ====================\n", EFI_HANDLE_WIDTH, sep); for (i = 0; i < num; i++) { - if (!efi_get_device_handle_info(handles[i], &dev_path_text)) { + dev_path_text = efi_get_device_path_text(handles[i]); + if (dev_path_text) { printf("%p %ls\n", handles[i], dev_path_text); efi_free_pool(dev_path_text); } diff --git a/common/board_f.c b/common/board_f.c index 0cddf0359d..203e965799 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -394,7 +394,7 @@ static int reserve_video(void) if (ret) return ret; debug("Reserving %luk for video at: %08lx\n", - (unsigned long)gd->relocaddr - addr, addr); + ((unsigned long)gd->relocaddr - addr) >> 10, addr); gd->relocaddr = addr; #elif defined(CONFIG_LCD) # ifdef CONFIG_FB_ADDR diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst index b3494c22e0..4f2b8b036d 100644 --- a/doc/develop/uefi/uefi.rst +++ b/doc/develop/uefi/uefi.rst @@ -180,6 +180,12 @@ Set up boot parameters on your board:: efidebug boot add -b 1 HELLO mmc 0:1 /helloworld.efi.signed "" +Since kernel 5.7 there's an alternative way of loading an initrd using +LoadFile2 protocol if CONFIG_EFI_LOAD_FILE2_INITRD is enabled. +The initrd path can be specified with:: + + efidebug boot add -b ABE0 'kernel' mmc 0:1 Image -i mmc 0:1 initrd + Now your board can run the signed image via the boot manager (see below). You can also try this sequence by running Pytest, test_efi_secboot, on the sandbox @@ -213,7 +219,63 @@ non-volatile variables. When calling the variable services via the OP-TEE API U-Boot's OP-TEE supplicant relays calls to the RPMB driver which has to be enabled via CONFIG_SUPPORT_EMMC_RPMB=y. -[1] https://optee.readthedocs.io/ - OP-TEE documentation +EDK2 Build instructions +*********************** + +.. code-block:: bash + + $ git clone https://github.com/tianocore/edk2.git + $ git clone https://github.com/tianocore/edk2-platforms.git + $ cd edk2 + $ git submodule init && git submodule update --init --recursive + $ cd .. + $ export WORKSPACE=$(pwd) + $ export PACKAGES_PATH=$WORKSPACE/edk2:$WORKSPACE/edk2-platforms + $ export ACTIVE_PLATFORM="Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc" + $ export GCC5_AARCH64_PREFIX=aarch64-linux-gnu- + $ source edk2/edksetup.sh + $ make -C edk2/BaseTools + $ build -p $ACTIVE_PLATFORM -b RELEASE -a AARCH64 -t GCC5 -n `nproc` + +OP-TEE Build instructions +************************* + +.. code-block:: bash + + $ git clone https://github.com/OP-TEE/optee_os.git + $ cd optee_os + $ ln -s ../Build/MmStandaloneRpmb/RELEASE_GCC5/FV/BL32_AP_MM.fd + $ export ARCH=arm + $ CROSS_COMPILE32=arm-linux-gnueabihf- make -j32 CFG_ARM64_core=y \ + PLATFORM=<myboard> CFG_STMM_PATH=BL32_AP_MM.fd CFG_RPMB_FS=y \ + CFG_RPMB_FS_DEV_ID=0 CFG_CORE_HEAP_SIZE=524288 CFG_RPMB_WRITE_KEY=1 \ + CFG_CORE_HEAP_SIZE=524288 CFG_CORE_DYN_SHM=y CFG_RPMB_TESTKEY=y \ + CFG_REE_FS=n CFG_CORE_ARM64_PA_BITS=48 CFG_TEE_CORE_LOG_LEVEL=1 \ + CFG_TEE_TA_LOG_LEVEL=1 CFG_SCTLR_ALIGNMENT_CHECK=n + +U-Boot Build instructions +************************* + +Although the StandAloneMM binary comes from EDK2, using and storing the +variables is currently available in U-Boot only. + +.. code-block:: bash + + $ git clone https://github.com/u-boot/u-boot.git + $ cd u-boot + $ export CROSS_COMPILE=aarch64-linux-gnu- + $ export ARCH=<arch> + $ make <myboard>_defconfig + $ make menuconfig + +Enable ``CONFIG_OPTEE``, ``CONFIG_CMD_OPTEE_RPMB`` and ``CONFIG_EFI_MM_COMM_TEE`` + +.. warning:: + + - Your OP-TEE platform port must support Dynamic shared memory, since that's + the only kind of memory U-Boot supports for now. + +[1] https://optee.readthedocs.io/en/latest/building/efi_vars/stmm.html Executing the boot manager ~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -484,7 +546,21 @@ The load file 2 protocol can be used by the Linux kernel to load the initial RAM disk. U-Boot can be configured to provide an implementation with:: EFI_LOAD_FILE2_INITRD=y - EFI_INITRD_FILESPEC=interface dev:part path_to_initrd + +When the option is enabled the user can add the initrd path with the efidebug +command. + +Load options Boot#### have a FilePathList[] member. The first element of +the array (FilePathList[0]) is the EFI binary to execute. When an initrd +is specified the Device Path for the initrd is denoted by a VenMedia node +with the EFI_INITRD_MEDIA_GUID. Each entry of the array is terminated by the +'end of entire device path' subtype (0xff). If a user wants to define multiple +initrds, those must by separated by the 'end of this instance' identifier of +the end node (0x01). + +So our final format of the FilePathList[] is:: + + Loaded image - end node (0xff) - VenMedia - initrd_1 - [end node (0x01) - initrd_n ...] - end node (0xff) Links ----- diff --git a/doc/device-tree-bindings/pwm/cros-ec-pwm.txt b/doc/device-tree-bindings/pwm/cros-ec-pwm.txt new file mode 100644 index 0000000000..f198d08891 --- /dev/null +++ b/doc/device-tree-bindings/pwm/cros-ec-pwm.txt @@ -0,0 +1,23 @@ +PWM controlled by ChromeOS EC + +Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller +(EC) and controlled via a host-command interface. + +An EC PWM node should be only found as a sub-node of the EC node (see +doc/device-tree-bindings/misc/cros-ec.txt). + +Required properties: +- compatible: Must contain "google,cros-ec-pwm" +- #pwm-cells: Should be 1. The cell specifies the PWM index. + +Example: + cros-ec@0 { + compatible = "google,cros-ec-spi"; + + ... + + cros_ec_pwm: ec-pwm { + compatible = "google,cros-ec-pwm"; + #pwm-cells = <1>; + }; + }; diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 5faf279f43..d330b14a17 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -32,6 +32,7 @@ Shell commands load loady mbr + mmc md pstore qfw diff --git a/doc/usage/mmc.rst b/doc/usage/mmc.rst new file mode 100644 index 0000000000..57284ed674 --- /dev/null +++ b/doc/usage/mmc.rst @@ -0,0 +1,212 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +mmc command +============ + +Synopsis +-------- + +:: + + mmc info + mmc read addr blk# cnt + mmc write addr blk# cnt + mmc erase blk# cnt + mmc rescan + mmc part + mmc dev [dev] [part] + mmc list + mmc wp + mmc bootbus <dev> <boot_bus_width> <reset_boot_bus_width> <boot_mode> + mmc bootpart-resize <dev> <dev part size MB> <RPMB part size MB> + mmc partconf <dev> [boot_ack boot_partition partition_access] + mmc rst-function <dev> <value> + +Description +----------- + +The mmc command is used to control MMC(eMMC/SD) device. + +The 'mmc info' command displays information (Manufacturer ID, OEM, Name, Bus Speed, Mode, ...) of MMC device. + +The 'mmc read' command reads raw data to memory address from MMC device with block offset and count. + +The 'mmc write' command writes raw data to MMC device from memory address with block offset and count. + + addr + memory address + blk# + start block offset + cnt + block count + +The 'mmc erase' command erases MMC device from block offset until count. + + blk# + start block offset + cnt + block count + +The 'mmc rescan' command scans the available MMC device. + +The 'mmc part' command displays the list available partition on current mmc device. + +The 'mmc dev' command shows or set current mmc device. + + dev + device number to change + part + partition number to change + +The 'mmc list' command displays the list available devices. + +The 'mmc wp' command enables "power on write protect" function for boot partitions. + +The 'mmc bootbus' command sets the BOOT_BUS_WIDTH field. (*Refer to eMMC specification*) + + boot_bus_width + 0x0 + x1 (sdr) or x4(ddr) buswidth in boot operation mode (default) + 0x1 + x4 (sdr/ddr) buswidth in boot operation mode + 0x2 + x8 (sdr/ddr) buswidth in boot operation mode + 0x3 + Reserved + + reset_boot_bus_width + 0x0 + Reset buswidth to x1, Single data reate and backward compatible timing after boot operation (default) + 0x1 + Retain BOOT_BUS_WIDTH and BOOT_MODE value after boot operation. This is relevant to Push-pull mode operation only + + boot_mode + 0x0 + Use single data rate + backward compatible timing in boot operation (default) + 0x1 + Use single data rate + High Speed timing in boot operation mode + 0x2 + Use dual data rate in boot operation + 0x3 + Reserved + +The 'mmc partconf' command shows or changes PARTITION_CONFIG field. + + boot_ack + boot acknowledge value + boot_partition + boot partition to enable for boot + 0x0 + Device not boot enabled(default) + 0x1 + Boot partition1 enabled for boot + 0x2 + Boot partition2 enabled for boot + 0x7 + User area enabled for boot + others + Reserved + partition_access + partitions to access + +The 'mmc bootpart-resize' command changes sizes of boot and RPMB partitions. + dev + device number + boot part size MB + target size of boot partition + RPMB part size MB + target size of RPMB partition + +The 'mmc rst-function' command changes the RST_n_FUNCTION field. +**WARNING** : This is a write-once field. (*Refer to eMMC specification*) + + value + 0x0 + RST_n signal is temporarily disabled (default) + 0x1 + RST_n signal is permanently enabled + 0x2 + RST_n signal is permanently disabled + 0x3 + Reserved + + +Examples +-------- + +The 'mmc info' command displays device's capabilities: +:: + + => mmc info + Device: EXYNOS DWMMC + Manufacturer ID: 45 + OEM: 100 + Name: SDW16 + Bus Speed: 52000000 + Mode: MMC DDR52 (52MHz) + Rd Block Len: 512 + MMC version 5.0 + High Capacity: Yes + Capacity: 14.7 GiB + Bus Width: 8-bit DDR + Erase Group Size: 512 KiB + HC WP Group Size: 8 MiB + User Capacity: 14.7 GiB WRREL + Boot Capacity: 4 MiB ENH + RPMB Capacity: 4 MiB ENH + Boot area 0 is not write protected + Boot area 1 is not write protected + +The raw data can be read/written via 'mmc read/write' command: +:: + + => mmc read 0x40000000 0x5000 0x100 + MMC read: dev # 0, block # 20480, count 256 ... 256 blocks read: OK + + => mmc write 0x40000000 0x5000 0x10 + MMC write: dev # 0, block # 20480, count 256 ... 256 blocks written: OK + +The partition list can be shown via 'mmc part' command: +:: + + => mmc part + Partition Map for MMC device 0 -- Partition Type: DOS + + Part Start Sector Num Sectors UUID Type + 1 8192 131072 dff8751a-01 0e Boot + 2 139264 6291456 dff8751a-02 83 + 3 6430720 1048576 dff8751a-03 83 + 4 7479296 23298048 dff8751a-04 05 Extd + 5 7481344 307200 dff8751a-05 83 + 6 7790592 65536 dff8751a-06 83 + 7 7858176 16384 dff8751a-07 83 + 8 7876608 22900736 dff8751a-08 83 + +The current device can be shown or set via 'mmc dev' command: +:: + + => mmc dev + switch to partitions #0, OK + mmc0(part0) is current device + => mmc dev 2 0 + switch to partitions #0, OK + mmc2 is current device + +The list of available devices can be shown via 'mmc list' command: +:: + + => mmc list + mmc list + EXYNOS DWMMC: 0 (eMMC) + EXYNOS DWMMC: 2 (SD) + +Configuration +------------- + +The mmc command is only available if CONFIG_CMD_MMC=y. +Some commands need to enable more configuration. + +write, erase + CONFIG_MMC_WRITE +bootbus, bootpart-resize, partconf, rst-function + CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c index ebfa7c41c2..7904d5cc72 100644 --- a/drivers/misc/cros_ec.c +++ b/drivers/misc/cros_ec.c @@ -1170,6 +1170,23 @@ int cros_ec_battery_cutoff(struct udevice *dev, uint8_t flags) return 0; } +int cros_ec_set_pwm_duty(struct udevice *dev, uint8_t index, uint16_t duty) +{ + struct ec_params_pwm_set_duty p; + int ret; + + p.duty = duty; + p.pwm_type = EC_PWM_TYPE_GENERIC; + p.index = index; + + ret = ec_command(dev, EC_CMD_PWM_SET_DUTY, 0, &p, sizeof(p), + NULL, 0); + if (ret < 0) + return ret; + + return 0; +} + int cros_ec_set_ldo(struct udevice *dev, uint8_t index, uint8_t state) { struct ec_params_ldo_set params; diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index ccf81abbe9..cf7f4c6840 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -9,6 +9,15 @@ config DM_PWM frequency/period can be controlled along with the proportion of that time that the signal is high. +config PWM_CROS_EC + bool "Enable support for the Chrome OS EC PWM" + depends on DM_PWM + help + This PWM is found on several Chrome OS devices and controlled by + the Chrome OS embedded controller. It may be used to control the + screen brightness and/or the keyboard backlight depending on the + device. + config PWM_EXYNOS bool "Enable support for the Exynos PWM" depends on DM_PWM diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 0b9d2698a3..10d244bfb7 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_DM_PWM) += pwm-uclass.o +obj-$(CONFIG_PWM_CROS_EC) += cros_ec_pwm.o obj-$(CONFIG_PWM_EXYNOS) += exynos_pwm.o obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o obj-$(CONFIG_PWM_MESON) += pwm-meson.o diff --git a/drivers/pwm/cros_ec_pwm.c b/drivers/pwm/cros_ec_pwm.c new file mode 100644 index 0000000000..44f4105dfd --- /dev/null +++ b/drivers/pwm/cros_ec_pwm.c @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <common.h> +#include <cros_ec.h> +#include <dm.h> +#include <errno.h> +#include <log.h> +#include <pwm.h> + +struct cros_ec_pwm_priv { + bool enabled; + uint duty; +}; + +static int cros_ec_pwm_set_config(struct udevice *dev, uint channel, + uint period_ns, uint duty_ns) +{ + struct cros_ec_pwm_priv *priv = dev_get_priv(dev); + uint duty; + int ret; + + debug("%s: period_ns=%u, duty_ns=%u asked\n", __func__, + period_ns, duty_ns); + + /* No way to set the period, only a relative duty cycle */ + duty = EC_PWM_MAX_DUTY * duty_ns / period_ns; + if (duty > EC_PWM_MAX_DUTY) + duty = EC_PWM_MAX_DUTY; + + if (!priv->enabled) { + priv->duty = duty; + debug("%s: duty=%#x to-be-set\n", __func__, duty); + return 0; + } + + ret = cros_ec_set_pwm_duty(dev->parent, channel, duty); + if (ret) { + debug("%s: duty=%#x failed\n", __func__, duty); + return ret; + } + + priv->duty = duty; + debug("%s: duty=%#x set\n", __func__, duty); + + return 0; +} + +static int cros_ec_pwm_set_enable(struct udevice *dev, uint channel, + bool enable) +{ + struct cros_ec_pwm_priv *priv = dev_get_priv(dev); + int ret; + + ret = cros_ec_set_pwm_duty(dev->parent, channel, + enable ? priv->duty : 0); + if (ret) { + debug("%s: enable=%d failed\n", __func__, enable); + return ret; + } + + priv->enabled = enable; + debug("%s: enable=%d (duty=%#x) set\n", __func__, + enable, priv->duty); + + return 0; +} + +static const struct pwm_ops cros_ec_pwm_ops = { + .set_config = cros_ec_pwm_set_config, + .set_enable = cros_ec_pwm_set_enable, +}; + +static const struct udevice_id cros_ec_pwm_ids[] = { + { .compatible = "google,cros-ec-pwm" }, + { } +}; + +U_BOOT_DRIVER(cros_ec_pwm) = { + .name = "cros_ec_pwm", + .id = UCLASS_PWM, + .of_match = cros_ec_pwm_ids, + .ops = &cros_ec_pwm_ops, + .priv_auto_alloc_size = sizeof(struct cros_ec_pwm_priv), +}; diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c index 9cf0980345..071eb04fda 100644 --- a/drivers/pwm/rk_pwm.c +++ b/drivers/pwm/rk_pwm.c @@ -147,7 +147,7 @@ static int rk_pwm_probe(struct udevice *dev) priv->data = (struct rockchip_pwm_data *)dev_get_driver_data(dev); if (priv->data->supports_polarity) - priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE; + priv->conf_polarity = PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE; return 0; } diff --git a/drivers/pwm/sandbox_pwm.c b/drivers/pwm/sandbox_pwm.c index 318dce7c14..4df15f0a2e 100644 --- a/drivers/pwm/sandbox_pwm.c +++ b/drivers/pwm/sandbox_pwm.c @@ -59,8 +59,15 @@ static int sandbox_pwm_set_config(struct udevice *dev, uint channel, if (channel >= NUM_CHANNELS) return -ENOSPC; chan = &priv->chan[channel]; - chan->period_ns = period_ns; - chan->duty_ns = duty_ns; + + if (channel == 2) { + /* Pretend to have some fixed period */ + chan->period_ns = 4096; + chan->duty_ns = duty_ns * 4096 / period_ns; + } else { + chan->period_ns = period_ns; + chan->duty_ns = duty_ns; + } return 0; } diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 63ae2ba43c..b69ffcae4b 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -209,7 +209,7 @@ config PANEL config SIMPLE_PANEL bool "Enable simple panel support" - depends on PANEL && BACKLIGHT + depends on PANEL && BACKLIGHT && DM_GPIO default y help This turns on a simple panel driver that enables a compatible diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c index 27ff7163f3..1f491a48d6 100644 --- a/drivers/video/cfb_console.c +++ b/drivers/video/cfb_console.c @@ -82,20 +82,6 @@ #endif /* - * Defines for the MB862xx driver - */ -#ifdef CONFIG_VIDEO_MB862xx - -#ifdef CONFIG_VIDEO_CORALP -#define VIDEO_FB_LITTLE_ENDIAN -#endif -#ifdef CONFIG_VIDEO_MB862xx_ACCEL -#define VIDEO_HW_RECTFILL -#define VIDEO_HW_BITBLT -#endif -#endif - -/* * Defines for the i.MX31 driver (mx3fb.c) */ #if defined(CONFIG_VIDEO_MX3) || defined(CONFIG_VIDEO_IPUV3) diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c index 9e32bc47cf..4c86215bd7 100644 --- a/drivers/video/pwm_backlight.c +++ b/drivers/video/pwm_backlight.c @@ -62,10 +62,17 @@ static int set_pwm(struct pwm_backlight_priv *priv) uint duty_cycle; int ret; - duty_cycle = priv->period_ns * (priv->cur_level - priv->min_level) / - (priv->max_level - priv->min_level); - ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns, - duty_cycle); + if (priv->period_ns) { + duty_cycle = priv->period_ns * (priv->cur_level - priv->min_level) / + (priv->max_level - priv->min_level); + ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns, + duty_cycle); + } else { + /* PWM driver will internally scale these like the above. */ + ret = pwm_set_config(priv->pwm, priv->channel, + priv->max_level - priv->min_level, + priv->cur_level - priv->min_level); + } if (ret) return log_ret(ret); @@ -213,10 +220,11 @@ static int pwm_backlight_of_to_plat(struct udevice *dev) log_debug("Cannot get PWM: ret=%d\n", ret); return log_ret(ret); } - if (args.args_count < 2) + if (args.args_count < 1) return log_msg_ret("Not enough arguments to pwm\n", -EINVAL); priv->channel = args.args[0]; - priv->period_ns = args.args[1]; + if (args.args_count > 1) + priv->period_ns = args.args[1]; if (args.args_count > 2) priv->polarity = args.args[2]; diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c index 0be60e169e..0ddf5e02d6 100644 --- a/drivers/video/rockchip/rk_edp.c +++ b/drivers/video/rockchip/rk_edp.c @@ -8,20 +8,21 @@ #include <clk.h> #include <display.h> #include <dm.h> +#include <dm/device_compat.h> #include <edid.h> #include <log.h> #include <malloc.h> #include <panel.h> #include <regmap.h> +#include <reset.h> #include <syscon.h> #include <asm/gpio.h> #include <asm/io.h> #include <asm/arch-rockchip/clock.h> +#include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/edp_rk3288.h> #include <asm/arch-rockchip/grf_rk3288.h> -#include <asm/arch-rockchip/hardware.h> -#include <dt-bindings/clock/rk3288-cru.h> -#include <linux/delay.h> +#include <asm/arch-rockchip/grf_rk3399.h> #define MAX_CR_LOOP 5 #define MAX_EQ_LOOP 5 @@ -37,18 +38,42 @@ static const char * const pre_emph_names[] = { #define DP_VOLTAGE_MAX DP_TRAIN_VOLTAGE_SWING_1200 #define DP_PRE_EMPHASIS_MAX DP_TRAIN_PRE_EMPHASIS_9_5 +#define RK3288_GRF_SOC_CON6 0x025c +#define RK3288_GRF_SOC_CON12 0x0274 +#define RK3399_GRF_SOC_CON20 0x6250 +#define RK3399_GRF_SOC_CON25 0x6264 + +enum rockchip_dp_types { + RK3288_DP = 0, + RK3399_EDP +}; + +struct rockchip_dp_data { + unsigned long reg_vop_big_little; + unsigned long reg_vop_big_little_sel; + unsigned long reg_ref_clk_sel; + unsigned long ref_clk_sel_bit; + enum rockchip_dp_types chip_type; +}; + struct rk_edp_priv { struct rk3288_edp *regs; - struct rk3288_grf *grf; + void *grf; struct udevice *panel; struct link_train link_train; u8 train_set[4]; }; -static void rk_edp_init_refclk(struct rk3288_edp *regs) +static void rk_edp_init_refclk(struct rk3288_edp *regs, enum rockchip_dp_types chip_type) { writel(SEL_24M, ®s->analog_ctl_2); - writel(REF_CLK_24M, ®s->pll_reg_1); + u32 reg; + + reg = REF_CLK_24M; + if (chip_type == RK3288_DP) + reg ^= REF_CLK_MASK; + writel(reg, ®s->pll_reg_1); + writel(LDO_OUTPUT_V_SEL_145 | KVCO_DEFALUT | CHG_PUMP_CUR_SEL_5US | V2L_CUR_SEL_1MA, ®s->pll_reg_2); @@ -1029,6 +1054,9 @@ static int rk_edp_probe(struct udevice *dev) struct display_plat *uc_plat = dev_get_uclass_plat(dev); struct rk_edp_priv *priv = dev_get_priv(dev); struct rk3288_edp *regs = priv->regs; + struct rockchip_dp_data *edp_data = (struct rockchip_dp_data *)dev_get_driver_data(dev); + struct reset_ctl dp_rst; + struct clk clk; int ret; @@ -1040,19 +1068,39 @@ static int rk_edp_probe(struct udevice *dev) return ret; } - int vop_id = uc_plat->source_id; - debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); + ret = reset_get_by_name(dev, "dp", &dp_rst); + if (ret) { + dev_err(dev, "failed to get dp reset (ret=%d)\n", ret); + return ret; + } - ret = clk_get_by_index(dev, 1, &clk); - if (ret >= 0) { - ret = clk_set_rate(&clk, 0); - clk_free(&clk); + ret = reset_assert(&dp_rst); + if (ret) { + dev_err(dev, "failed to assert dp reset (ret=%d)\n", ret); + return ret; } + udelay(20); + + ret = reset_deassert(&dp_rst); if (ret) { - debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); + dev_err(dev, "failed to deassert dp reset (ret=%d)\n", ret); return ret; } + int vop_id = uc_plat->source_id; + debug("%s, uc_plat=%p, vop_id=%u\n", __func__, uc_plat, vop_id); + + if (edp_data->chip_type == RK3288_DP) { + ret = clk_get_by_index(dev, 1, &clk); + if (ret >= 0) { + ret = clk_set_rate(&clk, 0); + clk_free(&clk); + } + if (ret) { + debug("%s: Failed to set EDP clock: ret=%d\n", __func__, ret); + return ret; + } + } ret = clk_get_by_index(uc_plat->src_dev, 0, &clk); if (ret >= 0) { ret = clk_set_rate(&clk, 192000000); @@ -1065,15 +1113,17 @@ static int rk_edp_probe(struct udevice *dev) } /* grf_edp_ref_clk_sel: from internal 24MHz or 27MHz clock */ - rk_setreg(&priv->grf->soc_con12, 1 << 4); + rk_setreg(priv->grf + edp_data->reg_ref_clk_sel, + edp_data->ref_clk_sel_bit); /* select epd signal from vop0 or vop1 */ - rk_clrsetreg(&priv->grf->soc_con6, (1 << 5), - (vop_id == 1) ? (1 << 5) : (0 << 5)); + rk_clrsetreg(priv->grf + edp_data->reg_vop_big_little, + edp_data->reg_vop_big_little_sel, + (vop_id == 1) ? edp_data->reg_vop_big_little_sel : 0); rockchip_edp_wait_hpd(priv); - rk_edp_init_refclk(regs); + rk_edp_init_refclk(regs, edp_data->chip_type); rk_edp_init_interrupt(regs); rk_edp_enable_sw_function(regs); ret = rk_edp_init_analog_func(regs); @@ -1089,8 +1139,25 @@ static const struct dm_display_ops dp_rockchip_ops = { .enable = rk_edp_enable, }; +static const struct rockchip_dp_data rk3399_edp = { + .reg_vop_big_little = RK3399_GRF_SOC_CON20, + .reg_vop_big_little_sel = BIT(5), + .reg_ref_clk_sel = RK3399_GRF_SOC_CON25, + .ref_clk_sel_bit = BIT(11), + .chip_type = RK3399_EDP, +}; + +static const struct rockchip_dp_data rk3288_dp = { + .reg_vop_big_little = RK3288_GRF_SOC_CON6, + .reg_vop_big_little_sel = BIT(5), + .reg_ref_clk_sel = RK3288_GRF_SOC_CON12, + .ref_clk_sel_bit = BIT(4), + .chip_type = RK3288_DP, +}; + static const struct udevice_id rockchip_dp_ids[] = { - { .compatible = "rockchip,rk3288-edp" }, + { .compatible = "rockchip,rk3288-edp", .data = (ulong)&rk3288_dp }, + { .compatible = "rockchip,rk3399-edp", .data = (ulong)&rk3399_edp }, { } }; diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c index 145c333020..fe0574870f 100644 --- a/drivers/video/rockchip/rk_vop.c +++ b/drivers/video/rockchip/rk_vop.c @@ -8,9 +8,11 @@ #include <clk.h> #include <display.h> #include <dm.h> +#include <dm/device_compat.h> #include <edid.h> #include <log.h> #include <regmap.h> +#include <reset.h> #include <syscon.h> #include <video.h> #include <asm/global_data.h> @@ -21,6 +23,8 @@ #include <asm/arch-rockchip/vop_rk3288.h> #include <dm/device-internal.h> #include <dm/uclass-internal.h> +#include <efi.h> +#include <efi_loader.h> #include <linux/bitops.h> #include <linux/err.h> #include <power/regulator.h> @@ -35,14 +39,16 @@ enum vop_pol { DCLK_INVERT = 3 }; -static void rkvop_enable(struct rk3288_vop *regs, ulong fbbase, +static void rkvop_enable(struct udevice *dev, struct rk3288_vop *regs, ulong fbbase, int fb_bits_per_pixel, - const struct display_timing *edid) + const struct display_timing *edid, + struct reset_ctl *dclk_rst) { u32 lb_mode; u32 rgb_mode; u32 hactive = edid->hactive.typ; u32 vactive = edid->vactive.typ; + int ret; writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1), ®s->win0_act_info); @@ -90,6 +96,18 @@ static void rkvop_enable(struct rk3288_vop *regs, ulong fbbase, writel(fbbase, ®s->win0_yrgb_mst); writel(0x01, ®s->reg_cfg_done); /* enable reg config */ + + ret = reset_assert(dclk_rst); + if (ret) { + dev_warn(dev, "failed to assert dclk reset (ret=%d)\n", ret); + return; + } + udelay(20); + + ret = reset_deassert(dclk_rst); + if (ret) + dev_warn(dev, "failed to deassert dclk reset (ret=%d)\n", ret); + } static void rkvop_set_pin_polarity(struct udevice *dev, @@ -236,12 +254,12 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) struct clk clk; enum video_log2_bpp l2bpp; ofnode remote; + const char *compat; + struct reset_ctl dclk_rst; - debug("%s(%s, %lu, %s)\n", __func__, + debug("%s(%s, 0x%lx, %s)\n", __func__, dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); - vop_id = ofnode_read_s32_default(ep_node, "reg", -1); - debug("vop_id=%d\n", vop_id); ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); if (ret) return ret; @@ -283,6 +301,28 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) if (disp) break; }; + compat = ofnode_get_property(remote, "compatible", NULL); + if (!compat) { + debug("%s(%s): Failed to find compatible property\n", + __func__, dev_read_name(dev)); + return -EINVAL; + } + if (strstr(compat, "edp")) { + vop_id = VOP_MODE_EDP; + } else if (strstr(compat, "mipi")) { + vop_id = VOP_MODE_MIPI; + } else if (strstr(compat, "hdmi")) { + vop_id = VOP_MODE_HDMI; + } else if (strstr(compat, "cdn-dp")) { + vop_id = VOP_MODE_DP; + } else if (strstr(compat, "lvds")) { + vop_id = VOP_MODE_LVDS; + } else { + debug("%s(%s): Failed to find vop mode for %s\n", + __func__, dev_read_name(dev), compat); + return -EINVAL; + } + debug("vop_id=%d\n", vop_id); disp_uc_plat = dev_get_uclass_plat(disp); debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); @@ -332,7 +372,14 @@ static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) } rkvop_mode_set(dev, &timing, vop_id); - rkvop_enable(regs, fbbase, 1 << l2bpp, &timing); + + ret = reset_get_by_name(dev, "dclk", &dclk_rst); + if (ret) { + dev_err(dev, "failed to get dclk reset (ret=%d)\n", ret); + return ret; + } + + rkvop_enable(dev, regs, fbbase, 1 << l2bpp, &timing, &dclk_rst); ret = display_enable(disp, 1 << l2bpp, &timing); if (ret) @@ -369,11 +416,36 @@ int rk_vop_probe(struct udevice *dev) struct rk_vop_priv *priv = dev_get_priv(dev); int ret = 0; ofnode port, node; + struct reset_ctl ahb_rst; /* Before relocation we don't need to do anything */ if (!(gd->flags & GD_FLG_RELOC)) return 0; + ret = reset_get_by_name(dev, "ahb", &ahb_rst); + if (ret) { + dev_err(dev, "failed to get ahb reset (ret=%d)\n", ret); + return ret; + } + + ret = reset_assert(&ahb_rst); + if (ret) { + dev_err(dev, "failed to assert ahb reset (ret=%d)\n", ret); + return ret; + } + udelay(20); + + ret = reset_deassert(&ahb_rst); + if (ret) { + dev_err(dev, "failed to deassert ahb reset (ret=%d)\n", ret); + return ret; + } + +#if defined(CONFIG_EFI_LOADER) + debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base); + efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); +#endif + priv->regs = (struct rk3288_vop *)dev_read_addr(dev); /* diff --git a/drivers/video/tegra124/sor.c b/drivers/video/tegra124/sor.c index 95976ee573..ef1a2e6dc0 100644 --- a/drivers/video/tegra124/sor.c +++ b/drivers/video/tegra124/sor.c @@ -671,8 +671,8 @@ static void tegra_dc_sor_config_panel(struct tegra_dc_sor_data *sor, CSTM_ROTCLK_DEFAULT_MASK | CSTM_LVDS_EN_ENABLE, 2 << CSTM_ROTCLK_SHIFT | - is_lvds ? CSTM_LVDS_EN_ENABLE : - CSTM_LVDS_EN_DISABLE); + (is_lvds ? CSTM_LVDS_EN_ENABLE : + CSTM_LVDS_EN_DISABLE)); tegra_dc_sor_config_pwm(sor, 1024, 1024); } diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c index 66de22318f..1e6f07ff4b 100644 --- a/drivers/video/video_bmp.c +++ b/drivers/video/video_bmp.c @@ -328,7 +328,7 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, for (j = 0; j < width; j++) fb_put_word(&fb, &bmap); - bmap += (padded_width - width) * 2; + bmap += (padded_width - width); fb -= width * 2 + priv->line_length; } break; @@ -352,7 +352,7 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, } } fb -= priv->line_length + width * (bpix / 8); - bmap += (padded_width - width) * 3; + bmap += (padded_width - width); } break; #endif /* CONFIG_BMP_24BPP */ diff --git a/fs/fat/fat.c b/fs/fat/fat.c index ccba268f61..c561d82b35 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -1147,42 +1147,12 @@ int file_fat_detectfs(void) return 1; } -#if defined(CONFIG_IDE) || \ - defined(CONFIG_SATA) || \ - defined(CONFIG_SCSI) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) - printf("Interface: "); - switch (cur_dev->if_type) { - case IF_TYPE_IDE: - printf("IDE"); - break; - case IF_TYPE_SATA: - printf("SATA"); - break; - case IF_TYPE_SCSI: - printf("SCSI"); - break; - case IF_TYPE_ATAPI: - printf("ATAPI"); - break; - case IF_TYPE_USB: - printf("USB"); - break; - case IF_TYPE_DOC: - printf("DOC"); - break; - case IF_TYPE_MMC: - printf("MMC"); - break; - default: - printf("Unknown"); + if (IS_ENABLED(CONFIG_HAVE_BLOCK_DEVICE)) { + printf("Interface: %s\n", blk_get_if_type_name(cur_dev->if_type)); + printf(" Device %d: ", cur_dev->devnum); + dev_print(cur_dev); } - printf("\n Device %d: ", cur_dev->devnum); - dev_print(cur_dev); -#endif - if (read_bootsectandvi(&bs, &volinfo, &fatsize)) { printf("\nNo valid FAT fs found\n"); return 1; diff --git a/include/charset.h b/include/charset.h index a911160f19..b93d023092 100644 --- a/include/charset.h +++ b/include/charset.h @@ -13,7 +13,7 @@ #define MAX_UTF8_PER_UTF16 3 -/** +/* * codepage_437 - Unicode to codepage 437 translation table */ extern const u16 codepage_437[128]; diff --git a/include/cros_ec.h b/include/cros_ec.h index eddc23d48f..9396b4d246 100644 --- a/include/cros_ec.h +++ b/include/cros_ec.h @@ -513,6 +513,19 @@ int cros_ec_efs_verify(struct udevice *dev, enum ec_flash_region region); int cros_ec_battery_cutoff(struct udevice *dev, uint8_t flags); /** + * cros_ec_set_pwm_duty() - Set duty cycle of a generic pwm + * + * Note that duty value needs to be passed to the EC as a 16 bit number + * for increased precision. + * + * @param dev CROS-EC device + * @param index Index of the pwm + * @param duty Desired duty cycle, in 0..EC_PWM_MAX_DUTY range. + * @return 0 if OK, -ve on error + */ +int cros_ec_set_pwm_duty(struct udevice *dev, uint8_t index, uint16_t duty); + +/** * cros_ec_read_limit_power() - Check if power is limited by batter/charger * * Sometimes the battery is low and / or the device is connected to a charger diff --git a/include/efi.h b/include/efi.h index 503fbf060b..6417a9b8c5 100644 --- a/include/efi.h +++ b/include/efi.h @@ -180,9 +180,13 @@ enum efi_mem_type { */ EFI_PAL_CODE, /* - * Non-volatile memory. + * Byte addressable non-volatile memory. */ EFI_PERSISTENT_MEMORY_TYPE, + /* + * Unaccepted memory must be accepted by boot target before usage. + */ + EFI_UNACCEPTED_MEMORY_TYPE, EFI_MAX_MEMORY_TYPE, }; @@ -201,6 +205,7 @@ enum efi_mem_type { ((u64)0x0000000000010000ULL) /* higher reliability */ #define EFI_MEMORY_RO ((u64)0x0000000000020000ULL) /* read-only */ #define EFI_MEMORY_SP ((u64)0x0000000000040000ULL) /* specific-purpose memory (SPM) */ +#define EFI_MEMORY_CPU_CRYPTO ((u64)0x0000000000080000ULL) /* cryptographically protectable */ #define EFI_MEMORY_RUNTIME ((u64)0x8000000000000000ULL) /* range requires runtime mapping */ #define EFI_MEM_DESC_VERSION 1 diff --git a/include/efi_selftest.h b/include/efi_selftest.h index 07b619901c..94ceb14733 100644 --- a/include/efi_selftest.h +++ b/include/efi_selftest.h @@ -53,21 +53,25 @@ */ enum efi_test_phase { /** - * @EFI_EXECUTE_BEFORE_BOOTTIME_EXIT: - execute before ExitBootServices + * @EFI_EXECUTE_BEFORE_BOOTTIME_EXIT: * * Setup, execute, and teardown are executed before ExitBootServices(). */ EFI_EXECUTE_BEFORE_BOOTTIME_EXIT = 1, /** - * @EFI_SETUP_BEFORE_BOOTTIME_EXIT: - setup before ExitBootServices + * @EFI_SETUP_BEFORE_BOOTTIME_EXIT: * * Setup is executed before ExitBootServices() while execute, and * teardown are executed after ExitBootServices(). */ EFI_SETUP_BEFORE_BOOTTIME_EXIT, /** - * @EFI_SETTING_VIRTUAL_ADDRESS_MAP - calls SetVirtualAddressMap() - * Execute calls SetVirtualAddressMap(). + * @EFI_SETTING_VIRTUAL_ADDRESS_MAP: + * + * Execute calls SetVirtualAddressMap(). Setup is executed before + * ExitBootServices() while execute is executed after + * ExitBootServices(), and after the execute of tests marked as + * @EFI_SETUP_BEFORE_BOOTTIME_EXIT. Teardown is executed thereafter. */ EFI_SETTING_VIRTUAL_ADDRESS_MAP, }; diff --git a/include/linker_lists.h b/include/linker_lists.h index 81a280a884..2fea54c834 100644 --- a/include/linker_lists.h +++ b/include/linker_lists.h @@ -219,6 +219,10 @@ * * This is like ll_entry_get(), but without the extra code, so it is suitable * for putting into data structures. + * + * @_type: C type of the list entry, e.g. 'struct foo' + * @_name: name of the entry + * @_list: name of the list */ #define ll_entry_ref(_type, _name, _list) \ ((_type *)&_u_boot_list_2_##_list##_2_##_name) diff --git a/include/pwm.h b/include/pwm.h index f9959706ce..668551e4b8 100644 --- a/include/pwm.h +++ b/include/pwm.h @@ -17,6 +17,10 @@ struct pwm_ops { /** * set_config() - Set the PWM configuration * + * Change both the PWM device's period and it's duty period if + * possible. Otherwise, set an appropriate duty period that best + * matches the given period_ns / duty_ns ratio for the device. + * * @dev: PWM device to update * @channel: PWM channel to update * @period_ns: PWM period in nanoseconds @@ -51,6 +55,10 @@ struct pwm_ops { /** * pwm_set_config() - Set the PWM configuration * + * Change both the PWM device's period and it's duty period if + * possible. Otherwise, set an appropriate duty period that best + * matches the given period_ns / duty_ns ratio for the device. + * * @dev: PWM device to update * @channel: PWM channel to update * @period_ns: PWM period in nanoseconds diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index e44f004f3f..0b99d7c774 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -173,6 +173,7 @@ config EFI_CAPSULE_AUTHENTICATE select X509_CERTIFICATE_PARSER select PKCS7_MESSAGE_PARSER select PKCS7_VERIFY + select IMAGE_SIGN_INFO default n help Select this option if you want to enable capsule diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c index 46c8011344..1fe19237f9 100644 --- a/lib/efi_loader/efi_bootmgr.c +++ b/lib/efi_loader/efi_bootmgr.c @@ -31,38 +31,6 @@ static const struct efi_runtime_services *rs; */ /** - * get_var() - get UEFI variable - * - * It is the caller's duty to free the returned buffer. - * - * @name: name of variable - * @vendor: vendor GUID of variable - * @size: size of allocated buffer - * Return: buffer with variable data or NULL - */ -static void *get_var(u16 *name, const efi_guid_t *vendor, - efi_uintn_t *size) -{ - efi_status_t ret; - void *buf = NULL; - - *size = 0; - ret = efi_get_variable_int(name, vendor, NULL, size, buf, NULL); - if (ret == EFI_BUFFER_TOO_SMALL) { - buf = malloc(*size); - ret = efi_get_variable_int(name, vendor, NULL, size, buf, NULL); - } - - if (ret != EFI_SUCCESS) { - free(buf); - *size = 0; - return NULL; - } - - return buf; -} - -/** * try_load_entry() - try to load image for boot option * * Attempt to load load-option number 'n', returning device_path and file_path @@ -89,7 +57,7 @@ static efi_status_t try_load_entry(u16 n, efi_handle_t *handle, varname[6] = hexmap[(n & 0x00f0) >> 4]; varname[7] = hexmap[(n & 0x000f) >> 0]; - load_option = get_var(varname, &efi_global_variable_guid, &size); + load_option = efi_get_var(varname, &efi_global_variable_guid, &size); if (!load_option) return EFI_LOAD_ERROR; @@ -210,7 +178,7 @@ efi_status_t efi_bootmgr_load(efi_handle_t *handle, void **load_options) } /* BootOrder */ - bootorder = get_var(L"BootOrder", &efi_global_variable_guid, &size); + bootorder = efi_get_var(L"BootOrder", &efi_global_variable_guid, &size); if (!bootorder) { log_info("BootOrder not defined\n"); ret = EFI_NOT_FOUND; diff --git a/lib/efi_loader/efi_esrt.c b/lib/efi_loader/efi_esrt.c index 947bdb5e95..40f53260e4 100644 --- a/lib/efi_loader/efi_esrt.c +++ b/lib/efi_loader/efi_esrt.c @@ -120,8 +120,8 @@ efi_status_t efi_esrt_allocate_install(u32 num_entries) (void **)&new_esrt); if (ret != EFI_SUCCESS) { - EFI_PRINT("ESRT cannot allocate memory for %d entries (%d bytes)\n", - num_entries, efi_esrt_entries_to_size(num_entries)); + EFI_PRINT("ESRT cannot allocate memory for %u entries (%u bytes)\n", + num_entries, size); return ret; } @@ -180,7 +180,7 @@ struct efi_system_resource_entry *esrt_find_entry(efi_guid_t *img_fw_class) /* Check if the image with img_fw_class is already in the ESRT. */ for (u32 idx = 0; idx < filled_entries; idx++) { if (!guidcmp(&entry[idx].fw_class, img_fw_class)) { - EFI_PRINT("ESRT found entry for image %pUl at index %d\n", + EFI_PRINT("ESRT found entry for image %pUl at index %u\n", img_fw_class, idx); return &entry[idx]; } @@ -202,7 +202,7 @@ struct efi_system_resource_entry *esrt_find_entry(efi_guid_t *img_fw_class) */ esrt->fw_resource_count++; entry[filled_entries].fw_class = *img_fw_class; - EFI_PRINT("ESRT allocated new entry for image %pUl at index %d\n", + EFI_PRINT("ESRT allocated new entry for image %pUl at index %u\n", img_fw_class, filled_entries); return &entry[filled_entries]; @@ -316,7 +316,7 @@ efi_status_t efi_esrt_populate(void) { efi_handle_t *base_handle = NULL; efi_handle_t *it_handle; - size_t no_handles = 0; + efi_uintn_t no_handles = 0; struct efi_firmware_management_protocol *fmp; efi_status_t ret; u32 num_entries = 0; @@ -341,7 +341,7 @@ efi_status_t efi_esrt_populate(void) return EFI_SUCCESS; } - EFI_PRINT("ESRT populate esrt from (%ld) available FMP handles\n", + EFI_PRINT("ESRT populate esrt from (%zd) available FMP handles\n", no_handles); /* @@ -363,7 +363,7 @@ efi_status_t efi_esrt_populate(void) &handler); if (ret != EFI_SUCCESS) { - EFI_PRINT("ESRT Unable to find FMP handle (%d)\n", + EFI_PRINT("ESRT Unable to find FMP handle (%u)\n", idx); goto out; } @@ -414,7 +414,7 @@ efi_status_t efi_esrt_populate(void) EFI_CALL(efi_free_pool(img_info)); } - EFI_PRINT("ESRT create table with %d entries\n", num_entries); + EFI_PRINT("ESRT create table with %u entries\n", num_entries); /* * Allocate an ESRT with the sufficient number of entries to accommodate * all the FMPs in the system. @@ -435,7 +435,7 @@ efi_status_t efi_esrt_populate(void) &handler)); if (ret != EFI_SUCCESS) { - EFI_PRINT("ESRT unable to find FMP handle (%d)\n", + EFI_PRINT("ESRT unable to find FMP handle (%u)\n", idx); break; } diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c index 09046844c7..ed86a220fb 100644 --- a/lib/efi_loader/efi_tcg2.c +++ b/lib/efi_loader/efi_tcg2.c @@ -176,13 +176,14 @@ static efi_status_t tcg2_agile_log_append(u32 pcr_index, u32 event_type, struct tpml_digest_values *digest_list, u32 size, u8 event[]) { - void *log = event_log.buffer + event_log.pos; + void *log = (void *)((uintptr_t)event_log.buffer + event_log.pos); size_t pos; int i; u32 event_size; if (event_log.get_event_called) - log = event_log.final_buffer + event_log.final_pos; + log = (void *)((uintptr_t)event_log.final_buffer + + event_log.final_pos); /* * size refers to the length of event[] only, we need to check against @@ -197,24 +198,24 @@ static efi_status_t tcg2_agile_log_append(u32 pcr_index, u32 event_type, put_unaligned_le32(pcr_index, log); pos = offsetof(struct tcg_pcr_event2, event_type); - put_unaligned_le32(event_type, log + pos); + put_unaligned_le32(event_type, (void *)((uintptr_t)log + pos)); pos = offsetof(struct tcg_pcr_event2, digests); /* count */ - put_unaligned_le32(digest_list->count, log + pos); + put_unaligned_le32(digest_list->count, (void *)((uintptr_t)log + pos)); pos += offsetof(struct tpml_digest_values, digests); for (i = 0; i < digest_list->count; i++) { u16 hash_alg = digest_list->digests[i].hash_alg; u8 *digest = (u8 *)&digest_list->digests[i].digest; - put_unaligned_le16(hash_alg, log + pos); + put_unaligned_le16(hash_alg, (void *)((uintptr_t)log + pos)); pos += offsetof(struct tpmt_ha, digest); - memcpy(log + pos, digest, alg_to_len(hash_alg)); + memcpy((void *)((uintptr_t)log + pos), digest, alg_to_len(hash_alg)); pos += alg_to_len(hash_alg); } - put_unaligned_le32(size, log + pos); + put_unaligned_le32(size, (void *)((uintptr_t)log + pos)); pos += sizeof(u32); /* tcg_pcr_event2 event_size*/ - memcpy(log + pos, event, size); + memcpy((void *)((uintptr_t)log + pos), event, size); pos += size; /* make sure the calculated buffer is what we checked against */ @@ -1046,7 +1047,7 @@ static efi_status_t efi_init_event_log(void) put_unaligned_le32(0, &event_header->pcr_index); put_unaligned_le32(EV_NO_ACTION, &event_header->event_type); memset(&event_header->digest, 0, sizeof(event_header->digest)); - ret = create_specid_event(dev, event_log.buffer + sizeof(*event_header), + ret = create_specid_event(dev, (void *)((uintptr_t)event_log.buffer + sizeof(*event_header)), &spec_event_size); if (ret != EFI_SUCCESS) goto out; diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index b735865e17..425a7ecb89 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3937,7 +3937,6 @@ CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP CONFIG_VIDEO_BCM2835 CONFIG_VIDEO_BMP_LOGO -CONFIG_VIDEO_CORALP CONFIG_VIDEO_DA8XX CONFIG_VIDEO_FONT_4X6 CONFIG_VIDEO_LCD_I2C_BUS diff --git a/test/dm/pwm.c b/test/dm/pwm.c index 0de6dba1ba..b624cf3d65 100644 --- a/test/dm/pwm.c +++ b/test/dm/pwm.c @@ -6,6 +6,7 @@ #include <common.h> #include <dm.h> #include <pwm.h> +#include <asm/test.h> #include <dm/test.h> #include <test/test.h> #include <test/ut.h> @@ -14,6 +15,10 @@ static int dm_test_pwm_base(struct unit_test_state *uts) { struct udevice *dev; + uint period_ns; + uint duty_ns; + bool enable; + bool polarity; ut_assertok(uclass_get_device(UCLASS_PWM, 0, &dev)); ut_assertnonnull(dev); @@ -24,6 +29,12 @@ static int dm_test_pwm_base(struct unit_test_state *uts) ut_asserteq(-ENOSPC, pwm_set_enable(dev, 3, true)); ut_assertok(pwm_set_invert(dev, 0, true)); + ut_assertok(pwm_set_config(dev, 2, 100, 50)); + ut_assertok(sandbox_pwm_get_config(dev, 2, &period_ns, &duty_ns, + &enable, &polarity)); + ut_asserteq(period_ns, 4096); + ut_asserteq(duty_ns, 50 * 4096 / 100); + ut_assertok(uclass_get_device(UCLASS_PWM, 1, &dev)); ut_asserteq(-ENODEV, uclass_get_device(UCLASS_PWM, 2, &dev)); diff --git a/tools/mkeficapsule.c b/tools/mkeficapsule.c index f272512451..de0a628988 100644 --- a/tools/mkeficapsule.c +++ b/tools/mkeficapsule.c @@ -64,14 +64,14 @@ static void print_usage(void) printf("Usage: %s [options] <output file>\n" "Options:\n" - "\t--fit <fit image> new FIT image file\n" - "\t--raw <raw image> new raw image file\n" - "\t--index <index> update image index\n" - "\t--instance <instance> update hardware instance\n" - "\t--public-key <key file> public key esl file\n" - "\t--dtb <dtb file> dtb file\n" - "\t--overlay the dtb file is an overlay\n" - "\t--help print a help message\n", + "\t-f, --fit <fit image> new FIT image file\n" + "\t-r, --raw <raw image> new raw image file\n" + "\t-i, --index <index> update image index\n" + "\t-I, --instance <instance> update hardware instance\n" + "\t-K, --public-key <key file> public key esl file\n" + "\t-D, --dtb <dtb file> dtb file\n" + "\t-O, --overlay the dtb file is an overlay\n" + "\t-h, --help print a help message\n", tool_name); } |