diff options
73 files changed, 281 insertions, 575 deletions
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 88438e77a1..636500d6ce 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -1,6 +1,7 @@ variables: windows_vm: vs2017-win2016 ubuntu_vm: ubuntu-18.04 + macos_vm: macOS-10.15 ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200403-27Apr2020 # Add '-u 0' options for Azure pipelines, otherwise we get "permission # denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer", @@ -44,6 +45,20 @@ jobs: # Tell MSYS2 not to ‘cd’ our startup directory to HOME CHERE_INVOKING: yes + - job: tools_only_macOS + displayName: 'Ensure host tools build for macOS X' + pool: + vmImage: $(macos_vm) + steps: + - script: brew install make + displayName: Brew install dependencies + - script: | + gmake tools-only_config tools-only NO_SDL=1 \ + HOSTCFLAGS="-I/usr/local/opt/openssl@1.1/include" \ + HOSTLDFLAGS="-L/usr/local/opt/openssl@1.1/lib" \ + -j$(sysctl -n hw.logicalcpu) + displayName: 'Perform tools-only build' + - job: cppcheck displayName: 'Static code analysis with cppcheck' pool: diff --git a/MAINTAINERS b/MAINTAINERS index 9da0459bf7..1fd975c72f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -275,6 +275,7 @@ M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> S: Maintained F: arch/arm/include/asm/arch-owl/ F: arch/arm/mach-owl/ +F: doc/board/actions/ F: drivers/clk/owl/ F: drivers/serial/serial_owl.c F: include/configs/owl-common.h @@ -590,6 +591,7 @@ M: Angelo Dureghello <angelo@sysam.it> S: Maintained T: git https://gitlab.denx.de/u-boot/custodians/u-boot-coldfire.git F: arch/m68k/ +F: doc/arch/m68k.rst DFU M: Lukasz Majewski <lukma@denx.de> diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 1e3f574403..7a40b56acd 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -528,6 +528,7 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop); #ifdef CONFIG_ARMV7_PSCI void psci_arch_cpu_entry(void); +void psci_arch_init(void); u32 psci_version(void); s32 psci_features(u32 function_id, u32 psci_fid); s32 psci_cpu_off(void); diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c index 5d84798ca4..a462538521 100644 --- a/arch/arm/mach-sunxi/dram_sunxi_dw.c +++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c @@ -79,15 +79,15 @@ enum { MBUS_QOS_HIGHEST }; -inline void mbus_configure_port(u8 port, - bool bwlimit, - bool priority, - u8 qos, /* MBUS_QOS_LOWEST .. MBUS_QOS_HIGEST */ - u8 waittime, /* 0 .. 0xf */ - u8 acs, /* 0 .. 0xff */ - u16 bwl0, /* 0 .. 0xffff, bandwidth limit in MB/s */ - u16 bwl1, - u16 bwl2) +static inline void mbus_configure_port(u8 port, + bool bwlimit, + bool priority, + u8 qos, /* MBUS_QOS_LOWEST .. MBUS_QOS_HIGEST */ + u8 waittime, /* 0 .. 0xf */ + u8 acs, /* 0 .. 0xff */ + u16 bwl0, /* 0 .. 0xffff, bandwidth limit in MB/s */ + u16 bwl1, + u16 bwl2) { struct sunxi_mctl_com_reg * const mctl_com = (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE; diff --git a/board/amlogic/p200/README.nanopi-k2 b/board/amlogic/p200/README.nanopi-k2 index d450d3c2b2..c8dec3569b 100644 --- a/board/amlogic/p200/README.nanopi-k2 +++ b/board/amlogic/p200/README.nanopi-k2 @@ -24,7 +24,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make nanopi-k2_defconfig > make diff --git a/board/amlogic/p200/README.odroid-c2 b/board/amlogic/p200/README.odroid-c2 index bed48c5728..3b9f80df29 100644 --- a/board/amlogic/p200/README.odroid-c2 +++ b/board/amlogic/p200/README.odroid-c2 @@ -29,7 +29,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make odroid-c2_defconfig > make diff --git a/board/amlogic/p200/README.p200 b/board/amlogic/p200/README.p200 index 01d82d1e79..84d5ca5356 100644 --- a/board/amlogic/p200/README.p200 +++ b/board/amlogic/p200/README.p200 @@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make p200_defconfig > make diff --git a/board/amlogic/p201/README.p201 b/board/amlogic/p201/README.p201 index c251096ce1..4bb5e95905 100644 --- a/board/amlogic/p201/README.p201 +++ b/board/amlogic/p201/README.p201 @@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make p201_defconfig > make diff --git a/board/amlogic/p212/README.khadas-vim b/board/amlogic/p212/README.khadas-vim index a2c7606454..ccf933861b 100644 --- a/board/amlogic/p212/README.khadas-vim +++ b/board/amlogic/p212/README.khadas-vim @@ -30,7 +30,6 @@ Currently the u-boot port supports the following devices: U-Boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make khadas-vim_defconfig > make diff --git a/board/amlogic/p212/README.libretech-ac b/board/amlogic/p212/README.libretech-ac index 538604261b..3f713ec326 100644 --- a/board/amlogic/p212/README.libretech-ac +++ b/board/amlogic/p212/README.libretech-ac @@ -25,7 +25,6 @@ Currently the U-Boot port supports the following devices: U-Boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make libretech-ac_defconfig > make diff --git a/board/amlogic/p212/README.libretech-cc b/board/amlogic/p212/README.libretech-cc index 6af7de3cfa..74434d4435 100644 --- a/board/amlogic/p212/README.libretech-cc +++ b/board/amlogic/p212/README.libretech-cc @@ -30,7 +30,6 @@ Currently the U-Boot port supports the following devices: U-Boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make libretech-cc_defconfig > make diff --git a/board/amlogic/p212/README.p212 b/board/amlogic/p212/README.p212 index ef5370c763..3776f24493 100644 --- a/board/amlogic/p212/README.p212 +++ b/board/amlogic/p212/README.p212 @@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make p212_defconfig > make diff --git a/board/amlogic/q200/README.khadas-vim2 b/board/amlogic/q200/README.khadas-vim2 index 8bcfc296f3..595998c4fa 100644 --- a/board/amlogic/q200/README.khadas-vim2 +++ b/board/amlogic/q200/README.khadas-vim2 @@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices: U-Boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make khadas-vim2_defconfig > make diff --git a/board/amlogic/q200/README.q200 b/board/amlogic/q200/README.q200 index 55d730a0d2..d4142c88bd 100644 --- a/board/amlogic/q200/README.q200 +++ b/board/amlogic/q200/README.q200 @@ -30,7 +30,6 @@ Currently the u-boot port supports the following devices: U-Boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make khadas-vim2_defconfig > make diff --git a/board/amlogic/s400/README b/board/amlogic/s400/README index ab21998dc8..a48db22a42 100644 --- a/board/amlogic/s400/README +++ b/board/amlogic/s400/README @@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make s400_defconfig > make diff --git a/board/amlogic/sei510/README b/board/amlogic/sei510/README index e47ebc7b3a..d9358aa501 100644 --- a/board/amlogic/sei510/README +++ b/board/amlogic/sei510/README @@ -22,7 +22,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make sei510_defconfig > make diff --git a/board/amlogic/sei610/README b/board/amlogic/sei610/README index 1cc2b3c2a4..d96a94b5e9 100644 --- a/board/amlogic/sei610/README +++ b/board/amlogic/sei610/README @@ -18,7 +18,6 @@ specifications: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make sei610_defconfig > make diff --git a/board/amlogic/u200/README b/board/amlogic/u200/README index bffac5e7ae..a4080eb299 100644 --- a/board/amlogic/u200/README +++ b/board/amlogic/u200/README @@ -27,7 +27,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make u200_defconfig > make diff --git a/board/amlogic/w400/README.khadas-vim3 b/board/amlogic/w400/README.khadas-vim3 index 45ef90c1b0..399bf49295 100644 --- a/board/amlogic/w400/README.khadas-vim3 +++ b/board/amlogic/w400/README.khadas-vim3 @@ -29,7 +29,6 @@ Currently the U-Boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make khadas-vim3_defconfig > make diff --git a/board/amlogic/w400/README.khadas-vim3l b/board/amlogic/w400/README.khadas-vim3l index 0afff16c0c..b2d9abbfd9 100644 --- a/board/amlogic/w400/README.khadas-vim3l +++ b/board/amlogic/w400/README.khadas-vim3l @@ -29,7 +29,6 @@ Currently the U-Boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make khadas-vim3l_defconfig > make diff --git a/board/amlogic/w400/README.odroid-n2 b/board/amlogic/w400/README.odroid-n2 index a8f2c3d7da..8142eebea0 100644 --- a/board/amlogic/w400/README.odroid-n2 +++ b/board/amlogic/w400/README.odroid-n2 @@ -28,7 +28,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make odroid-n2_defconfig > make diff --git a/board/amlogic/w400/README.w400 b/board/amlogic/w400/README.w400 index 25b786d817..c129717a11 100644 --- a/board/amlogic/w400/README.w400 +++ b/board/amlogic/w400/README.w400 @@ -27,7 +27,6 @@ Currently the u-boot port supports the following devices: u-boot compilation ================== - > export ARCH=arm > export CROSS_COMPILE=aarch64-none-elf- > make w400_defconfig > make diff --git a/board/beacon/imx8mm/README b/board/beacon/imx8mm/README index 4223fbd15d..dce176fa0b 100644 --- a/board/beacon/imx8mm/README +++ b/board/beacon/imx8mm/README @@ -26,7 +26,7 @@ $ cp firmware-imx-8.5/firmware/ddr/synopsys/lpddr4*.bin $(srctree) Build U-Boot ============ $ make imx8mm_beacon_defconfig -$ make flash.bin ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- ATF_LOAD_ADDR=0x920000 +$ make flash.bin CROSS_COMPILE=aarch64-linux-gnu- ATF_LOAD_ADDR=0x920000 Burn U-Boot to microSD Card =========================== diff --git a/board/freescale/c29xpcie/README b/board/freescale/c29xpcie/README index 2e249cbb3a..a6120f1845 100644 --- a/board/freescale/c29xpcie/README +++ b/board/freescale/c29xpcie/README @@ -56,7 +56,6 @@ Note: 1 stands for 'off', 0 stands for 'on' Build and program U-Boot to NOR flash ================================== 1. Build u-boot.bin image example: - export ARCH=powerpc export CROSS_COMPILE=/your_path/powerpc-linux-gnu- make C293PCIE diff --git a/board/freescale/p1010rdb/README.P1010RDB-PA b/board/freescale/p1010rdb/README.P1010RDB-PA index 105942f7a5..46c61237c7 100644 --- a/board/freescale/p1010rdb/README.P1010RDB-PA +++ b/board/freescale/p1010rdb/README.P1010RDB-PA @@ -98,7 +98,6 @@ instead of to CAN/UART1. Build and burn U-Boot to NOR flash ================================== 1. Build u-boot.bin image - export ARCH=powerpc export CROSS_COMPILE=/your_path/powerpc-linux-gnu- make P1010RDB_NOR diff --git a/board/freescale/p1010rdb/README.P1010RDB-PB b/board/freescale/p1010rdb/README.P1010RDB-PB index dc82f0df09..4a3b389877 100644 --- a/board/freescale/p1010rdb/README.P1010RDB-PB +++ b/board/freescale/p1010rdb/README.P1010RDB-PB @@ -128,7 +128,6 @@ To enable IFC in case of SD boot Build images for different boot mode ==================================== First setup cross compile environment on build host - $ export ARCH=powerpc $ export CROSS_COMPILE=<your-compiler-path>/powerpc-linux-gnu- 1. For NOR boot diff --git a/board/logicpd/imx6/README b/board/logicpd/imx6/README index 26d053a32c..19f79c5734 100644 --- a/board/logicpd/imx6/README +++ b/board/logicpd/imx6/README @@ -17,7 +17,7 @@ Building U-Boot for Logic PD Development Kit To build U-Boot for the Dual and Quad variants: make imx6q_logic_defconfig - make u-boot.imx ARCH=arm CROSS_COMPILE=arm-linux- + make u-boot.imx CROSS_COMPILE=arm-linux- Flashing U-Boot into the SD card diff --git a/board/rockchip/evb_rk3229/README b/board/rockchip/evb_rk3229/README index 93328c75b2..9068225e27 100644 --- a/board/rockchip/evb_rk3229/README +++ b/board/rockchip/evb_rk3229/README @@ -22,7 +22,6 @@ Compile the U-Boot > cd ../u-boot > export CROSS_COMPILE=arm-linux-gnueabihf- - > export ARCH=arm > make evb-rk3229_defconfig > make > make u-boot.itb diff --git a/board/rockchip/evb_rk3399/README b/board/rockchip/evb_rk3399/README index da7ae89ab1..c6f58203eb 100644 --- a/board/rockchip/evb_rk3399/README +++ b/board/rockchip/evb_rk3399/README @@ -54,7 +54,6 @@ Compile U-Boot ============== > cd ../u-boot - > export ARCH=arm64 > export CROSS_COMPILE=aarch64-linux-gnu- > make evb-rk3399_defconfig for firefly-rk3399, use below instead: diff --git a/board/sifive/fu540/MAINTAINERS b/board/sifive/fu540/MAINTAINERS index 5381fc0639..27620727bd 100644 --- a/board/sifive/fu540/MAINTAINERS +++ b/board/sifive/fu540/MAINTAINERS @@ -5,5 +5,6 @@ M: Anup Patel <anup.patel@wdc.com> M: Atish Patra <atish.patra@wdc.com> S: Maintained F: board/sifive/fu540/ +F: doc/board/sifive/fu540.rst F: include/configs/sifive-fu540.h F: configs/sifive_fu540_defconfig diff --git a/board/technexion/pico-imx7d/README.pico-imx7d_BL33 b/board/technexion/pico-imx7d/README.pico-imx7d_BL33 index 40324ffe5f..1b346093b8 100644 --- a/board/technexion/pico-imx7d/README.pico-imx7d_BL33 +++ b/board/technexion/pico-imx7d/README.pico-imx7d_BL33 @@ -4,7 +4,7 @@ The boot sequence is ATF -> OPTEE -> U-Boot -> Linux. U-Boot is in non-secure world in this case. - Build u-boot - Set environment variable of CROSS_COMPILE for your toolchain and ARCH=arm + Set environment variable of CROSS_COMPILE for your toolchain $ make pico-imx7d_bl33_defconfig $ make all diff --git a/board/theobroma-systems/lion_rk3368/README b/board/theobroma-systems/lion_rk3368/README index ad3ac93bd4..7488b18326 100644 --- a/board/theobroma-systems/lion_rk3368/README +++ b/board/theobroma-systems/lion_rk3368/README @@ -17,12 +17,12 @@ Configure U-Boot Build the TPL/SPL stage ======================= - > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm + > make CROSS_COMPILE=aarch64-unknown-elf- Build the full U-Boot and a FIT image including the ATF ======================================================= - > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm u-boot.itb + > make CROSS_COMPILE=aarch64-unknown-elf- u-boot.itb Flash the image =============== diff --git a/board/ti/am65x/README b/board/ti/am65x/README index 00be1ffe44..67081ce349 100644 --- a/board/ti/am65x/README +++ b/board/ti/am65x/README @@ -133,12 +133,12 @@ $ make PLATFORM=k3-am65x CFG_ARM64_core=y 4. U-Boot: 4.1. R5: -$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- am65x_evm_r5_defconfig O=/tmp/r5 -$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5 +$ make CROSS_COMPILE=arm-linux-gnueabihf- am65x_evm_r5_defconfig O=/tmp/r5 +$ make CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5 4.2. A53: -$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- am65x_evm_a53_defconfig O=/tmp/a53 -$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin O=/tmp/a53 +$ make CROSS_COMPILE=aarch64-linux-gnu- am65x_evm_a53_defconfig O=/tmp/a53 +$ make CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin O=/tmp/a53 Target Images -------------- diff --git a/board/ti/j721e/README b/board/ti/j721e/README index 7dcf336332..757a59cdb4 100644 --- a/board/ti/j721e/README +++ b/board/ti/j721e/README @@ -149,12 +149,12 @@ $ make PLATFORM=k3-j721e CFG_ARM64_core=y 4. U-Boot: 4.1. R5: -$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- j721e_evm_r5_defconfig O=/tmp/r5 -$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5 +$ make CROSS_COMPILE=arm-linux-gnueabihf- j721e_evm_r5_defconfig O=/tmp/r5 +$ make CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5 4.2. A72: -$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- j721e_evm_a72_defconfig O=/tmp/a72 -$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin O=/tmp/a72 +$ make CROSS_COMPILE=aarch64-linux-gnu- j721e_evm_a72_defconfig O=/tmp/a72 +$ make CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin O=/tmp/a72 Target Images -------------- diff --git a/board/ti/ks2_evm/README b/board/ti/ks2_evm/README index a26b7f8131..ff0ec5a363 100644 --- a/board/ti/ks2_evm/README +++ b/board/ti/ks2_evm/README @@ -74,7 +74,7 @@ Supported image formats: Build instructions: =================== Examples for k2hk, for k2e, k2l and k2g just replace k2hk prefix accordingly. -Don't forget to add ARCH=arm and CROSS_COMPILE. +Don't forget to add CROSS_COMPILE. To build u-boot.bin, u-boot-spi.gph, MLO: >make k2hk_evm_defconfig diff --git a/board/vamrs/rock960_rk3399/README b/board/vamrs/rock960_rk3399/README index c5c675c4ea..15df027fbc 100644 --- a/board/vamrs/rock960_rk3399/README +++ b/board/vamrs/rock960_rk3399/README @@ -57,7 +57,6 @@ Compile the U-Boot > cd ../u-boot > cp ../rkbin/rk33/rk3399_bl31_v1.00.elf ./bl31.elf - > export ARCH=arm64 > export CROSS_COMPILE=aarch64-linux-gnu- > make rock960-rk3399_defconfig > make diff --git a/cmd/Kconfig b/cmd/Kconfig index 153864c587..192b3b262f 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -491,6 +491,7 @@ config CMD_SPL_WRITE_SIZE config CMD_FITUPD bool "fitImage update command" + depends on UPDATE_TFTP help Implements the 'fitupd' command, which allows to automatically store software updates present on a TFTP server in NOR Flash diff --git a/cmd/fitupd.c b/cmd/fitupd.c index f6270d9c15..0f490c58fc 100644 --- a/cmd/fitupd.c +++ b/cmd/fitupd.c @@ -8,10 +8,6 @@ #include <command.h> #include <net.h> -#if !defined(CONFIG_UPDATE_TFTP) -#error "CONFIG_UPDATE_TFTP required" -#endif - static int do_fitupd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -145,13 +145,10 @@ static int do_spi_flash_probe(int argc, char *const argv[]) new = spi_flash_probe(bus, cs, speed, mode); flash = new; - if (!new) { printf("Failed to initialize SPI flash at %u:%u\n", bus, cs); return 1; } - - flash = new; #endif return 0; diff --git a/common/image-android.c b/common/image-android.c index 6af9baa121..18f7c8db03 100644 --- a/common/image-android.c +++ b/common/image-android.c @@ -33,6 +33,13 @@ static ulong android_image_get_kernel_addr(const struct andr_img_hdr *hdr) if (hdr->kernel_addr == ANDROID_IMAGE_DEFAULT_KERNEL_ADDR) return (ulong)hdr + hdr->page_size; + /* + * abootimg creates images where all load addresses are 0 + * and we need to fix them. + */ + if (hdr->kernel_addr == 0 && hdr->ramdisk_addr == 0) + return env_get_ulong("kernel_addr_r", 16, 0); + return hdr->kernel_addr; } diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index 8937c51bd0..87871fd19f 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -10,5 +10,6 @@ CONFIG_SPL_SPI_SUNXI=y # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64" +CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/doc/arch/m68k.rst b/doc/arch/m68k.rst index 34b2593eb8..44e1a5dfa3 100644 --- a/doc/arch/m68k.rst +++ b/doc/arch/m68k.rst @@ -35,7 +35,7 @@ development boards. Supported CPU families ---------------------- -Please "make menuconfig" with ARCH=m68k, or check arch/m68k/cpu to see the +Please "make menuconfig" and select "m68k" or check arch/m68k/cpu to see the currently supported processor and families. @@ -75,8 +75,8 @@ A bash script similar to the one below may be used: board=M5475DFE make distclean - make ARCH=m68k ${board}_defconfig - make ARCH=m68k KBUILD_VERBOSE=1 + make ${board}_defconfig + make KBUILD_VERBOSE=1 Adopted toolchains diff --git a/doc/board/actions/cubieboard7.rst b/doc/board/actions/cubieboard7.rst index e01d2d0370..74f2b12e41 100644 --- a/doc/board/actions/cubieboard7.rst +++ b/doc/board/actions/cubieboard7.rst @@ -102,7 +102,7 @@ Building U-BOOT proper image $ make clean $ export CROSS_COMPILE=aarch64-linux-gnu- - $ make ARCH=arm cubieboard7_defconfig + $ make cubieboard7_defconfig $ make u-boot-dtb.img -j16 u-boot-dtb.img can now be flashed to debian image partition mounted on host machine. diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst index 610ba87074..43402cb2e5 100644 --- a/doc/board/sifive/fu540.rst +++ b/doc/board/sifive/fu540.rst @@ -39,7 +39,6 @@ Building .. code-block:: none - export ARCH=riscv export CROSS_COMPILE=<riscv64 toolchain prefix> 3. make sifive_fu540_defconfig diff --git a/doc/board/toradex/colibri_imx7.rst b/doc/board/toradex/colibri_imx7.rst index 6fb9526666..a30e721379 100644 --- a/doc/board/toradex/colibri_imx7.rst +++ b/doc/board/toradex/colibri_imx7.rst @@ -18,7 +18,6 @@ Build U-Boot .. code-block:: bash $ export CROSS_COMPILE=arm-linux-gnueabi- - $ export ARCH=arm $ make colibri_imx7_emmc_defconfig # For NAND: colibri_imx7_defconfig $ make diff --git a/doc/driver-model/migration.rst b/doc/driver-model/migration.rst index d1fc0e6a78..de8c1f9e72 100644 --- a/doc/driver-model/migration.rst +++ b/doc/driver-model/migration.rst @@ -69,8 +69,6 @@ to move the migration with in the deadline. No dm conversion yet:: drivers/spi/fsl_espi.c - drivers/spi/lpc32xx_ssp.c - drivers/spi/sh_spi.c drivers/spi/soft_spi_legacy.c * Status: In progress diff --git a/doc/uImage.FIT/beaglebone_vboot.txt b/doc/uImage.FIT/beaglebone_vboot.txt index 685ec1f46d..ebd2068ed3 100644 --- a/doc/uImage.FIT/beaglebone_vboot.txt +++ b/doc/uImage.FIT/beaglebone_vboot.txt @@ -67,7 +67,6 @@ or if you just installed gcc-arm-linux-gnueabi then it might be b. Configure and build U-Boot with verified boot enabled: - export ARCH=arm export UBOOT=/path/to/u-boot cd $UBOOT # You can add -j10 if you have 10 CPUs to make it faster diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 0356f8ba18..c8e6fa7f89 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -27,6 +27,8 @@ config BOOTCOUNT_GENERIC config BOOTCOUNT_EXT bool "Boot counter on EXT filesystem" + depends on FS_EXT4 + select EXT4_WRITE help Add support for maintaining boot count in a file on an EXT filesystem. diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig index a3bdd9fa34..a17e55e997 100644 --- a/drivers/input/Kconfig +++ b/drivers/input/Kconfig @@ -21,7 +21,7 @@ config DM_KEYBOARD input and update LEDs if the keyboard has them. config SPL_DM_KEYBOARD - bool "Enable driver model keyboard support" + bool "Enable driver model keyboard support for SPL" depends on SPL_DM help This adds a uclass for keyboards and implements keyboard support @@ -30,7 +30,7 @@ config SPL_DM_KEYBOARD input and update LEDs if the keyboard has them. config TPL_DM_KEYBOARD - bool "Enable driver model keyboard support" + bool "Enable driver model keyboard support for TPL" depends on TPL_DM help This adds a uclass for keyboards and implements keyboard support diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c index c4beefa617..c2cd3b426b 100644 --- a/drivers/mtd/nand/spi/toshiba.c +++ b/drivers/mtd/nand/spi/toshiba.c @@ -23,13 +23,25 @@ static SPINAND_OP_VARIANTS(read_cache_variants, SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); +static SPINAND_OP_VARIANTS(write_cache_x4_variants, + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), + SPINAND_PROG_LOAD(true, 0, NULL, 0)); + +static SPINAND_OP_VARIANTS(update_cache_x4_variants, + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), + SPINAND_PROG_LOAD(false, 0, NULL, 0)); + +/** + * Backward compatibility for 1st generation Serial NAND devices + * which don't support Quad Program Load operation. + */ static SPINAND_OP_VARIANTS(write_cache_variants, SPINAND_PROG_LOAD(true, 0, NULL, 0)); static SPINAND_OP_VARIANTS(update_cache_variants, SPINAND_PROG_LOAD(false, 0, NULL, 0)); -static int tc58cxgxsx_ooblayout_ecc(struct mtd_info *mtd, int section, +static int tx58cxgxsxraix_ooblayout_ecc(struct mtd_info *mtd, int section, struct mtd_oob_region *region) { if (section > 0) @@ -41,7 +53,7 @@ static int tc58cxgxsx_ooblayout_ecc(struct mtd_info *mtd, int section, return 0; } -static int tc58cxgxsx_ooblayout_free(struct mtd_info *mtd, int section, +static int tx58cxgxsxraix_ooblayout_free(struct mtd_info *mtd, int section, struct mtd_oob_region *region) { if (section > 0) @@ -54,12 +66,12 @@ static int tc58cxgxsx_ooblayout_free(struct mtd_info *mtd, int section, return 0; } -static const struct mtd_ooblayout_ops tc58cxgxsx_ooblayout = { - .ecc = tc58cxgxsx_ooblayout_ecc, - .rfree = tc58cxgxsx_ooblayout_free, +static const struct mtd_ooblayout_ops tx58cxgxsxraix_ooblayout = { + .ecc = tx58cxgxsxraix_ooblayout_ecc, + .rfree = tx58cxgxsxraix_ooblayout_free, }; -static int tc58cxgxsx_ecc_get_status(struct spinand_device *spinand, +static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand, u8 status) { struct nand_device *nand = spinand_to_nand(spinand); @@ -98,76 +110,151 @@ static int tc58cxgxsx_ecc_get_status(struct spinand_device *spinand, } static const struct spinand_info toshiba_spinand_table[] = { - /* 3.3V 1Gb */ - SPINAND_INFO("TC58CVG0S3", 0xC2, + /* 3.3V 1Gb (1st generation) */ + SPINAND_INFO("TC58CVG0S3HRAIG", 0xC2, NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1), NAND_ECCREQ(8, 512), SPINAND_INFO_OP_VARIANTS(&read_cache_variants, &write_cache_variants, &update_cache_variants), 0, - SPINAND_ECCINFO(&tc58cxgxsx_ooblayout, - tc58cxgxsx_ecc_get_status)), - /* 3.3V 2Gb */ - SPINAND_INFO("TC58CVG1S3", 0xCB, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 3.3V 2Gb (1st generation) */ + SPINAND_INFO("TC58CVG1S3HRAIG", 0xCB, NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1), NAND_ECCREQ(8, 512), SPINAND_INFO_OP_VARIANTS(&read_cache_variants, &write_cache_variants, &update_cache_variants), 0, - SPINAND_ECCINFO(&tc58cxgxsx_ooblayout, - tc58cxgxsx_ecc_get_status)), - /* 3.3V 4Gb */ - SPINAND_INFO("TC58CVG2S0", 0xCD, - NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1), - NAND_ECCREQ(8, 512), - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, - &write_cache_variants, - &update_cache_variants), - 0, - SPINAND_ECCINFO(&tc58cxgxsx_ooblayout, - tc58cxgxsx_ecc_get_status)), - /* 3.3V 4Gb */ - SPINAND_INFO("TC58CVG2S0", 0xED, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 3.3V 4Gb (1st generation) */ + SPINAND_INFO("TC58CVG2S0HRAIG", 0xCD, NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1), NAND_ECCREQ(8, 512), SPINAND_INFO_OP_VARIANTS(&read_cache_variants, &write_cache_variants, &update_cache_variants), 0, - SPINAND_ECCINFO(&tc58cxgxsx_ooblayout, - tc58cxgxsx_ecc_get_status)), - /* 1.8V 1Gb */ - SPINAND_INFO("TC58CYG0S3", 0xB2, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 1.8V 1Gb (1st generation) */ + SPINAND_INFO("TC58CYG0S3HRAIG", 0xB2, NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1), NAND_ECCREQ(8, 512), SPINAND_INFO_OP_VARIANTS(&read_cache_variants, &write_cache_variants, &update_cache_variants), 0, - SPINAND_ECCINFO(&tc58cxgxsx_ooblayout, - tc58cxgxsx_ecc_get_status)), - /* 1.8V 2Gb */ - SPINAND_INFO("TC58CYG1S3", 0xBB, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 1.8V 2Gb (1st generation) */ + SPINAND_INFO("TC58CYG1S3HRAIG", 0xBB, NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1), NAND_ECCREQ(8, 512), SPINAND_INFO_OP_VARIANTS(&read_cache_variants, &write_cache_variants, &update_cache_variants), 0, - SPINAND_ECCINFO(&tc58cxgxsx_ooblayout, - tc58cxgxsx_ecc_get_status)), - /* 1.8V 4Gb */ - SPINAND_INFO("TC58CYG2S0", 0xBD, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 1.8V 4Gb (1st generation) */ + SPINAND_INFO("TC58CYG2S0HRAIG", 0xBD, NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1), NAND_ECCREQ(8, 512), SPINAND_INFO_OP_VARIANTS(&read_cache_variants, &write_cache_variants, &update_cache_variants), 0, - SPINAND_ECCINFO(&tc58cxgxsx_ooblayout, - tc58cxgxsx_ecc_get_status)), + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + + /* + * 2nd generation serial nand has HOLD_D which is equivalent to + * QE_BIT. + */ + /* 3.3V 1Gb (2nd generation) */ + SPINAND_INFO("TC58CVG0S3HRAIJ", 0xE2, + NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 3.3V 2Gb (2nd generation) */ + SPINAND_INFO("TC58CVG1S3HRAIJ", 0xEB, + NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 3.3V 4Gb (2nd generation) */ + SPINAND_INFO("TC58CVG2S0HRAIJ", 0xED, + NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 3.3V 8Gb (2nd generation) */ + SPINAND_INFO("TH58CVG3S0HRAIJ", 0xE4, + NAND_MEMORG(1, 4096, 256, 64, 4096, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 1.8V 1Gb (2nd generation) */ + SPINAND_INFO("TC58CYG0S3HRAIJ", 0xD2, + NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 1.8V 2Gb (2nd generation) */ + SPINAND_INFO("TC58CYG1S3HRAIJ", 0xDB, + NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 1.8V 4Gb (2nd generation) */ + SPINAND_INFO("TC58CYG2S0HRAIJ", 0xDD, + NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), + /* 1.8V 8Gb (2nd generation) */ + SPINAND_INFO("TH58CYG3S0HRAIJ", 0xD4, + NAND_MEMORG(1, 4096, 256, 64, 4096, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_x4_variants, + &update_cache_x4_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, + tx58cxgxsxraix_ecc_get_status)), }; static int toshiba_spinand_detect(struct spinand_device *spinand) diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c index de369aa001..9ce2ecb99a 100644 --- a/drivers/mtd/spi/sf-uclass.c +++ b/drivers/mtd/spi/sf-uclass.c @@ -30,15 +30,6 @@ int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len) return log_ret(sf_get_ops(dev)->erase(dev, offset, len)); } -int spl_flash_get_sw_write_prot(struct udevice *dev) -{ - struct dm_spi_flash_ops *ops = sf_get_ops(dev); - - if (!ops->get_sw_write_prot) - return -ENOSYS; - return log_ret(ops->get_sw_write_prot(dev)); -} - /* * TODO(sjg@chromium.org): This is an old-style function. We should remove * it when all SPI flash drivers use dm diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index ce0cf4c428..dabd40a4cc 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -75,12 +75,18 @@ extern const struct flash_info spi_nor_ids[]; #define JEDEC_MFR(info) ((info)->id[0]) #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) -/* Get software write-protect value (BP bits) */ -int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash); - - #if CONFIG_IS_ENABLED(SPI_FLASH_MTD) int spi_flash_mtd_register(struct spi_flash *flash); void spi_flash_mtd_unregister(void); +#else +static inline int spi_flash_mtd_register(struct spi_flash *flash) +{ + return 0; +} + +static inline void spi_flash_mtd_unregister(void) +{ +} #endif + #endif /* _SF_INTERNAL_H_ */ diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index c2e51f9c68..3548d6319b 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -45,9 +45,8 @@ static int spi_flash_probe_slave(struct spi_flash *flash) if (ret) goto err_read_id; -#if CONFIG_IS_ENABLED(SPI_FLASH_MTD) - ret = spi_flash_mtd_register(flash); -#endif + if (CONFIG_IS_ENABLED(SPI_FLASH_MTD)) + ret = spi_flash_mtd_register(flash); err_read_id: spi_release_bus(spi); @@ -84,9 +83,9 @@ struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs, void spi_flash_free(struct spi_flash *flash) { -#if CONFIG_IS_ENABLED(SPI_FLASH_MTD) - spi_flash_mtd_unregister(); -#endif + if (CONFIG_IS_ENABLED(SPI_FLASH_MTD)) + spi_flash_mtd_unregister(); + spi_free_slave(flash->spi); free(flash); } @@ -131,31 +130,22 @@ static int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) return mtd->_erase(mtd, &instr); } -static int spi_flash_std_get_sw_write_prot(struct udevice *dev) -{ - struct spi_flash *flash = dev_get_uclass_priv(dev); - - return spi_flash_cmd_get_sw_write_prot(flash); -} - int spi_flash_std_probe(struct udevice *dev) { struct spi_slave *slave = dev_get_parent_priv(dev); - struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev); struct spi_flash *flash; flash = dev_get_uclass_priv(dev); flash->dev = dev; flash->spi = slave; - debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs); return spi_flash_probe_slave(flash); } static int spi_flash_std_remove(struct udevice *dev) { -#if CONFIG_IS_ENABLED(SPI_FLASH_MTD) - spi_flash_mtd_unregister(); -#endif + if (CONFIG_IS_ENABLED(SPI_FLASH_MTD)) + spi_flash_mtd_unregister(); + return 0; } @@ -163,7 +153,6 @@ static const struct dm_spi_flash_ops spi_flash_std_ops = { .read = spi_flash_std_read, .write = spi_flash_std_write, .erase = spi_flash_std_erase, - .get_sw_write_prot = spi_flash_std_get_sw_write_prot, }; static const struct udevice_id spi_flash_std_ids[] = { diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 56b44ebbe8..1e3f51d2ac 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -1235,6 +1235,12 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, size_t page_offset, page_remain, i; ssize_t ret; +#ifdef CONFIG_SPI_FLASH_SST + /* sst nor chips use AAI word program */ + if (nor->info->flags & SST_WRITE) + return sst_write(mtd, to, len, retlen, buf); +#endif + dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len); if (!len) @@ -2530,6 +2536,7 @@ int spi_nor_scan(struct spi_nor *nor) mtd->size = params.size; mtd->_erase = spi_nor_erase; mtd->_read = spi_nor_read; + mtd->_write = spi_nor_write; #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) /* NOR protection support for STmicro/Micron chips and similar */ @@ -2553,13 +2560,7 @@ int spi_nor_scan(struct spi_nor *nor) nor->flash_unlock = sst26_unlock; nor->flash_is_locked = sst26_is_locked; } - - /* sst nor chips use AAI word program */ - if (info->flags & SST_WRITE) - mtd->_write = sst_write; - else #endif - mtd->_write = spi_nor_write; if (info->flags & USE_FSR) nor->flags |= SNOR_F_USE_FSR; @@ -2640,14 +2641,3 @@ int spi_nor_scan(struct spi_nor *nor) return 0; } - -/* U-Boot specific functions, need to extend MTD to support these */ -int spi_flash_cmd_get_sw_write_prot(struct spi_nor *nor) -{ - int sr = read_sr(nor); - - if (sr < 0) - return sr; - - return (sr >> 2) & 7; -} diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c index 55f86d5155..9f676c649d 100644 --- a/drivers/mtd/spi/spi-nor-tiny.c +++ b/drivers/mtd/spi/spi-nor-tiny.c @@ -798,9 +798,3 @@ int spi_nor_scan(struct spi_nor *nor) return 0; } - -/* U-Boot specific functions, need to extend MTD to support these */ -int spi_flash_cmd_get_sw_write_prot(struct spi_nor *nor) -{ - return -ENOTSUPP; -} diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 99e24c6348..e2b05ace8f 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -111,6 +111,7 @@ enum emac_variant { H3_EMAC, A64_EMAC, R40_GMAC, + H6_EMAC, }; struct emac_dma_desc { @@ -300,9 +301,9 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata, if (priv->variant == R40_GMAC) { /* Select RGMII for R40 */ reg = readl(priv->sysctl_reg + 0x164); - reg |= CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII | - CCM_GMAC_CTRL_GPIT_RGMII | - CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY); + reg |= SC_ETCS_INT_GMII | + SC_EPIT | + (CONFIG_GMAC_TX_DELAY << SC_ETXDC_OFFSET); writel(reg, priv->sysctl_reg + 0x164); return 0; @@ -310,14 +311,16 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata, reg = readl(priv->sysctl_reg + 0x30); - if (priv->variant == H3_EMAC) { + if (priv->variant == H3_EMAC || priv->variant == H6_EMAC) { ret = sun8i_emac_set_syscon_ephy(priv, ®); if (ret) return ret; } reg &= ~(SC_ETCS_MASK | SC_EPIT); - if (priv->variant == H3_EMAC || priv->variant == A64_EMAC) + if (priv->variant == H3_EMAC || + priv->variant == A64_EMAC || + priv->variant == H6_EMAC) reg &= ~SC_RMII_EN; switch (priv->interface) { @@ -329,7 +332,8 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata, break; case PHY_INTERFACE_MODE_RMII: if (priv->variant == H3_EMAC || - priv->variant == A64_EMAC) { + priv->variant == A64_EMAC || + priv->variant == H6_EMAC) { reg |= SC_RMII_EN | SC_ETCS_EXT_GMII; break; } @@ -535,7 +539,7 @@ static int parse_phy_pins(struct udevice *dev) if (priv->variant == H3_EMAC) sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX_H3); - else if (priv->variant == R40_GMAC) + else if (priv->variant == R40_GMAC || priv->variant == H6_EMAC) sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX_R40); else sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX); @@ -1032,6 +1036,8 @@ static const struct udevice_id sun8i_emac_eth_ids[] = { .data = (uintptr_t)A83T_EMAC }, {.compatible = "allwinner,sun8i-r40-gmac", .data = (uintptr_t)R40_GMAC }, + {.compatible = "allwinner,sun50i-h6-emac", + .data = (uintptr_t)H6_EMAC }, { } }; diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c index b4bae22c2c..f050645044 100644 --- a/drivers/phy/allwinner/phy-sun4i-usb.c +++ b/drivers/phy/allwinner/phy-sun4i-usb.c @@ -282,7 +282,8 @@ static int sun4i_usb_phy_init(struct phy *phy) return ret; } - if (data->cfg->type == sun8i_a83t_phy) { + if (data->cfg->type == sun8i_a83t_phy || + data->cfg->type == sun50i_h6_phy) { if (phy->id == 0) { val = readl(data->base + data->cfg->phyctl_offset); val |= PHY_CTL_VBUSVLDEXT; @@ -324,7 +325,8 @@ static int sun4i_usb_phy_exit(struct phy *phy) int ret; if (phy->id == 0) { - if (data->cfg->type == sun8i_a83t_phy) { + if (data->cfg->type == sun8i_a83t_phy || + data->cfg->type == sun50i_h6_phy) { void __iomem *phyctl = data->base + data->cfg->phyctl_offset; diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index dccd5ea0d9..59415209ee 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -141,6 +141,14 @@ config FSL_DSPI this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms use this driver. +config FSL_QSPI + bool "Freescale QSPI driver" + imply SPI_FLASH_BAR + help + Enable the Freescale Quad-SPI (QSPI) driver. This driver can be + used to access the SPI NOR flash on platforms embedding this + Freescale IP core. + config ICH_SPI bool "Intel ICH SPI driver" help @@ -167,6 +175,13 @@ config MPC8XXX_SPI help Enable support for SPI on the MPC8XXX PowerPC SoCs. +config MSCC_BB_SPI + bool "MSCC bitbang SPI driver" + depends on SOC_VCOREIII + help + Enable MSCC bitbang SPI driver. This driver can be used on + MSCC SOCs. + config MT7621_SPI bool "MediaTek MT7621 SPI driver" depends on SOC_MT7628 @@ -377,19 +392,6 @@ config SOFT_SPI Enable Soft SPI driver. This driver is to use GPIO simulate the SPI protocol. -config MSCC_BB_SPI - bool "MSCC bitbang SPI driver" - depends on SOC_VCOREIII - help - Enable MSCC bitbang SPI driver. This driver can be used on - MSCC SOCs. - -config CF_SPI - bool "ColdFire SPI driver" - help - Enable the ColdFire SPI driver. This driver can be used on - some m68k SoCs. - config FSL_ESPI bool "Freescale eSPI driver" imply SPI_FLASH_BAR @@ -398,27 +400,12 @@ config FSL_ESPI access the SPI interface and SPI NOR flash on platforms embedding this Freescale eSPI IP core. -config FSL_QSPI - bool "Freescale QSPI driver" - imply SPI_FLASH_BAR - help - Enable the Freescale Quad-SPI (QSPI) driver. This driver can be - used to access the SPI NOR flash on platforms embedding this - Freescale IP core. - config DAVINCI_SPI bool "Davinci & Keystone SPI driver" depends on ARCH_DAVINCI || ARCH_KEYSTONE help Enable the Davinci SPI driver -config SH_SPI - bool "SuperH SPI driver" - depends on DEPRECATED - help - Enable the SuperH SPI controller driver. This driver can be used - on various SuperH SoCs, such as SH7757. - config SH_QSPI bool "Renesas Quad SPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 6441694c8d..342776404a 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -52,7 +52,6 @@ obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o obj-$(CONFIG_SPI_SIFIVE) += spi-sifive.o obj-$(CONFIG_SPI_SUNXI) += spi-sunxi.o -obj-$(CONFIG_SH_SPI) += sh_spi.o obj-$(CONFIG_SH_QSPI) += sh_qspi.o obj-$(CONFIG_STM32_QSPI) += stm32_qspi.o obj-$(CONFIG_STM32_SPI) += stm32_spi.o diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c index dd9c77281f..dec92df69b 100644 --- a/drivers/spi/cf_spi.c +++ b/drivers/spi/cf_spi.c @@ -383,10 +383,6 @@ static int coldfire_spi_probe(struct udevice *bus) return 0; } -void spi_init(void) -{ -} - #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) static int coldfire_dspi_ofdata_to_platdata(struct udevice *bus) { diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 01fcf6bef5..3986b06b25 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -183,10 +183,6 @@ int spi_cs_is_valid(unsigned int bus, unsigned int cs) } #endif -void spi_init(void) -{ -} - void spi_cs_activate(struct spi_slave *slave) { _spi_cs_activate(spireg); diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c deleted file mode 100644 index 4ecfe60115..0000000000 --- a/drivers/spi/sh_spi.c +++ /dev/null @@ -1,250 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * SH SPI driver - * - * Copyright (C) 2011-2012 Renesas Solutions Corp. - */ - -#include <common.h> -#include <console.h> -#include <malloc.h> -#include <spi.h> -#include <asm/io.h> -#include <linux/delay.h> -#include "sh_spi.h" - -static void sh_spi_write(unsigned long data, unsigned long *reg) -{ - writel(data, reg); -} - -static unsigned long sh_spi_read(unsigned long *reg) -{ - return readl(reg); -} - -static void sh_spi_set_bit(unsigned long val, unsigned long *reg) -{ - unsigned long tmp; - - tmp = sh_spi_read(reg); - tmp |= val; - sh_spi_write(tmp, reg); -} - -static void sh_spi_clear_bit(unsigned long val, unsigned long *reg) -{ - unsigned long tmp; - - tmp = sh_spi_read(reg); - tmp &= ~val; - sh_spi_write(tmp, reg); -} - -static void clear_fifo(struct sh_spi *ss) -{ - sh_spi_set_bit(SH_SPI_RSTF, &ss->regs->cr2); - sh_spi_clear_bit(SH_SPI_RSTF, &ss->regs->cr2); -} - -static int recvbuf_wait(struct sh_spi *ss) -{ - while (sh_spi_read(&ss->regs->cr1) & SH_SPI_RBE) { - if (ctrlc()) - return 1; - udelay(10); - } - return 0; -} - -static int write_fifo_empty_wait(struct sh_spi *ss) -{ - while (!(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBE)) { - if (ctrlc()) - return 1; - udelay(10); - } - return 0; -} - -static void sh_spi_set_cs(struct sh_spi *ss, unsigned int cs) -{ - unsigned long val = 0; - - if (cs & 0x01) - val |= SH_SPI_SSS0; - if (cs & 0x02) - val |= SH_SPI_SSS1; - - sh_spi_clear_bit(SH_SPI_SSS0 | SH_SPI_SSS1, &ss->regs->cr4); - sh_spi_set_bit(val, &ss->regs->cr4); -} - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct sh_spi *ss; - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - ss = spi_alloc_slave(struct sh_spi, bus, cs); - if (!ss) - return NULL; - - ss->regs = (struct sh_spi_regs *)CONFIG_SH_SPI_BASE; - - /* SPI sycle stop */ - sh_spi_write(0xfe, &ss->regs->cr1); - /* CR1 init */ - sh_spi_write(0x00, &ss->regs->cr1); - /* CR3 init */ - sh_spi_write(0x00, &ss->regs->cr3); - sh_spi_set_cs(ss, cs); - - clear_fifo(ss); - - /* 1/8 clock */ - sh_spi_write(sh_spi_read(&ss->regs->cr2) | 0x07, &ss->regs->cr2); - udelay(10); - - return &ss->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct sh_spi *spi = to_sh_spi(slave); - - free(spi); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - struct sh_spi *ss = to_sh_spi(slave); - - sh_spi_write(sh_spi_read(&ss->regs->cr1) & - ~(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD), &ss->regs->cr1); -} - -static int sh_spi_send(struct sh_spi *ss, const unsigned char *tx_data, - unsigned int len, unsigned long flags) -{ - int i, cur_len, ret = 0; - int remain = (int)len; - - if (len >= SH_SPI_FIFO_SIZE) - sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); - - while (remain > 0) { - cur_len = (remain < SH_SPI_FIFO_SIZE) ? - remain : SH_SPI_FIFO_SIZE; - for (i = 0; i < cur_len && - !(sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) && - !(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBF); - i++) - sh_spi_write(tx_data[i], &ss->regs->tbr_rbr); - - cur_len = i; - - if (sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) { - /* Abort the transaction */ - flags |= SPI_XFER_END; - sh_spi_set_bit(SH_SPI_WPABRT, &ss->regs->cr4); - ret = 1; - break; - } - - remain -= cur_len; - tx_data += cur_len; - - if (remain > 0) - write_fifo_empty_wait(ss); - } - - if (flags & SPI_XFER_END) { - sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1); - sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); - udelay(100); - write_fifo_empty_wait(ss); - } - - return ret; -} - -static int sh_spi_receive(struct sh_spi *ss, unsigned char *rx_data, - unsigned int len, unsigned long flags) -{ - int i; - - if (len > SH_SPI_MAX_BYTE) - sh_spi_write(SH_SPI_MAX_BYTE, &ss->regs->cr3); - else - sh_spi_write(len, &ss->regs->cr3); - - sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1); - sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1); - - for (i = 0; i < len; i++) { - if (recvbuf_wait(ss)) - return 0; - - rx_data[i] = (unsigned char)sh_spi_read(&ss->regs->tbr_rbr); - } - sh_spi_write(0, &ss->regs->cr3); - - return 0; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, - void *din, unsigned long flags) -{ - struct sh_spi *ss = to_sh_spi(slave); - const unsigned char *tx_data = dout; - unsigned char *rx_data = din; - unsigned int len = bitlen / 8; - int ret = 0; - - if (flags & SPI_XFER_BEGIN) - sh_spi_write(sh_spi_read(&ss->regs->cr1) & ~SH_SPI_SSA, - &ss->regs->cr1); - - if (tx_data) - ret = sh_spi_send(ss, tx_data, len, flags); - - if (ret == 0 && rx_data) - ret = sh_spi_receive(ss, rx_data, len, flags); - - if (flags & SPI_XFER_END) { - sh_spi_set_bit(SH_SPI_SSD, &ss->regs->cr1); - udelay(100); - - sh_spi_clear_bit(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD, - &ss->regs->cr1); - clear_fifo(ss); - } - - return ret; -} - -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - if (!bus && cs < SH_SPI_NUM_CS) - return 1; - else - return 0; -} - -void spi_cs_activate(struct spi_slave *slave) -{ - -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - -} diff --git a/drivers/spi/sh_spi.h b/drivers/spi/sh_spi.h deleted file mode 100644 index 33a4630c8d..0000000000 --- a/drivers/spi/sh_spi.h +++ /dev/null @@ -1,67 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * SH SPI driver - * - * Copyright (C) 2011 Renesas Solutions Corp. - */ - -#ifndef __SH_SPI_H__ -#define __SH_SPI_H__ - -#include <spi.h> - -struct sh_spi_regs { - unsigned long tbr_rbr; - unsigned long resv1; - unsigned long cr1; - unsigned long resv2; - unsigned long cr2; - unsigned long resv3; - unsigned long cr3; - unsigned long resv4; - unsigned long cr4; -}; - -/* CR1 */ -#define SH_SPI_TBE 0x80 -#define SH_SPI_TBF 0x40 -#define SH_SPI_RBE 0x20 -#define SH_SPI_RBF 0x10 -#define SH_SPI_PFONRD 0x08 -#define SH_SPI_SSDB 0x04 -#define SH_SPI_SSD 0x02 -#define SH_SPI_SSA 0x01 - -/* CR2 */ -#define SH_SPI_RSTF 0x80 -#define SH_SPI_LOOPBK 0x40 -#define SH_SPI_CPOL 0x20 -#define SH_SPI_CPHA 0x10 -#define SH_SPI_L1M0 0x08 - -/* CR3 */ -#define SH_SPI_MAX_BYTE 0xFF - -/* CR4 */ -#define SH_SPI_TBEI 0x80 -#define SH_SPI_TBFI 0x40 -#define SH_SPI_RBEI 0x20 -#define SH_SPI_RBFI 0x10 -#define SH_SPI_SSS1 0x08 -#define SH_SPI_WPABRT 0x04 -#define SH_SPI_SSS0 0x01 - -#define SH_SPI_FIFO_SIZE 32 -#define SH_SPI_NUM_CS 4 - -struct sh_spi { - struct spi_slave slave; - struct sh_spi_regs *regs; -}; - -static inline struct sh_spi *to_sh_spi(struct spi_slave *slave) -{ - return container_of(slave, struct sh_spi, slave); -} - -#endif diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 928a89133c..756a4ec402 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -39,8 +39,8 @@ config DM_USB help Enable driver model for USB. The USB interface is then implemented by the USB uclass. Multiple USB controllers of different types - (XHCI, EHCI) can be attached and used. The 'usb' command works as - normal. OCHI is not supported at present. + (XHCI, EHCI, OHCI) can be attached and used. The 'usb' command works + as normal. Much of the code is shared but with this option enabled the USB uclass takes care of device enumeration. USB devices can be diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h index 9b264bd92a..a38cd25eb8 100644 --- a/drivers/usb/host/ohci.h +++ b/drivers/usb/host/ohci.h @@ -11,6 +11,7 @@ * e.g. PCI controllers need this */ +#include <asm/cache.h> #include <asm/io.h> #ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS @@ -53,15 +53,14 @@ static int setup_flash_device(void) env_flash = dev_get_uclass_priv(new); #else + if (env_flash) + spi_flash_free(env_flash); + env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, + CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); if (!env_flash) { - env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, - CONFIG_ENV_SPI_CS, - CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); - if (!env_flash) { - env_set_default("spi_flash_probe() failed", 0); - return -EIO; - } + env_set_default("spi_flash_probe() failed", 0); + return -EIO; } #endif return 0; diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h index 20b6d60dd8..6a107d52e0 100644 --- a/include/linux/dma-mapping.h +++ b/include/linux/dma-mapping.h @@ -2,6 +2,7 @@ #ifndef _LINUX_DMA_MAPPING_H #define _LINUX_DMA_MAPPING_H +#include <asm/cache.h> #include <linux/dma-direction.h> #include <linux/types.h> #include <asm/dma-mapping.h> diff --git a/include/spi_flash.h b/include/spi_flash.h index 0b23f57a71..d9b2af856c 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -34,19 +34,6 @@ struct dm_spi_flash_ops { int (*write)(struct udevice *dev, u32 offset, size_t len, const void *buf); int (*erase)(struct udevice *dev, u32 offset, size_t len); - /** - * get_sw_write_prot() - Check state of software write-protect feature - * - * SPI flash chips can lock a region of the flash defined by a - * 'protected area'. This function checks if this protected area is - * defined. - * - * @dev: SPI flash device - * @return 0 if no region is write-protected, 1 if a region is - * write-protected, -ENOSYS if the driver does not implement this, - * other -ve value on error - */ - int (*get_sw_write_prot)(struct udevice *dev); }; /* Access the serial operations for a device */ @@ -89,20 +76,6 @@ int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len, int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len); /** - * spl_flash_get_sw_write_prot() - Check state of software write-protect feature - * - * SPI flash chips can lock a region of the flash defined by a - * 'protected area'. This function checks if this protected area is - * defined. - * - * @dev: SPI flash device - * @return 0 if no region is write-protected, 1 if a region is - * write-protected, -ENOSYS if the driver does not implement this, - * other -ve value on error - */ -int spl_flash_get_sw_write_prot(struct udevice *dev); - -/** * spi_flash_std_probe() - Probe a SPI flash device * * This is the standard internal method for probing a SPI flash device to diff --git a/lib/Kconfig b/lib/Kconfig index f18bf3778b..af5c38afd9 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -162,7 +162,7 @@ config LIB_RAND bool "Pseudo-random library support" config LIB_HW_RAND - bool "HW Engine for random libray support" + bool "HW Engine for random library support" endchoice @@ -448,7 +448,7 @@ config ZSTD config SPL_LZ4 bool "Enable LZ4 decompression support in SPL" help - This enables support for tge LZ4 decompression algorithm in SPL. LZ4 + This enables support for the LZ4 decompression algorithm in SPL. LZ4 is a lossless data compression algorithm that is focused on fast compression and decompression speed. It belongs to the LZ77 family of byte-oriented compression schemes. @@ -456,7 +456,7 @@ config SPL_LZ4 config SPL_LZMA bool "Enable LZMA decompression support for SPL build" help - This enables support for LZMA compression altorithm for SPL boot. + This enables support for LZMA compression algorithm for SPL boot. config SPL_LZO bool "Enable LZO decompression support in SPL" diff --git a/test/dm/sf.c b/test/dm/sf.c index 55b8d1545f..9e7dead684 100644 --- a/test/dm/sf.c +++ b/test/dm/sf.c @@ -20,7 +20,7 @@ /* Simple test of sandbox SPI flash */ static int dm_test_spi_flash(struct unit_test_state *uts) { - struct udevice *dev, *emul; + struct udevice *dev; int full_size = 0x200000; int size = 0x10000; u8 *src, *dst; @@ -50,14 +50,6 @@ static int dm_test_spi_flash(struct unit_test_state *uts) ut_assertok(spi_flash_read_dm(dev, 0, size, dst)); ut_asserteq_mem(src, dst, size); - /* Try the write-protect stuff */ - ut_assertok(uclass_first_device_err(UCLASS_SPI_EMUL, &emul)); - ut_asserteq(0, spl_flash_get_sw_write_prot(dev)); - sandbox_sf_set_block_protect(emul, 1); - ut_asserteq(1, spl_flash_get_sw_write_prot(dev)); - sandbox_sf_set_block_protect(emul, 0); - ut_asserteq(0, spl_flash_get_sw_write_prot(dev)); - /* Check mapping */ ut_assertok(dm_spi_get_mmap(dev, &map_base, &map_size, &offset)); ut_asserteq(0x1000, map_base); diff --git a/test/py/conftest.py b/test/py/conftest.py index e3392ff6bc..30920474b3 100644 --- a/test/py/conftest.py +++ b/test/py/conftest.py @@ -156,7 +156,7 @@ def pytest_configure(config): o_opt = '' cmds = ( ['make', o_opt, '-s', board_type + '_defconfig'], - ['make', o_opt, '-s', '-j8'], + ['make', o_opt, '-s', '-j{}'.format(os.cpu_count())], ) name = 'make' diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c index 8734663cd4..c6378ecf34 100644 --- a/tools/env/fw_env.c +++ b/tools/env/fw_env.c @@ -946,11 +946,17 @@ static int flash_read_buf(int dev, int fd, void *buf, size_t count, lseek(fd, blockstart + block_seek, SEEK_SET); rc = read(fd, buf + processed, readlen); - if (rc != readlen) { + if (rc == -1) { fprintf(stderr, "Read error on %s: %s\n", DEVNAME(dev), strerror(errno)); return -1; } + if (rc != readlen) { + fprintf(stderr, "Read error on %s: " + "Attempted to read %d bytes but got %d\n", + DEVNAME(dev), readlen, rc); + return -1; + } #ifdef DEBUG fprintf(stderr, "Read 0x%x bytes at 0x%llx on %s\n", rc, (unsigned long long)blockstart + block_seek, diff --git a/tools/fit_image.c b/tools/fit_image.c index 88ff093d05..a082d9386d 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -111,7 +111,7 @@ static int fit_calc_size(struct image_tool_params *params) if (size < 0) return -1; - /* Add space for properties */ + /* Add space for properties and hash node */ total_size += size + 300; } @@ -193,6 +193,18 @@ static void get_basename(char *str, int size, const char *fname) } /** + * add_crc_node() - Add a hash node to request a CRC checksum for an image + * + * @fdt: Device tree to add to (in sequential-write mode) + */ +static void add_crc_node(void *fdt) +{ + fdt_begin_node(fdt, "hash-1"); + fdt_property_string(fdt, FIT_ALGO_PROP, "crc32"); + fdt_end_node(fdt); +} + +/** * fit_write_images() - Write out a list of images to the FIT * * We always include the main image (params->datafile). If there are device @@ -230,6 +242,7 @@ static int fit_write_images(struct image_tool_params *params, char *fdt) ret = fdt_property_file(params, fdt, FIT_DATA_PROP, params->datafile); if (ret) return ret; + add_crc_node(fdt); fdt_end_node(fdt); /* Now the device tree files if available */ @@ -252,6 +265,7 @@ static int fit_write_images(struct image_tool_params *params, char *fdt) genimg_get_arch_short_name(params->arch)); fdt_property_string(fdt, FIT_COMP_PROP, genimg_get_comp_short_name(IH_COMP_NONE)); + add_crc_node(fdt); fdt_end_node(fdt); } @@ -269,7 +283,7 @@ static int fit_write_images(struct image_tool_params *params, char *fdt) params->fit_ramdisk); if (ret) return ret; - + add_crc_node(fdt); fdt_end_node(fdt); } |