/* #define DBG1 0x00000304 #define PWRCTL 0x00000030 #define STAT 0x00000004 #define MSTR 0x00000000 #define MRCTRL0 0x00000010 #define MRCTRL1 0x00000014 #define DERATEEN 0x00000020 #define DERATEINT 0x00000024 #define DERATECTL 0x0000002c #define PWRTMG 0x00000034 #define HWLPCTL 0x00000038 #define RFSHCTL0 0x00000050 #define RFSHCTL1 0x00000054 #define RFSHCTL3 0x00000060 #define RFSHTMG 0x00000064 #define RFSHTMG1 0x00000068 #define CRCPARCTL0 0x000000c0 #define INIT0 0x000000d0 #define INIT1 0x000000d4 #define INIT2 0x000000d8 #define INIT3 0x000000dc #define INIT4 0x000000e0 #define INIT5 0x000000e4 #define INIT6 0x000000e8 #define INIT7 0x000000ec #define DIMMCTL 0x000000f0 #define RANKCTL 0x000000f4 #define RANKCTL1 0x000000f8 #define DRAMTMG0 0x00000100 #define DRAMTMG1 0x00000104 #define DRAMTMG2 0x00000108 #define DRAMTMG3 0x0000010c #define DRAMTMG4 0x00000110 #define DRAMTMG5 0x00000114 #define DRAMTMG6 0x00000118 #define DRAMTMG7 0x0000011c #define DRAMTMG8 0x00000120 #define DRAMTMG12 0x00000130 #define DRAMTMG13 0x00000134 #define DRAMTMG14 0x00000138 #define ZQCTL0 0x00000180 #define ZQCTL1 0x00000184 #define ZQCTL2 0x00000188 #define DFITMG0 0x00000190 #define DFITMG1 0x00000194 #define DFILPCFG0 0x00000198 #define DFIUPD0 0x000001a0 #define DFIUPD1 0x000001a4 #define DFIUPD2 0x000001a8 #define DFIMISC 0x000001b0 #define DFITMG2 0x000001b4 #define DBICTL 0x000001c0 #define DFIPHYMSTR 0x000001c4 #define ADDRMAP0 0x00000200 #define ADDRMAP1 0x00000204 #define ADDRMAP2 0x00000208 #define ADDRMAP3 0x0000020c #define ADDRMAP4 0x00000210 #define ADDRMAP5 0x00000214 #define ADDRMAP6 0x00000218 #define ADDRMAP7 0x0000021c #define ADDRMAP9 0x00000224 #define ADDRMAP10 0x00000228 #define ADDRMAP11 0x0000022c #define ODTCFG 0x00000240 #define ODTMAP 0x00000244 #define SCHED 0x00000250 #define SCHED1 0x00000254 #define PERFHPR1 0x0000025c #define PERFLPR1 0x00000264 #define PERFWR1 0x0000026c #define SCHED3 0x00000270 #define SCHED4 0x00000274 #define DBG0 0x00000300 #define DBGCMD 0x0000030c #define SWCTL 0x00000320 #define SWCTLSTATIC 0x00000328 #define POISONCFG 0x0000036c #define PCTRL_0 0x00000490 #define PCTRL_1 0x00000540 #define PCTRL_2 0x000005f0 #define PCTRL_3 0x000006a0 #define PCTRL_4 0x00000750 */ #define DCH1_MRCTRL0 _DDR_CTRL_BADDR+0x00001b10 #define DCH1_MRCTRL1 _DDR_CTRL_BADDR+0x00001b14 #define DCH1_DERATECTL _DDR_CTRL_BADDR+0x00001b2c #define DCH1_PWRCTL _DDR_CTRL_BADDR+0x00001b30 #define DCH1_HWLPCTL _DDR_CTRL_BADDR+0x00001b38 #define DCH1_CRCPARCTL0 _DDR_CTRL_BADDR+0x00001bc0 #define DCH1_ZQCTL2 _DDR_CTRL_BADDR+0x00001c88 #define DCH1_ODTMAP _DDR_CTRL_BADDR+0x00001d44 #define DCH1_DBG1 _DDR_CTRL_BADDR+0x00001e04 #define DCH1_DBGCMD _DDR_CTRL_BADDR+0x00001e0c #define DCH1_DFISTAT _DDR_CTRL_BADDR+0x00001cbc #define DCH1_STAT _DDR_CTRL_BADDR+0x00001b04 #define DCH1_DBGCAM _DDR_CTRL_BADDR+0x00001e08 #define DCH1_MRSTAT _DDR_CTRL_BADDR+0x00001b18 #define FREQ1_DERATEEN _DDR_CTRL_BADDR+0x00002020 #define FREQ1_DERATEINT _DDR_CTRL_BADDR+0x00002024 #define FREQ1_PWRTMG _DDR_CTRL_BADDR+0x00002034 #define FREQ1_RFSHCTL0 _DDR_CTRL_BADDR+0x00002050 #define FREQ1_RFSHTMG _DDR_CTRL_BADDR+0x00002064 #define FREQ1_RFSHTMG1 _DDR_CTRL_BADDR+0x00002068 #define FREQ1_INIT3 _DDR_CTRL_BADDR+0x000020dc #define FREQ1_INIT4 _DDR_CTRL_BADDR+0x000020e0 #define FREQ1_INIT6 _DDR_CTRL_BADDR+0x000020e8 #define FREQ1_INIT7 _DDR_CTRL_BADDR+0x000020ec #define FREQ1_RANKCTL _DDR_CTRL_BADDR+0x000020f4 #define FREQ1_RANKCTL1 _DDR_CTRL_BADDR+0x000020f8 #define FREQ1_DRAMTMG0 _DDR_CTRL_BADDR+0x00002100 #define FREQ1_DRAMTMG1 _DDR_CTRL_BADDR+0x00002104 #define FREQ1_DRAMTMG2 _DDR_CTRL_BADDR+0x00002108 #define FREQ1_DRAMTMG3 _DDR_CTRL_BADDR+0x0000210c #define FREQ1_DRAMTMG4 _DDR_CTRL_BADDR+0x00002110 #define FREQ1_DRAMTMG5 _DDR_CTRL_BADDR+0x00002114 #define FREQ1_DRAMTMG6 _DDR_CTRL_BADDR+0x00002118 #define FREQ1_DRAMTMG7 _DDR_CTRL_BADDR+0x0000211c #define FREQ1_DRAMTMG8 _DDR_CTRL_BADDR+0x00002120 #define FREQ1_DRAMTMG12 _DDR_CTRL_BADDR+0x00002130 #define FREQ1_DRAMTMG13 _DDR_CTRL_BADDR+0x00002134 #define FREQ1_DRAMTMG14 _DDR_CTRL_BADDR+0x00002138 #define FREQ1_ZQCTL0 _DDR_CTRL_BADDR+0x00002180 #define FREQ1_DFITMG0 _DDR_CTRL_BADDR+0x00002190 #define FREQ1_DFITMG1 _DDR_CTRL_BADDR+0x00002194 #define FREQ1_DFITMG2 _DDR_CTRL_BADDR+0x000021b4 #define FREQ1_ODTCFG _DDR_CTRL_BADDR+0x00002240 #define PCFGQOS_0_0 _DDR_CTRL_BADDR+0x494 #define PCFGQOS_0_1 _DDR_CTRL_BADDR+0x494+0xb0*1 #define PCFGQOS_0_2 _DDR_CTRL_BADDR+0x494+0xb0*2 #define PCFGQOS_0_3 _DDR_CTRL_BADDR+0x494+0xb0*3 #define PCFGQOS_0_4 _DDR_CTRL_BADDR+0x494+0xb0*4 #define PCFGQOS_0_5 _DDR_CTRL_BADDR+0x494+0xb0*5 #define PCFGQOS_1_0 _DDR_CTRL_BADDR+0x498 #define PCFGQOS_1_1 _DDR_CTRL_BADDR+0x498+0xb0*1 #define PCFGQOS_1_2 _DDR_CTRL_BADDR+0x498+0xb0*2 #define PCFGQOS_1_3 _DDR_CTRL_BADDR+0x498+0xb0*3 #define PCFGQOS_1_4 _DDR_CTRL_BADDR+0x498+0xb0*4 /* #define PCCFG 0x00000400 #define PCFGR_0 0x00000404 #define PCFGR_1 0x000004b4 #define PCFGR_2 0x00000564 #define PCFGR_3 0x00000614 #define PCFGR_4 0x000006c4 #define PCFGW_0 0x00000408 #define PCFGW_1 0x000004b8 #define PCFGW_2 0x00000568 #define PCFGW_3 0x00000618 #define PCFGW_4 0x000006c8 #define PUB_RDIMMCR1 0x00000055 #define DFISTAT 0x000001bc #define SWSTAT 0x00000324 #define PSTAT 0x000003fc #define DBGCAM 0x00000308 #define MRSTAT 0x00000018 */