From 3e24ee846030967d1c5fb4cf2d1e97c61da132e8 Mon Sep 17 00:00:00 2001
From: Himbeer <himbeer@disroot.org>
Date: Sat, 11 May 2024 23:34:52 +0200
Subject: interrupts: Set SIE bit in sstatus CSR

This fixes external interrupts not trapping into stvec.
---
 src/interrupts.zig | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/interrupts.zig')

diff --git a/src/interrupts.zig b/src/interrupts.zig
index 4f72d91..b66b657 100644
--- a/src/interrupts.zig
+++ b/src/interrupts.zig
@@ -261,6 +261,10 @@ pub fn init() void {
         \\
         \\ la t0, supervisor_trap_vector
         \\ csrw stvec, t0
+        \\
+        \\ csrr t0, sstatus
+        \\ ori t0, t0, 2
+        \\ csrw sstatus, t0
         :
         : [trapframe] "r" (&trap_frame),
     );
-- 
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