diff options
| -rw-r--r-- | src/interrupts.zig | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/interrupts.zig b/src/interrupts.zig index b66b657..870b2ae 100644 --- a/src/interrupts.zig +++ b/src/interrupts.zig @@ -62,7 +62,7 @@ pub const Cause = packed struct(usize) { num: u63, @"async": u1, - pub fn is_async(self: Cause) bool { + pub fn isAsync(self: Cause) bool { return self.@"async" == 1; } }; @@ -92,7 +92,7 @@ pub const SyncCause = enum(u63) { _, }; -export fn supervisor_trap(epc: usize, tval: usize, cause_bits: usize, hart_id: usize, status: usize, frame: *TrapFrame) usize { +export fn handleTrap(epc: usize, tval: usize, cause_bits: usize, hart_id: usize, status: usize, frame: *TrapFrame) usize { _ = &status; _ = &frame; @@ -100,7 +100,7 @@ export fn supervisor_trap(epc: usize, tval: usize, cause_bits: usize, hart_id: u const cause: Cause = @bitCast(cause_bits); - if (cause.is_async()) { + if (cause.isAsync()) { switch (@as(AsyncCause, @enumFromInt(cause.num))) { .supervisor_software => w.print("Hart {d}: Software interrupt\r\n", .{hart_id}) catch while (true) {}, .supervisor_timer => w.print("Hart {d}: Timer interrupt\r\n", .{hart_id}) catch while (true) {}, @@ -154,7 +154,7 @@ export fn supervisor_trap(epc: usize, tval: usize, cause_bits: usize, hart_id: u return epc; } -export fn supervisor_trap_vector() align(4) callconv(.Naked) noreturn { +export fn supervisorTrapVector() align(4) callconv(.Naked) noreturn { asm volatile ( \\ csrrw t6, sscratch, t6 \\ @@ -205,7 +205,7 @@ export fn supervisor_trap_vector() align(4) callconv(.Naked) noreturn { \\ csrr a4, sstatus \\ mv a5, t5 \\ ld sp, 520(t5) - \\ call supervisor_trap + \\ call handleTrap \\ \\ csrw sepc, a0 \\ @@ -259,7 +259,7 @@ pub fn init() void { asm volatile ( \\ csrw sscratch, %[trapframe] \\ - \\ la t0, supervisor_trap_vector + \\ la t0, supervisorTrapVector \\ csrw stvec, t0 \\ \\ csrr t0, sstatus |